src/gallium/drivers/etnaviv/etnaviv_resource.c

   1 /*
   2  * Copyright (c) 2012-2015 Etnaviv Project
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sub license,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the
  12  * next paragraph) shall be included in all copies or substantial portions
  13  * of the Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  21  * DEALINGS IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *    Wladimir J. van der Laan <laanwj@gmail.com>
  25  */
  26
  27 #include "etnaviv_resource.h"
  28
  29 #include "hw/common.xml.h"
  30
  31 #include "etnaviv_context.h"
  32 #include "etnaviv_debug.h"
  33 #include "etnaviv_screen.h"
  34 #include "etnaviv_translate.h"
  35
  36 #include "util/u_inlines.h"
  37 #include "util/u_memory.h"
  38
  39 #include <drm_fourcc.h>
  40
  41 #ifndef DRM_FORMAT_MOD_INVALID
  42 #define DRM_FORMAT_MOD_INVALID ((1ULL<<56) - 1)
  43 #endif
  44
  45 static enum etna_surface_layout modifier_to_layout(uint64_t modifier)
  46 {
  47    switch (modifier) {
  48    case DRM_FORMAT_MOD_VIVANTE_TILED:
  49       return ETNA_LAYOUT_TILED;
  50    case DRM_FORMAT_MOD_VIVANTE_SUPER_TILED:
  51       return ETNA_LAYOUT_SUPER_TILED;
  52    case DRM_FORMAT_MOD_VIVANTE_SPLIT_TILED:
  53       return ETNA_LAYOUT_MULTI_TILED;
  54    case DRM_FORMAT_MOD_VIVANTE_SPLIT_SUPER_TILED:
  55       return ETNA_LAYOUT_MULTI_SUPERTILED;
  56    case DRM_FORMAT_MOD_LINEAR:
  57    default:
  58       return ETNA_LAYOUT_LINEAR;
  59    }
  60 }
  61
  62 /* A tile is 4x4 pixels, having 'screen->specs.bits_per_tile' of tile status.
  63  * So, in a buffer of N pixels, there are N / (4 * 4) tiles.
  64  * We need N * screen->specs.bits_per_tile / (4 * 4) bits of tile status, or
  65  * N * screen->specs.bits_per_tile / (4 * 4 * 8) bytes.
  66  */
  67 bool
  68 etna_screen_resource_alloc_ts(struct pipe_screen *pscreen,
  69                               struct etna_resource *rsc)
  70 {
  71    struct etna_screen *screen = etna_screen(pscreen);
  72    size_t rt_ts_size, ts_layer_stride, pixels;
  73
  74    assert(!rsc->ts_bo);
  75
  76    /* TS only for level 0 -- XXX is this formula correct? */
  77    pixels = rsc->levels[0].layer_stride / util_format_get_blocksize(rsc->base.format);
  78    ts_layer_stride = align(pixels * screen->specs.bits_per_tile / 0x80,
  79                            0x100 * screen->specs.pixel_pipes);
  80    rt_ts_size = ts_layer_stride * rsc->base.array_size;
  81    if (rt_ts_size == 0)
  82       return true;
  83
  84    DBG_F(ETNA_DBG_RESOURCE_MSGS, "%p: Allocating tile status of size %zu",
  85          rsc, rt_ts_size);
  86
  87    struct etna_bo *rt_ts;
  88    rt_ts = etna_bo_new(screen->dev, rt_ts_size, DRM_ETNA_GEM_CACHE_WC);
  89
  90    if (unlikely(!rt_ts)) {
  91       BUG("Problem allocating tile status for resource");
  92       return false;
  93    }
  94
  95    rsc->ts_bo = rt_ts;
  96    rsc->levels[0].ts_offset = 0;
  97    rsc->levels[0].ts_layer_stride = ts_layer_stride;
  98    rsc->levels[0].ts_size = rt_ts_size;
  99
 100    /* It is important to initialize the TS, as random pattern
 101     * can result in crashes. Do this on the CPU as this only happens once
 102     * per surface anyway and it's a small area, so it may not be worth
 103     * queuing this to the GPU. */
 104    void *ts_map = etna_bo_map(rt_ts);
 105    memset(ts_map, screen->specs.ts_clear_value, rt_ts_size);
 106
 107    return true;
 108 }
 109
 110 static boolean
 111 etna_screen_can_create_resource(struct pipe_screen *pscreen,
 112                                 const struct pipe_resource *templat)
 113 {
 114    struct etna_screen *screen = etna_screen(pscreen);
 115    if (!translate_samples_to_xyscale(templat->nr_samples, NULL, NULL, NULL))
 116       return false;
 117
 118    /* templat->bind is not set here, so we must use the minimum sizes */
 119    uint max_size =
 120       MIN2(screen->specs.max_rendertarget_size, screen->specs.max_texture_size);
 121
 122    if (templat->width0 > max_size || templat->height0 > max_size)
 123       return false;
 124
 125    return true;
 126 }
 127
 128 static unsigned
 129 setup_miptree(struct etna_resource *rsc, unsigned paddingX, unsigned paddingY,
 130               unsigned msaa_xscale, unsigned msaa_yscale)
 131 {
 132    struct pipe_resource *prsc = &rsc->base;
 133    unsigned level, size = 0;
 134    unsigned width = prsc->width0;
 135    unsigned height = prsc->height0;
 136    unsigned depth = prsc->depth0;
 137
 138    for (level = 0; level <= prsc->last_level; level++) {
 139       struct etna_resource_level *mip = &rsc->levels[level];
 140
 141       mip->width = width;
 142       mip->height = height;
 143       mip->padded_width = align(width * msaa_xscale, paddingX);
 144       mip->padded_height = align(height * msaa_yscale, paddingY);
 145       mip->stride = util_format_get_stride(prsc->format, mip->padded_width);
 146       mip->offset = size;
 147       mip->layer_stride = mip->stride * util_format_get_nblocksy(prsc->format, mip->padded_height);
 148       mip->size = prsc->array_size * mip->layer_stride;
 149
 150       /* align levels to 64 bytes to be able to render to them */
 151       size += align(mip->size, ETNA_PE_ALIGNMENT) * depth;
 152
 153       width = u_minify(width, 1);
 154       height = u_minify(height, 1);
 155       depth = u_minify(depth, 1);
 156    }
 157
 158    return size;
 159 }
 160
 161 /* Create a new resource object, using the given template info */
 162 struct pipe_resource *
 163 etna_resource_alloc(struct pipe_screen *pscreen, unsigned layout,
 164                     const struct pipe_resource *templat)
 165 {
 166    struct etna_screen *screen = etna_screen(pscreen);
 167    struct etna_resource *rsc;
 168    unsigned size;
 169
 170    DBG_F(ETNA_DBG_RESOURCE_MSGS,
 171          "target=%d, format=%s, %ux%ux%u, array_size=%u, "
 172          "last_level=%u, nr_samples=%u, usage=%u, bind=%x, flags=%x",
 173          templat->target, util_format_name(templat->format), templat->width0,
 174          templat->height0, templat->depth0, templat->array_size,
 175          templat->last_level, templat->nr_samples, templat->usage,
 176          templat->bind, templat->flags);
 177
 178    /* Determine scaling for antialiasing, allow override using debug flag */
 179    int nr_samples = templat->nr_samples;
 180    if ((templat->bind & (PIPE_BIND_RENDER_TARGET | PIPE_BIND_DEPTH_STENCIL)) &&
 181        !(templat->bind & PIPE_BIND_SAMPLER_VIEW)) {
 182       if (DBG_ENABLED(ETNA_DBG_MSAA_2X))
 183          nr_samples = 2;
 184       if (DBG_ENABLED(ETNA_DBG_MSAA_4X))
 185          nr_samples = 4;
 186    }
 187
 188    int msaa_xscale = 1, msaa_yscale = 1;
 189    if (!translate_samples_to_xyscale(nr_samples, &msaa_xscale, &msaa_yscale, NULL)) {
 190       /* Number of samples not supported */
 191       return NULL;
 192    }
 193
 194    /* If we have the TEXTURE_HALIGN feature, we can always align to the
 195     * resolve engine's width.  If not, we must not align resources used
 196     * only for textures. */
 197    bool rs_align = VIV_FEATURE(screen, chipMinorFeatures1, TEXTURE_HALIGN) ||
 198                    !etna_resource_sampler_only(templat);
 199
 200    /* Determine needed padding (alignment of height/width) */
 201    unsigned paddingX = 0, paddingY = 0;
 202    unsigned halign = TEXTURE_HALIGN_FOUR;
 203    etna_layout_multiple(layout, screen->specs.pixel_pipes, rs_align, &paddingX,
 204                         &paddingY, &halign);
 205    assert(paddingX && paddingY);
 206
 207    if (templat->target != PIPE_BUFFER)
 208       etna_adjust_rs_align(screen->specs.pixel_pipes, NULL, &paddingY);
 209
 210    if (templat->bind & PIPE_BIND_SCANOUT) {
 211       struct pipe_resource scanout_templat = *templat;
 212       struct renderonly_scanout *scanout;
 213       struct winsys_handle handle;
 214
 215       /* pad scanout buffer size to be compatible with the RS */
 216       etna_adjust_rs_align(screen->specs.pixel_pipes,
 217                            &scanout_templat.width0, &scanout_templat.height0);
 218
 219       scanout = renderonly_scanout_for_resource(&scanout_templat,
 220                                                 screen->ro, &handle);
 221       if (!scanout)
 222          return NULL;
 223
 224       assert(handle.type == DRM_API_HANDLE_TYPE_FD);
 225       rsc = etna_resource(pscreen->resource_from_handle(pscreen, templat,
 226                                                         &handle,
 227                                                         PIPE_HANDLE_USAGE_WRITE));
 228       close(handle.handle);
 229       if (!rsc)
 230          return NULL;
 231
 232       rsc->scanout = scanout;
 233
 234       return &rsc->base;
 235    }
 236
 237    rsc = CALLOC_STRUCT(etna_resource);
 238    if (!rsc)
 239       return NULL;
 240
 241    rsc->base = *templat;
 242    rsc->base.screen = pscreen;
 243    rsc->base.nr_samples = nr_samples;
 244    rsc->layout = layout;
 245    rsc->halign = halign;
 246
 247    pipe_reference_init(&rsc->base.reference, 1);
 248    list_inithead(&rsc->list);
 249
 250    size = setup_miptree(rsc, paddingX, paddingY, msaa_xscale, msaa_yscale);
 251
 252    uint32_t flags = DRM_ETNA_GEM_CACHE_WC;
 253    if (templat->bind & PIPE_BIND_VERTEX_BUFFER)
 254       flags |= DRM_ETNA_GEM_FORCE_MMU;
 255    struct etna_bo *bo = etna_bo_new(screen->dev, size, flags);
 256    if (unlikely(bo == NULL)) {
 257       BUG("Problem allocating video memory for resource");
 258       goto free_rsc;
 259    }
 260
 261    rsc->bo = bo;
 262    rsc->ts_bo = 0; /* TS is only created when first bound to surface */
 263
 264    if (DBG_ENABLED(ETNA_DBG_ZERO)) {
 265       void *map = etna_bo_map(bo);
 266       memset(map, 0, size);
 267    }
 268
 269    return &rsc->base;
 270
 271 free_rsc:
 272    FREE(rsc);
 273    return NULL;
 274 }
 275
 276 static struct pipe_resource *
 277 etna_resource_create(struct pipe_screen *pscreen,
 278                      const struct pipe_resource *templat)
 279 {
 280    struct etna_screen *screen = etna_screen(pscreen);
 281
 282    /* Figure out what tiling to use -- for now, assume that texture cannot be linear.
 283     * there is a capability LINEAR_TEXTURE_SUPPORT (supported on gc880 and
 284     * gc2000 at least), but not sure how it works.
 285     * Buffers always have LINEAR layout.
 286     */
 287    unsigned layout = ETNA_LAYOUT_LINEAR;
 288    if (etna_resource_sampler_only(templat)) {
 289       /* The buffer is only used for texturing, so create something
 290        * directly compatible with the sampler.  Such a buffer can
 291        * never be rendered to. */
 292       layout = ETNA_LAYOUT_TILED;
 293
 294       if (util_format_is_compressed(templat->format))
 295          layout = ETNA_LAYOUT_LINEAR;
 296    } else if (templat->target != PIPE_BUFFER) {
 297       bool want_multitiled = false;
 298       bool want_supertiled = screen->specs.can_supertile;
 299
 300       /* When this GPU supports single-buffer rendering, don't ever enable
 301        * multi-tiling. This replicates the blob behavior on GC3000.
 302        */
 303       if (!screen->specs.single_buffer)
 304          want_multitiled = screen->specs.pixel_pipes > 1;
 305
 306       /* Keep single byte blocksized resources as tiled, since we
 307        * are unable to use the RS blit to de-tile them. However,
 308        * if they're used as a render target or depth/stencil, they
 309        * must be multi-tiled for GPUs with multiple pixel pipes.
 310        * Ignore depth/stencil here, but it is an error for a render
 311        * target.
 312        */
 313       if (util_format_get_blocksize(templat->format) == 1 &&
 314           !(templat->bind & PIPE_BIND_DEPTH_STENCIL)) {
 315          assert(!(templat->bind & PIPE_BIND_RENDER_TARGET && want_multitiled));
 316          want_multitiled = want_supertiled = false;
 317       }
 318
 319       layout = ETNA_LAYOUT_BIT_TILE;
 320       if (want_multitiled)
 321          layout |= ETNA_LAYOUT_BIT_MULTI;
 322       if (want_supertiled)
 323          layout |= ETNA_LAYOUT_BIT_SUPER;
 324    }
 325
 326    if (templat->target == PIPE_TEXTURE_3D)
 327       layout = ETNA_LAYOUT_LINEAR;
 328
 329    return etna_resource_alloc(pscreen, layout, templat);
 330 }
 331
 332 static void
 333 etna_resource_changed(struct pipe_screen *pscreen, struct pipe_resource *prsc)
 334 {
 335    struct etna_resource *res = etna_resource(prsc);
 336
 337    if (res->external)
 338       etna_resource(res->external)->seqno++;
 339    else
 340       res->seqno++;
 341 }
 342
 343 static void
 344 etna_resource_destroy(struct pipe_screen *pscreen, struct pipe_resource *prsc)
 345 {
 346    struct etna_resource *rsc = etna_resource(prsc);
 347
 348    if (rsc->bo)
 349       etna_bo_del(rsc->bo);
 350
 351    if (rsc->ts_bo)
 352       etna_bo_del(rsc->ts_bo);
 353
 354    if (rsc->scanout)
 355       renderonly_scanout_destroy(rsc->scanout, etna_screen(pscreen)->ro);
 356
 357    list_delinit(&rsc->list);
 358
 359    pipe_resource_reference(&rsc->texture, NULL);
 360    pipe_resource_reference(&rsc->external, NULL);
 361
 362    FREE(rsc);
 363 }
 364
 365 static struct pipe_resource *
 366 etna_resource_from_handle(struct pipe_screen *pscreen,
 367                           const struct pipe_resource *tmpl,
 368                           struct winsys_handle *handle, unsigned usage)
 369 {
 370    struct etna_screen *screen = etna_screen(pscreen);
 371    struct etna_resource *rsc;
 372    struct etna_resource_level *level;
 373    struct pipe_resource *prsc;
 374    struct pipe_resource *ptiled = NULL;
 375
 376    DBG("target=%d, format=%s, %ux%ux%u, array_size=%u, last_level=%u, "
 377        "nr_samples=%u, usage=%u, bind=%x, flags=%x",
 378        tmpl->target, util_format_name(tmpl->format), tmpl->width0,
 379        tmpl->height0, tmpl->depth0, tmpl->array_size, tmpl->last_level,
 380        tmpl->nr_samples, tmpl->usage, tmpl->bind, tmpl->flags);
 381
 382    rsc = CALLOC_STRUCT(etna_resource);
 383    if (!rsc)
 384       return NULL;
 385
 386    level = &rsc->levels[0];
 387    prsc = &rsc->base;
 388
 389    *prsc = *tmpl;
 390
 391    pipe_reference_init(&prsc->reference, 1);
 392    list_inithead(&rsc->list);
 393    prsc->screen = pscreen;
 394
 395    rsc->bo = etna_screen_bo_from_handle(pscreen, handle, &level->stride);
 396    if (!rsc->bo)
 397       goto fail;
 398
 399    rsc->seqno = 1;
 400    rsc->layout = modifier_to_layout(handle->modifier);
 401    rsc->halign = TEXTURE_HALIGN_FOUR;
 402
 403
 404    level->width = tmpl->width0;
 405    level->height = tmpl->height0;
 406
 407    /* Determine padding of the imported resource. */
 408    unsigned paddingX = 0, paddingY = 0;
 409    etna_layout_multiple(rsc->layout, screen->specs.pixel_pipes,
 410                         VIV_FEATURE(screen, chipMinorFeatures1, TEXTURE_HALIGN),
 411                         &paddingX, &paddingY, &rsc->halign);
 412
 413    etna_adjust_rs_align(screen->specs.pixel_pipes, NULL, &paddingY);
 414    level->padded_width = align(level->width, paddingX);
 415    level->padded_height = align(level->height, paddingY);
 416
 417    level->layer_stride = level->stride * util_format_get_nblocksy(prsc->format,
 418                                                                   level->padded_height);
 419
 420    /* The DDX must give us a BO which conforms to our padding size.
 421     * The stride of the BO must be greater or equal to our padded
 422     * stride. The size of the BO must accomodate the padded height. */
 423    if (level->stride < util_format_get_stride(tmpl->format, level->padded_width)) {
 424       BUG("BO stride is too small for RS engine width padding");
 425       goto fail;
 426    }
 427    if (etna_bo_size(rsc->bo) < level->stride * level->padded_height) {
 428       BUG("BO size is too small for RS engine height padding");
 429       goto fail;
 430    }
 431
 432    if (rsc->layout == ETNA_LAYOUT_LINEAR) {
 433       /*
 434        * Both sampler and pixel pipes can't handle linear, create a compatible
 435        * base resource, where we can attach the imported buffer as an external
 436        * resource.
 437        */
 438       struct pipe_resource tiled_templat = *tmpl;
 439
 440       /*
 441        * Remove BIND_SCANOUT to avoid recursion, as etna_resource_create uses
 442        * this function to import the scanout buffer and get a tiled resource.
 443        */
 444       tiled_templat.bind &= ~PIPE_BIND_SCANOUT;
 445
 446       ptiled = etna_resource_create(pscreen, &tiled_templat);
 447       if (!ptiled)
 448          goto fail;
 449
 450       etna_resource(ptiled)->external = prsc;
 451
 452       return ptiled;
 453    }
 454
 455    return prsc;
 456
 457 fail:
 458    etna_resource_destroy(pscreen, prsc);
 459    if (ptiled)
 460       etna_resource_destroy(pscreen, ptiled);
 461
 462    return NULL;
 463 }
 464
 465 static boolean
 466 etna_resource_get_handle(struct pipe_screen *pscreen,
 467                          struct pipe_context *pctx,
 468                          struct pipe_resource *prsc,
 469                          struct winsys_handle *handle, unsigned usage)
 470 {
 471    struct etna_resource *rsc = etna_resource(prsc);
 472    /* Scanout is always attached to the base resource */
 473    struct renderonly_scanout *scanout = rsc->scanout;
 474
 475    /*
 476     * External resources are preferred, so a import->export chain of
 477     * render/sampler incompatible buffers yield the same handle.
 478     */
 479    if (rsc->external)
 480       rsc = etna_resource(rsc->external);
 481
 482    if (handle->type == DRM_API_HANDLE_TYPE_KMS &&
 483        renderonly_get_handle(scanout, handle))
 484       return TRUE;
 485
 486    return etna_screen_bo_get_handle(pscreen, rsc->bo, rsc->levels[0].stride,
 487                                     handle);
 488 }
 489
 490 void
 491 etna_resource_used(struct etna_context *ctx, struct pipe_resource *prsc,
 492                    enum etna_resource_status status)
 493 {
 494    struct etna_resource *rsc;
 495
 496    if (!prsc)
 497       return;
 498
 499    rsc = etna_resource(prsc);
 500    rsc->status |= status;
 501
 502    /* TODO resources can actually be shared across contexts,
 503     * so I'm not sure a single list-head will do the trick? */
 504    debug_assert((rsc->pending_ctx == ctx) || !rsc->pending_ctx);
 505    list_delinit(&rsc->list);
 506    list_addtail(&rsc->list, &ctx->used_resources);
 507    rsc->pending_ctx = ctx;
 508 }
 509
 510 void
 511 etna_resource_screen_init(struct pipe_screen *pscreen)
 512 {
 513    pscreen->can_create_resource = etna_screen_can_create_resource;
 514    pscreen->resource_create = etna_resource_create;
 515    pscreen->resource_from_handle = etna_resource_from_handle;
 516    pscreen->resource_get_handle = etna_resource_get_handle;
 517    pscreen->resource_changed = etna_resource_changed;
 518    pscreen->resource_destroy = etna_resource_destroy;
 519 }