gallium: switch boolean -> bool at the interface definitions
[mesa.git] / src / gallium / drivers / etnaviv / etnaviv_resource.c
1 /*
2 * Copyright (c) 2012-2015 Etnaviv Project
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sub license,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the
12 * next paragraph) shall be included in all copies or substantial portions
13 * of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
22 *
23 * Authors:
24 * Wladimir J. van der Laan <laanwj@gmail.com>
25 */
26
27 #include "etnaviv_resource.h"
28
29 #include "hw/common.xml.h"
30
31 #include "etnaviv_context.h"
32 #include "etnaviv_debug.h"
33 #include "etnaviv_screen.h"
34 #include "etnaviv_translate.h"
35
36 #include "util/hash_table.h"
37 #include "util/u_inlines.h"
38 #include "util/u_memory.h"
39
40 #include "drm-uapi/drm_fourcc.h"
41
42 static enum etna_surface_layout modifier_to_layout(uint64_t modifier)
43 {
44 switch (modifier) {
45 case DRM_FORMAT_MOD_VIVANTE_TILED:
46 return ETNA_LAYOUT_TILED;
47 case DRM_FORMAT_MOD_VIVANTE_SUPER_TILED:
48 return ETNA_LAYOUT_SUPER_TILED;
49 case DRM_FORMAT_MOD_VIVANTE_SPLIT_TILED:
50 return ETNA_LAYOUT_MULTI_TILED;
51 case DRM_FORMAT_MOD_VIVANTE_SPLIT_SUPER_TILED:
52 return ETNA_LAYOUT_MULTI_SUPERTILED;
53 case DRM_FORMAT_MOD_LINEAR:
54 default:
55 return ETNA_LAYOUT_LINEAR;
56 }
57 }
58
59 static uint64_t layout_to_modifier(enum etna_surface_layout layout)
60 {
61 switch (layout) {
62 case ETNA_LAYOUT_TILED:
63 return DRM_FORMAT_MOD_VIVANTE_TILED;
64 case ETNA_LAYOUT_SUPER_TILED:
65 return DRM_FORMAT_MOD_VIVANTE_SUPER_TILED;
66 case ETNA_LAYOUT_MULTI_TILED:
67 return DRM_FORMAT_MOD_VIVANTE_SPLIT_TILED;
68 case ETNA_LAYOUT_MULTI_SUPERTILED:
69 return DRM_FORMAT_MOD_VIVANTE_SPLIT_SUPER_TILED;
70 case ETNA_LAYOUT_LINEAR:
71 return DRM_FORMAT_MOD_LINEAR;
72 default:
73 return DRM_FORMAT_MOD_INVALID;
74 }
75 }
76
77 /* A tile is 4x4 pixels, having 'screen->specs.bits_per_tile' of tile status.
78 * So, in a buffer of N pixels, there are N / (4 * 4) tiles.
79 * We need N * screen->specs.bits_per_tile / (4 * 4) bits of tile status, or
80 * N * screen->specs.bits_per_tile / (4 * 4 * 8) bytes.
81 */
82 bool
83 etna_screen_resource_alloc_ts(struct pipe_screen *pscreen,
84 struct etna_resource *rsc)
85 {
86 struct etna_screen *screen = etna_screen(pscreen);
87 size_t rt_ts_size, ts_layer_stride;
88 size_t ts_bits_per_tile, bytes_per_tile;
89 uint8_t ts_mode = TS_MODE_128B; /* only used by halti5 */
90 int8_t ts_compress_fmt;
91
92 assert(!rsc->ts_bo);
93
94 /* pre-v4 compression is largely useless, so disable it when not wanted for MSAA
95 * v4 compression can be enabled everywhere without any known drawback,
96 * except that in-place resolve must go through a slower path
97 */
98 ts_compress_fmt = (screen->specs.v4_compression || rsc->base.nr_samples > 1) ?
99 translate_ts_format(rsc->base.format) : -1;
100
101 if (screen->specs.halti >= 5) {
102 /* enable 256B ts mode with compression, as it improves performance
103 * the size of the resource might also determine if we want to use it or not
104 */
105 if (ts_compress_fmt >= 0)
106 ts_mode = TS_MODE_256B;
107
108 ts_bits_per_tile = 4;
109 bytes_per_tile = ts_mode == TS_MODE_256B ? 256 : 128;
110 } else {
111 ts_bits_per_tile = screen->specs.bits_per_tile;
112 bytes_per_tile = 64;
113 }
114
115 ts_layer_stride = align(DIV_ROUND_UP(rsc->levels[0].layer_stride,
116 bytes_per_tile * 8 / ts_bits_per_tile),
117 0x100 * screen->specs.pixel_pipes);
118 rt_ts_size = ts_layer_stride * rsc->base.array_size;
119 if (rt_ts_size == 0)
120 return true;
121
122 DBG_F(ETNA_DBG_RESOURCE_MSGS, "%p: Allocating tile status of size %zu",
123 rsc, rt_ts_size);
124
125 struct etna_bo *rt_ts;
126 rt_ts = etna_bo_new(screen->dev, rt_ts_size, DRM_ETNA_GEM_CACHE_WC);
127
128 if (unlikely(!rt_ts)) {
129 BUG("Problem allocating tile status for resource");
130 return false;
131 }
132
133 rsc->ts_bo = rt_ts;
134 rsc->levels[0].ts_offset = 0;
135 rsc->levels[0].ts_layer_stride = ts_layer_stride;
136 rsc->levels[0].ts_size = rt_ts_size;
137 rsc->levels[0].ts_mode = ts_mode;
138 rsc->levels[0].ts_compress_fmt = ts_compress_fmt;
139
140 return true;
141 }
142
143 static bool
144 etna_screen_can_create_resource(struct pipe_screen *pscreen,
145 const struct pipe_resource *templat)
146 {
147 struct etna_screen *screen = etna_screen(pscreen);
148 if (!translate_samples_to_xyscale(templat->nr_samples, NULL, NULL, NULL))
149 return false;
150
151 /* templat->bind is not set here, so we must use the minimum sizes */
152 uint max_size =
153 MIN2(screen->specs.max_rendertarget_size, screen->specs.max_texture_size);
154
155 if (templat->width0 > max_size || templat->height0 > max_size)
156 return false;
157
158 return true;
159 }
160
161 static unsigned
162 setup_miptree(struct etna_resource *rsc, unsigned paddingX, unsigned paddingY,
163 unsigned msaa_xscale, unsigned msaa_yscale)
164 {
165 struct pipe_resource *prsc = &rsc->base;
166 unsigned level, size = 0;
167 unsigned width = prsc->width0;
168 unsigned height = prsc->height0;
169 unsigned depth = prsc->depth0;
170
171 for (level = 0; level <= prsc->last_level; level++) {
172 struct etna_resource_level *mip = &rsc->levels[level];
173
174 mip->width = width;
175 mip->height = height;
176 mip->padded_width = align(width * msaa_xscale, paddingX);
177 mip->padded_height = align(height * msaa_yscale, paddingY);
178 mip->stride = util_format_get_stride(prsc->format, mip->padded_width);
179 mip->offset = size;
180 mip->layer_stride = mip->stride * util_format_get_nblocksy(prsc->format, mip->padded_height);
181 mip->size = prsc->array_size * mip->layer_stride;
182
183 /* align levels to 64 bytes to be able to render to them */
184 size += align(mip->size, ETNA_PE_ALIGNMENT) * depth;
185
186 width = u_minify(width, 1);
187 height = u_minify(height, 1);
188 depth = u_minify(depth, 1);
189 }
190
191 return size;
192 }
193
194 /* Is rs alignment needed? */
195 static bool is_rs_align(struct etna_screen *screen,
196 const struct pipe_resource *tmpl)
197 {
198 return screen->specs.use_blt ? false : (
199 VIV_FEATURE(screen, chipMinorFeatures1, TEXTURE_HALIGN) ||
200 !etna_resource_sampler_only(tmpl));
201 }
202
203 /* Create a new resource object, using the given template info */
204 struct pipe_resource *
205 etna_resource_alloc(struct pipe_screen *pscreen, unsigned layout,
206 enum etna_resource_addressing_mode mode, uint64_t modifier,
207 const struct pipe_resource *templat)
208 {
209 struct etna_screen *screen = etna_screen(pscreen);
210 struct etna_resource *rsc;
211 unsigned size;
212
213 DBG_F(ETNA_DBG_RESOURCE_MSGS,
214 "target=%d, format=%s, %ux%ux%u, array_size=%u, "
215 "last_level=%u, nr_samples=%u, usage=%u, bind=%x, flags=%x",
216 templat->target, util_format_name(templat->format), templat->width0,
217 templat->height0, templat->depth0, templat->array_size,
218 templat->last_level, templat->nr_samples, templat->usage,
219 templat->bind, templat->flags);
220
221 /* Determine scaling for antialiasing, allow override using debug flag */
222 int nr_samples = templat->nr_samples;
223 if ((templat->bind & (PIPE_BIND_RENDER_TARGET | PIPE_BIND_DEPTH_STENCIL)) &&
224 !(templat->bind & PIPE_BIND_SAMPLER_VIEW)) {
225 if (DBG_ENABLED(ETNA_DBG_MSAA_2X))
226 nr_samples = 2;
227 if (DBG_ENABLED(ETNA_DBG_MSAA_4X))
228 nr_samples = 4;
229 }
230
231 int msaa_xscale = 1, msaa_yscale = 1;
232 if (!translate_samples_to_xyscale(nr_samples, &msaa_xscale, &msaa_yscale, NULL)) {
233 /* Number of samples not supported */
234 return NULL;
235 }
236
237 /* Determine needed padding (alignment of height/width) */
238 unsigned paddingX = 0, paddingY = 0;
239 unsigned halign = TEXTURE_HALIGN_FOUR;
240 if (!util_format_is_compressed(templat->format)) {
241 /* If we have the TEXTURE_HALIGN feature, we can always align to the
242 * resolve engine's width. If not, we must not align resources used
243 * only for textures. If this GPU uses the BLT engine, never do RS align.
244 */
245 etna_layout_multiple(layout, screen->specs.pixel_pipes,
246 is_rs_align (screen, templat),
247 &paddingX, &paddingY, &halign);
248 assert(paddingX && paddingY);
249 } else {
250 /* Compressed textures are padded to their block size, but we don't have
251 * to do anything special for that. */
252 paddingX = 1;
253 paddingY = 1;
254 }
255
256 if (!screen->specs.use_blt && templat->target != PIPE_BUFFER && layout == ETNA_LAYOUT_LINEAR)
257 paddingY = align(paddingY, ETNA_RS_HEIGHT_MASK + 1);
258
259 if (templat->bind & PIPE_BIND_SCANOUT && screen->ro->kms_fd >= 0) {
260 struct pipe_resource scanout_templat = *templat;
261 struct renderonly_scanout *scanout;
262 struct winsys_handle handle;
263
264 /* pad scanout buffer size to be compatible with the RS */
265 if (!screen->specs.use_blt && modifier == DRM_FORMAT_MOD_LINEAR) {
266 paddingX = align(paddingX, ETNA_RS_WIDTH_MASK + 1);
267 paddingY = align(paddingY, ETNA_RS_HEIGHT_MASK + 1);
268 }
269
270 scanout_templat.width0 = align(scanout_templat.width0, paddingX);
271 scanout_templat.height0 = align(scanout_templat.height0, paddingY);
272
273 scanout = renderonly_scanout_for_resource(&scanout_templat,
274 screen->ro, &handle);
275 if (!scanout)
276 return NULL;
277
278 assert(handle.type == WINSYS_HANDLE_TYPE_FD);
279 handle.modifier = modifier;
280 rsc = etna_resource(pscreen->resource_from_handle(pscreen, templat,
281 &handle,
282 PIPE_HANDLE_USAGE_FRAMEBUFFER_WRITE));
283 close(handle.handle);
284 if (!rsc)
285 return NULL;
286
287 rsc->scanout = scanout;
288
289 return &rsc->base;
290 }
291
292 rsc = CALLOC_STRUCT(etna_resource);
293 if (!rsc)
294 return NULL;
295
296 rsc->base = *templat;
297 rsc->base.screen = pscreen;
298 rsc->base.nr_samples = nr_samples;
299 rsc->layout = layout;
300 rsc->halign = halign;
301 rsc->addressing_mode = mode;
302
303 pipe_reference_init(&rsc->base.reference, 1);
304
305 size = setup_miptree(rsc, paddingX, paddingY, msaa_xscale, msaa_yscale);
306
307 uint32_t flags = DRM_ETNA_GEM_CACHE_WC;
308 if (templat->bind & PIPE_BIND_VERTEX_BUFFER)
309 flags |= DRM_ETNA_GEM_FORCE_MMU;
310 struct etna_bo *bo = etna_bo_new(screen->dev, size, flags);
311 if (unlikely(bo == NULL)) {
312 BUG("Problem allocating video memory for resource");
313 goto free_rsc;
314 }
315
316 rsc->bo = bo;
317 rsc->ts_bo = 0; /* TS is only created when first bound to surface */
318
319 if (DBG_ENABLED(ETNA_DBG_ZERO)) {
320 void *map = etna_bo_map(bo);
321 memset(map, 0, size);
322 }
323
324 rsc->pending_ctx = _mesa_set_create(NULL, _mesa_hash_pointer,
325 _mesa_key_pointer_equal);
326 if (!rsc->pending_ctx)
327 goto free_rsc;
328
329 return &rsc->base;
330
331 free_rsc:
332 FREE(rsc);
333 return NULL;
334 }
335
336 static struct pipe_resource *
337 etna_resource_create(struct pipe_screen *pscreen,
338 const struct pipe_resource *templat)
339 {
340 struct etna_screen *screen = etna_screen(pscreen);
341
342 /* Figure out what tiling and address mode to use -- for now, assume that
343 * texture cannot be linear. there is a capability LINEAR_TEXTURE_SUPPORT
344 * (supported on gc880 and gc2000 at least), but not sure how it works.
345 * Buffers always have LINEAR layout.
346 */
347 unsigned layout = ETNA_LAYOUT_LINEAR;
348 enum etna_resource_addressing_mode mode = ETNA_ADDRESSING_MODE_TILED;
349
350 if (etna_resource_sampler_only(templat)) {
351 /* The buffer is only used for texturing, so create something
352 * directly compatible with the sampler. Such a buffer can
353 * never be rendered to. */
354 layout = ETNA_LAYOUT_TILED;
355
356 if (util_format_is_compressed(templat->format))
357 layout = ETNA_LAYOUT_LINEAR;
358 } else if (templat->target != PIPE_BUFFER) {
359 bool want_multitiled = false;
360 bool want_supertiled = screen->specs.can_supertile;
361
362 /* When this GPU supports single-buffer rendering, don't ever enable
363 * multi-tiling. This replicates the blob behavior on GC3000.
364 */
365 if (!screen->specs.single_buffer)
366 want_multitiled = screen->specs.pixel_pipes > 1;
367
368 /* Keep single byte blocksized resources as tiled, since we
369 * are unable to use the RS blit to de-tile them. However,
370 * if they're used as a render target or depth/stencil, they
371 * must be multi-tiled for GPUs with multiple pixel pipes.
372 * Ignore depth/stencil here, but it is an error for a render
373 * target.
374 */
375 if (util_format_get_blocksize(templat->format) == 1 &&
376 !(templat->bind & PIPE_BIND_DEPTH_STENCIL)) {
377 assert(!(templat->bind & PIPE_BIND_RENDER_TARGET && want_multitiled));
378 want_multitiled = want_supertiled = false;
379 }
380
381 layout = ETNA_LAYOUT_BIT_TILE;
382 if (want_multitiled)
383 layout |= ETNA_LAYOUT_BIT_MULTI;
384 if (want_supertiled)
385 layout |= ETNA_LAYOUT_BIT_SUPER;
386 }
387
388 if (templat->target == PIPE_TEXTURE_3D)
389 layout = ETNA_LAYOUT_LINEAR;
390
391 /* modifier is only used for scanout surfaces, so safe to use LINEAR here */
392 return etna_resource_alloc(pscreen, layout, mode, DRM_FORMAT_MOD_LINEAR, templat);
393 }
394
395 enum modifier_priority {
396 MODIFIER_PRIORITY_INVALID = 0,
397 MODIFIER_PRIORITY_LINEAR,
398 MODIFIER_PRIORITY_SPLIT_TILED,
399 MODIFIER_PRIORITY_SPLIT_SUPER_TILED,
400 MODIFIER_PRIORITY_TILED,
401 MODIFIER_PRIORITY_SUPER_TILED,
402 };
403
404 const uint64_t priority_to_modifier[] = {
405 [MODIFIER_PRIORITY_INVALID] = DRM_FORMAT_MOD_INVALID,
406 [MODIFIER_PRIORITY_LINEAR] = DRM_FORMAT_MOD_LINEAR,
407 [MODIFIER_PRIORITY_SPLIT_TILED] = DRM_FORMAT_MOD_VIVANTE_SPLIT_TILED,
408 [MODIFIER_PRIORITY_SPLIT_SUPER_TILED] = DRM_FORMAT_MOD_VIVANTE_SPLIT_SUPER_TILED,
409 [MODIFIER_PRIORITY_TILED] = DRM_FORMAT_MOD_VIVANTE_TILED,
410 [MODIFIER_PRIORITY_SUPER_TILED] = DRM_FORMAT_MOD_VIVANTE_SUPER_TILED,
411 };
412
413 static uint64_t
414 select_best_modifier(const struct etna_screen * screen,
415 const uint64_t *modifiers, const unsigned count)
416 {
417 enum modifier_priority prio = MODIFIER_PRIORITY_INVALID;
418
419 for (int i = 0; i < count; i++) {
420 switch (modifiers[i]) {
421 case DRM_FORMAT_MOD_VIVANTE_SUPER_TILED:
422 if ((screen->specs.pixel_pipes > 1 && !screen->specs.single_buffer) ||
423 !screen->specs.can_supertile)
424 break;
425 prio = MAX2(prio, MODIFIER_PRIORITY_SUPER_TILED);
426 break;
427 case DRM_FORMAT_MOD_VIVANTE_TILED:
428 if (screen->specs.pixel_pipes > 1 && !screen->specs.single_buffer)
429 break;
430 prio = MAX2(prio, MODIFIER_PRIORITY_TILED);
431 break;
432 case DRM_FORMAT_MOD_VIVANTE_SPLIT_SUPER_TILED:
433 if ((screen->specs.pixel_pipes < 2) || !screen->specs.can_supertile)
434 break;
435 prio = MAX2(prio, MODIFIER_PRIORITY_SPLIT_SUPER_TILED);
436 break;
437 case DRM_FORMAT_MOD_VIVANTE_SPLIT_TILED:
438 if (screen->specs.pixel_pipes < 2)
439 break;
440 prio = MAX2(prio, MODIFIER_PRIORITY_SPLIT_TILED);
441 break;
442 case DRM_FORMAT_MOD_LINEAR:
443 prio = MAX2(prio, MODIFIER_PRIORITY_LINEAR);
444 break;
445 case DRM_FORMAT_MOD_INVALID:
446 default:
447 break;
448 }
449 }
450
451 return priority_to_modifier[prio];
452 }
453
454 static struct pipe_resource *
455 etna_resource_create_modifiers(struct pipe_screen *pscreen,
456 const struct pipe_resource *templat,
457 const uint64_t *modifiers, int count)
458 {
459 struct etna_screen *screen = etna_screen(pscreen);
460 struct pipe_resource tmpl = *templat;
461 uint64_t modifier = select_best_modifier(screen, modifiers, count);
462
463 if (modifier == DRM_FORMAT_MOD_INVALID)
464 return NULL;
465
466 /*
467 * We currently assume that all buffers allocated through this interface
468 * should be scanout enabled.
469 */
470 tmpl.bind |= PIPE_BIND_SCANOUT;
471
472 return etna_resource_alloc(pscreen, modifier_to_layout(modifier),
473 ETNA_ADDRESSING_MODE_TILED, modifier, &tmpl);
474 }
475
476 static void
477 etna_resource_changed(struct pipe_screen *pscreen, struct pipe_resource *prsc)
478 {
479 struct etna_resource *res = etna_resource(prsc);
480
481 if (res->external)
482 etna_resource(res->external)->seqno++;
483 else
484 res->seqno++;
485 }
486
487 static void
488 etna_resource_destroy(struct pipe_screen *pscreen, struct pipe_resource *prsc)
489 {
490 struct etna_screen *screen = etna_screen(pscreen);
491 struct etna_resource *rsc = etna_resource(prsc);
492
493 mtx_lock(&screen->lock);
494 _mesa_set_remove_key(screen->used_resources, rsc);
495 _mesa_set_destroy(rsc->pending_ctx, NULL);
496 mtx_unlock(&screen->lock);
497
498 if (rsc->bo)
499 etna_bo_del(rsc->bo);
500
501 if (rsc->ts_bo)
502 etna_bo_del(rsc->ts_bo);
503
504 if (rsc->scanout)
505 renderonly_scanout_destroy(rsc->scanout, etna_screen(pscreen)->ro);
506
507 pipe_resource_reference(&rsc->texture, NULL);
508 pipe_resource_reference(&rsc->external, NULL);
509
510 for (unsigned i = 0; i < ETNA_NUM_LOD; i++)
511 FREE(rsc->levels[i].patch_offsets);
512
513 FREE(rsc);
514 }
515
516 static struct pipe_resource *
517 etna_resource_from_handle(struct pipe_screen *pscreen,
518 const struct pipe_resource *tmpl,
519 struct winsys_handle *handle, unsigned usage)
520 {
521 struct etna_screen *screen = etna_screen(pscreen);
522 struct etna_resource *rsc;
523 struct etna_resource_level *level;
524 struct pipe_resource *prsc;
525 struct pipe_resource *ptiled = NULL;
526
527 DBG("target=%d, format=%s, %ux%ux%u, array_size=%u, last_level=%u, "
528 "nr_samples=%u, usage=%u, bind=%x, flags=%x",
529 tmpl->target, util_format_name(tmpl->format), tmpl->width0,
530 tmpl->height0, tmpl->depth0, tmpl->array_size, tmpl->last_level,
531 tmpl->nr_samples, tmpl->usage, tmpl->bind, tmpl->flags);
532
533 rsc = CALLOC_STRUCT(etna_resource);
534 if (!rsc)
535 return NULL;
536
537 level = &rsc->levels[0];
538 prsc = &rsc->base;
539
540 *prsc = *tmpl;
541
542 pipe_reference_init(&prsc->reference, 1);
543 prsc->screen = pscreen;
544
545 rsc->bo = etna_screen_bo_from_handle(pscreen, handle, &level->stride);
546 if (!rsc->bo)
547 goto fail;
548
549 rsc->seqno = 1;
550 rsc->layout = modifier_to_layout(handle->modifier);
551 rsc->halign = TEXTURE_HALIGN_FOUR;
552 rsc->addressing_mode = ETNA_ADDRESSING_MODE_TILED;
553
554
555 level->width = tmpl->width0;
556 level->height = tmpl->height0;
557
558 /* Determine padding of the imported resource. */
559 unsigned paddingX = 0, paddingY = 0;
560 etna_layout_multiple(rsc->layout, screen->specs.pixel_pipes,
561 is_rs_align(screen, tmpl),
562 &paddingX, &paddingY, &rsc->halign);
563
564 if (!screen->specs.use_blt && rsc->layout == ETNA_LAYOUT_LINEAR)
565 paddingY = align(paddingY, ETNA_RS_HEIGHT_MASK + 1);
566 level->padded_width = align(level->width, paddingX);
567 level->padded_height = align(level->height, paddingY);
568
569 level->layer_stride = level->stride * util_format_get_nblocksy(prsc->format,
570 level->padded_height);
571 level->size = level->layer_stride;
572
573 /* The DDX must give us a BO which conforms to our padding size.
574 * The stride of the BO must be greater or equal to our padded
575 * stride. The size of the BO must accomodate the padded height. */
576 if (level->stride < util_format_get_stride(tmpl->format, level->padded_width)) {
577 BUG("BO stride %u is too small for RS engine width padding (%zu, format %s)",
578 level->stride, util_format_get_stride(tmpl->format, level->padded_width),
579 util_format_name(tmpl->format));
580 goto fail;
581 }
582 if (etna_bo_size(rsc->bo) < level->stride * level->padded_height) {
583 BUG("BO size %u is too small for RS engine height padding (%u, format %s)",
584 etna_bo_size(rsc->bo), level->stride * level->padded_height,
585 util_format_name(tmpl->format));
586 goto fail;
587 }
588
589 rsc->pending_ctx = _mesa_set_create(NULL, _mesa_hash_pointer,
590 _mesa_key_pointer_equal);
591 if (!rsc->pending_ctx)
592 goto fail;
593
594 if (rsc->layout == ETNA_LAYOUT_LINEAR) {
595 /*
596 * Both sampler and pixel pipes can't handle linear, create a compatible
597 * base resource, where we can attach the imported buffer as an external
598 * resource.
599 */
600 struct pipe_resource tiled_templat = *tmpl;
601
602 /*
603 * Remove BIND_SCANOUT to avoid recursion, as etna_resource_create uses
604 * this function to import the scanout buffer and get a tiled resource.
605 */
606 tiled_templat.bind &= ~PIPE_BIND_SCANOUT;
607
608 ptiled = etna_resource_create(pscreen, &tiled_templat);
609 if (!ptiled)
610 goto fail;
611
612 etna_resource(ptiled)->external = prsc;
613
614 return ptiled;
615 }
616
617 return prsc;
618
619 fail:
620 etna_resource_destroy(pscreen, prsc);
621 if (ptiled)
622 etna_resource_destroy(pscreen, ptiled);
623
624 return NULL;
625 }
626
627 static bool
628 etna_resource_get_handle(struct pipe_screen *pscreen,
629 struct pipe_context *pctx,
630 struct pipe_resource *prsc,
631 struct winsys_handle *handle, unsigned usage)
632 {
633 struct etna_resource *rsc = etna_resource(prsc);
634 /* Scanout is always attached to the base resource */
635 struct renderonly_scanout *scanout = rsc->scanout;
636
637 /*
638 * External resources are preferred, so a import->export chain of
639 * render/sampler incompatible buffers yield the same handle.
640 */
641 if (rsc->external)
642 rsc = etna_resource(rsc->external);
643
644 handle->stride = rsc->levels[0].stride;
645 handle->offset = rsc->levels[0].offset;
646 handle->modifier = layout_to_modifier(rsc->layout);
647
648 if (handle->type == WINSYS_HANDLE_TYPE_SHARED) {
649 return etna_bo_get_name(rsc->bo, &handle->handle) == 0;
650 } else if (handle->type == WINSYS_HANDLE_TYPE_KMS) {
651 if (renderonly_get_handle(scanout, handle)) {
652 return true;
653 } else {
654 handle->handle = etna_bo_handle(rsc->bo);
655 return true;
656 }
657 } else if (handle->type == WINSYS_HANDLE_TYPE_FD) {
658 handle->handle = etna_bo_dmabuf(rsc->bo);
659 return true;
660 } else {
661 return false;
662 }
663 }
664
665 void
666 etna_resource_used(struct etna_context *ctx, struct pipe_resource *prsc,
667 enum etna_resource_status status)
668 {
669 struct etna_screen *screen = ctx->screen;
670 struct etna_resource *rsc;
671
672 if (!prsc)
673 return;
674
675 rsc = etna_resource(prsc);
676
677 mtx_lock(&screen->lock);
678
679 /*
680 * if we are pending read or write by any other context or
681 * if reading a resource pending a write, then
682 * flush all the contexts to maintain coherency
683 */
684 if (((status & ETNA_PENDING_WRITE) && rsc->status) ||
685 ((status & ETNA_PENDING_READ) && (rsc->status & ETNA_PENDING_WRITE))) {
686 set_foreach(rsc->pending_ctx, entry) {
687 struct etna_context *extctx = (struct etna_context *)entry->key;
688 struct pipe_context *pctx = &extctx->base;
689
690 if (extctx == ctx)
691 continue;
692
693 pctx->flush(pctx, NULL, 0);
694 /* It's safe to clear the status here. If we need to flush it means
695 * either another context had the resource in exclusive (write) use,
696 * or we transition the resource to exclusive use in our context.
697 * In both cases the new status accurately reflects the resource use
698 * after the flush.
699 */
700 rsc->status = 0;
701 }
702 }
703
704 rsc->status |= status;
705
706 _mesa_set_add(screen->used_resources, rsc);
707 _mesa_set_add(rsc->pending_ctx, ctx);
708
709 mtx_unlock(&screen->lock);
710 }
711
712 bool
713 etna_resource_has_valid_ts(struct etna_resource *rsc)
714 {
715 if (!rsc->ts_bo)
716 return false;
717
718 for (int level = 0; level <= rsc->base.last_level; level++)
719 if (rsc->levels[level].ts_valid)
720 return true;
721
722 return false;
723 }
724
725 void
726 etna_resource_screen_init(struct pipe_screen *pscreen)
727 {
728 pscreen->can_create_resource = etna_screen_can_create_resource;
729 pscreen->resource_create = etna_resource_create;
730 pscreen->resource_create_with_modifiers = etna_resource_create_modifiers;
731 pscreen->resource_from_handle = etna_resource_from_handle;
732 pscreen->resource_get_handle = etna_resource_get_handle;
733 pscreen->resource_changed = etna_resource_changed;
734 pscreen->resource_destroy = etna_resource_destroy;
735 }