2 * Copyright (c) 2012-2015 Etnaviv Project
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sub license,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the
12 * next paragraph) shall be included in all copies or substantial portions
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
24 * Wladimir J. van der Laan <laanwj@gmail.com>
27 #include "etnaviv_resource.h"
29 #include "hw/common.xml.h"
31 #include "etnaviv_context.h"
32 #include "etnaviv_debug.h"
33 #include "etnaviv_screen.h"
34 #include "etnaviv_translate.h"
36 #include "util/hash_table.h"
37 #include "util/u_inlines.h"
38 #include "util/u_memory.h"
40 #include "drm-uapi/drm_fourcc.h"
42 static enum etna_surface_layout
modifier_to_layout(uint64_t modifier
)
45 case DRM_FORMAT_MOD_VIVANTE_TILED
:
46 return ETNA_LAYOUT_TILED
;
47 case DRM_FORMAT_MOD_VIVANTE_SUPER_TILED
:
48 return ETNA_LAYOUT_SUPER_TILED
;
49 case DRM_FORMAT_MOD_VIVANTE_SPLIT_TILED
:
50 return ETNA_LAYOUT_MULTI_TILED
;
51 case DRM_FORMAT_MOD_VIVANTE_SPLIT_SUPER_TILED
:
52 return ETNA_LAYOUT_MULTI_SUPERTILED
;
53 case DRM_FORMAT_MOD_LINEAR
:
55 return ETNA_LAYOUT_LINEAR
;
59 static uint64_t layout_to_modifier(enum etna_surface_layout layout
)
62 case ETNA_LAYOUT_TILED
:
63 return DRM_FORMAT_MOD_VIVANTE_TILED
;
64 case ETNA_LAYOUT_SUPER_TILED
:
65 return DRM_FORMAT_MOD_VIVANTE_SUPER_TILED
;
66 case ETNA_LAYOUT_MULTI_TILED
:
67 return DRM_FORMAT_MOD_VIVANTE_SPLIT_TILED
;
68 case ETNA_LAYOUT_MULTI_SUPERTILED
:
69 return DRM_FORMAT_MOD_VIVANTE_SPLIT_SUPER_TILED
;
70 case ETNA_LAYOUT_LINEAR
:
71 return DRM_FORMAT_MOD_LINEAR
;
73 return DRM_FORMAT_MOD_INVALID
;
77 /* A tile is 4x4 pixels, having 'screen->specs.bits_per_tile' of tile status.
78 * So, in a buffer of N pixels, there are N / (4 * 4) tiles.
79 * We need N * screen->specs.bits_per_tile / (4 * 4) bits of tile status, or
80 * N * screen->specs.bits_per_tile / (4 * 4 * 8) bytes.
83 etna_screen_resource_alloc_ts(struct pipe_screen
*pscreen
,
84 struct etna_resource
*rsc
)
86 struct etna_screen
*screen
= etna_screen(pscreen
);
87 size_t rt_ts_size
, ts_layer_stride
;
91 ts_layer_stride
= align(DIV_ROUND_UP(rsc
->levels
[0].layer_stride
,
92 64 * 8 / screen
->specs
.bits_per_tile
),
93 0x100 * screen
->specs
.pixel_pipes
);
94 rt_ts_size
= ts_layer_stride
* rsc
->base
.array_size
;
98 DBG_F(ETNA_DBG_RESOURCE_MSGS
, "%p: Allocating tile status of size %zu",
101 struct etna_bo
*rt_ts
;
102 rt_ts
= etna_bo_new(screen
->dev
, rt_ts_size
, DRM_ETNA_GEM_CACHE_WC
);
104 if (unlikely(!rt_ts
)) {
105 BUG("Problem allocating tile status for resource");
110 rsc
->levels
[0].ts_offset
= 0;
111 rsc
->levels
[0].ts_layer_stride
= ts_layer_stride
;
112 rsc
->levels
[0].ts_size
= rt_ts_size
;
114 /* It is important to initialize the TS, as random pattern
115 * can result in crashes. Do this on the CPU as this only happens once
116 * per surface anyway and it's a small area, so it may not be worth
117 * queuing this to the GPU. */
118 void *ts_map
= etna_bo_map(rt_ts
);
119 memset(ts_map
, screen
->specs
.ts_clear_value
, rt_ts_size
);
125 etna_screen_can_create_resource(struct pipe_screen
*pscreen
,
126 const struct pipe_resource
*templat
)
128 struct etna_screen
*screen
= etna_screen(pscreen
);
129 if (!translate_samples_to_xyscale(templat
->nr_samples
, NULL
, NULL
, NULL
))
132 /* templat->bind is not set here, so we must use the minimum sizes */
134 MIN2(screen
->specs
.max_rendertarget_size
, screen
->specs
.max_texture_size
);
136 if (templat
->width0
> max_size
|| templat
->height0
> max_size
)
143 setup_miptree(struct etna_resource
*rsc
, unsigned paddingX
, unsigned paddingY
,
144 unsigned msaa_xscale
, unsigned msaa_yscale
)
146 struct pipe_resource
*prsc
= &rsc
->base
;
147 unsigned level
, size
= 0;
148 unsigned width
= prsc
->width0
;
149 unsigned height
= prsc
->height0
;
150 unsigned depth
= prsc
->depth0
;
152 for (level
= 0; level
<= prsc
->last_level
; level
++) {
153 struct etna_resource_level
*mip
= &rsc
->levels
[level
];
156 mip
->height
= height
;
157 mip
->padded_width
= align(width
* msaa_xscale
, paddingX
);
158 mip
->padded_height
= align(height
* msaa_yscale
, paddingY
);
159 mip
->stride
= util_format_get_stride(prsc
->format
, mip
->padded_width
);
161 mip
->layer_stride
= mip
->stride
* util_format_get_nblocksy(prsc
->format
, mip
->padded_height
);
162 mip
->size
= prsc
->array_size
* mip
->layer_stride
;
164 /* align levels to 64 bytes to be able to render to them */
165 size
+= align(mip
->size
, ETNA_PE_ALIGNMENT
) * depth
;
167 width
= u_minify(width
, 1);
168 height
= u_minify(height
, 1);
169 depth
= u_minify(depth
, 1);
175 /* Is rs alignment needed? */
176 static bool is_rs_align(struct etna_screen
*screen
,
177 const struct pipe_resource
*tmpl
)
179 return screen
->specs
.use_blt
? false : (
180 VIV_FEATURE(screen
, chipMinorFeatures1
, TEXTURE_HALIGN
) ||
181 !etna_resource_sampler_only(tmpl
));
184 /* Create a new resource object, using the given template info */
185 struct pipe_resource
*
186 etna_resource_alloc(struct pipe_screen
*pscreen
, unsigned layout
,
187 enum etna_resource_addressing_mode mode
, uint64_t modifier
,
188 const struct pipe_resource
*templat
)
190 struct etna_screen
*screen
= etna_screen(pscreen
);
191 struct etna_resource
*rsc
;
194 DBG_F(ETNA_DBG_RESOURCE_MSGS
,
195 "target=%d, format=%s, %ux%ux%u, array_size=%u, "
196 "last_level=%u, nr_samples=%u, usage=%u, bind=%x, flags=%x",
197 templat
->target
, util_format_name(templat
->format
), templat
->width0
,
198 templat
->height0
, templat
->depth0
, templat
->array_size
,
199 templat
->last_level
, templat
->nr_samples
, templat
->usage
,
200 templat
->bind
, templat
->flags
);
202 /* Determine scaling for antialiasing, allow override using debug flag */
203 int nr_samples
= templat
->nr_samples
;
204 if ((templat
->bind
& (PIPE_BIND_RENDER_TARGET
| PIPE_BIND_DEPTH_STENCIL
)) &&
205 !(templat
->bind
& PIPE_BIND_SAMPLER_VIEW
)) {
206 if (DBG_ENABLED(ETNA_DBG_MSAA_2X
))
208 if (DBG_ENABLED(ETNA_DBG_MSAA_4X
))
212 int msaa_xscale
= 1, msaa_yscale
= 1;
213 if (!translate_samples_to_xyscale(nr_samples
, &msaa_xscale
, &msaa_yscale
, NULL
)) {
214 /* Number of samples not supported */
218 /* Determine needed padding (alignment of height/width) */
219 unsigned paddingX
= 0, paddingY
= 0;
220 unsigned halign
= TEXTURE_HALIGN_FOUR
;
221 if (!util_format_is_compressed(templat
->format
)) {
222 /* If we have the TEXTURE_HALIGN feature, we can always align to the
223 * resolve engine's width. If not, we must not align resources used
224 * only for textures. If this GPU uses the BLT engine, never do RS align.
226 etna_layout_multiple(layout
, screen
->specs
.pixel_pipes
,
227 is_rs_align (screen
, templat
),
228 &paddingX
, &paddingY
, &halign
);
229 assert(paddingX
&& paddingY
);
231 /* Compressed textures are padded to their block size, but we don't have
232 * to do anything special for that. */
237 if (!screen
->specs
.use_blt
&& templat
->target
!= PIPE_BUFFER
)
238 etna_adjust_rs_align(screen
->specs
.pixel_pipes
, NULL
, &paddingY
);
240 if (templat
->bind
& PIPE_BIND_SCANOUT
&& screen
->ro
->kms_fd
>= 0) {
241 struct pipe_resource scanout_templat
= *templat
;
242 struct renderonly_scanout
*scanout
;
243 struct winsys_handle handle
;
245 /* pad scanout buffer size to be compatible with the RS */
246 if (!screen
->specs
.use_blt
&& modifier
== DRM_FORMAT_MOD_LINEAR
)
247 etna_adjust_rs_align(screen
->specs
.pixel_pipes
, &paddingX
, &paddingY
);
249 scanout_templat
.width0
= align(scanout_templat
.width0
, paddingX
);
250 scanout_templat
.height0
= align(scanout_templat
.height0
, paddingY
);
252 scanout
= renderonly_scanout_for_resource(&scanout_templat
,
253 screen
->ro
, &handle
);
257 assert(handle
.type
== WINSYS_HANDLE_TYPE_FD
);
258 handle
.modifier
= modifier
;
259 rsc
= etna_resource(pscreen
->resource_from_handle(pscreen
, templat
,
261 PIPE_HANDLE_USAGE_FRAMEBUFFER_WRITE
));
262 close(handle
.handle
);
266 rsc
->scanout
= scanout
;
271 rsc
= CALLOC_STRUCT(etna_resource
);
275 rsc
->base
= *templat
;
276 rsc
->base
.screen
= pscreen
;
277 rsc
->base
.nr_samples
= nr_samples
;
278 rsc
->layout
= layout
;
279 rsc
->halign
= halign
;
280 rsc
->addressing_mode
= mode
;
282 pipe_reference_init(&rsc
->base
.reference
, 1);
284 size
= setup_miptree(rsc
, paddingX
, paddingY
, msaa_xscale
, msaa_yscale
);
286 uint32_t flags
= DRM_ETNA_GEM_CACHE_WC
;
287 if (templat
->bind
& PIPE_BIND_VERTEX_BUFFER
)
288 flags
|= DRM_ETNA_GEM_FORCE_MMU
;
289 struct etna_bo
*bo
= etna_bo_new(screen
->dev
, size
, flags
);
290 if (unlikely(bo
== NULL
)) {
291 BUG("Problem allocating video memory for resource");
296 rsc
->ts_bo
= 0; /* TS is only created when first bound to surface */
298 if (DBG_ENABLED(ETNA_DBG_ZERO
)) {
299 void *map
= etna_bo_map(bo
);
300 memset(map
, 0, size
);
303 rsc
->pending_ctx
= _mesa_set_create(NULL
, _mesa_hash_pointer
,
304 _mesa_key_pointer_equal
);
305 if (!rsc
->pending_ctx
)
315 static struct pipe_resource
*
316 etna_resource_create(struct pipe_screen
*pscreen
,
317 const struct pipe_resource
*templat
)
319 struct etna_screen
*screen
= etna_screen(pscreen
);
321 /* Figure out what tiling and address mode to use -- for now, assume that
322 * texture cannot be linear. there is a capability LINEAR_TEXTURE_SUPPORT
323 * (supported on gc880 and gc2000 at least), but not sure how it works.
324 * Buffers always have LINEAR layout.
326 unsigned layout
= ETNA_LAYOUT_LINEAR
;
327 enum etna_resource_addressing_mode mode
= ETNA_ADDRESSING_MODE_TILED
;
329 if (etna_resource_sampler_only(templat
)) {
330 /* The buffer is only used for texturing, so create something
331 * directly compatible with the sampler. Such a buffer can
332 * never be rendered to. */
333 layout
= ETNA_LAYOUT_TILED
;
335 if (util_format_is_compressed(templat
->format
))
336 layout
= ETNA_LAYOUT_LINEAR
;
337 } else if (templat
->target
!= PIPE_BUFFER
) {
338 bool want_multitiled
= false;
339 bool want_supertiled
= screen
->specs
.can_supertile
;
341 /* When this GPU supports single-buffer rendering, don't ever enable
342 * multi-tiling. This replicates the blob behavior on GC3000.
344 if (!screen
->specs
.single_buffer
)
345 want_multitiled
= screen
->specs
.pixel_pipes
> 1;
347 /* Keep single byte blocksized resources as tiled, since we
348 * are unable to use the RS blit to de-tile them. However,
349 * if they're used as a render target or depth/stencil, they
350 * must be multi-tiled for GPUs with multiple pixel pipes.
351 * Ignore depth/stencil here, but it is an error for a render
354 if (util_format_get_blocksize(templat
->format
) == 1 &&
355 !(templat
->bind
& PIPE_BIND_DEPTH_STENCIL
)) {
356 assert(!(templat
->bind
& PIPE_BIND_RENDER_TARGET
&& want_multitiled
));
357 want_multitiled
= want_supertiled
= false;
360 layout
= ETNA_LAYOUT_BIT_TILE
;
362 layout
|= ETNA_LAYOUT_BIT_MULTI
;
364 layout
|= ETNA_LAYOUT_BIT_SUPER
;
367 if (templat
->target
== PIPE_TEXTURE_3D
)
368 layout
= ETNA_LAYOUT_LINEAR
;
370 /* modifier is only used for scanout surfaces, so safe to use LINEAR here */
371 return etna_resource_alloc(pscreen
, layout
, mode
, DRM_FORMAT_MOD_LINEAR
, templat
);
374 enum modifier_priority
{
375 MODIFIER_PRIORITY_INVALID
= 0,
376 MODIFIER_PRIORITY_LINEAR
,
377 MODIFIER_PRIORITY_SPLIT_TILED
,
378 MODIFIER_PRIORITY_SPLIT_SUPER_TILED
,
379 MODIFIER_PRIORITY_TILED
,
380 MODIFIER_PRIORITY_SUPER_TILED
,
383 const uint64_t priority_to_modifier
[] = {
384 [MODIFIER_PRIORITY_INVALID
] = DRM_FORMAT_MOD_INVALID
,
385 [MODIFIER_PRIORITY_LINEAR
] = DRM_FORMAT_MOD_LINEAR
,
386 [MODIFIER_PRIORITY_SPLIT_TILED
] = DRM_FORMAT_MOD_VIVANTE_SPLIT_TILED
,
387 [MODIFIER_PRIORITY_SPLIT_SUPER_TILED
] = DRM_FORMAT_MOD_VIVANTE_SPLIT_SUPER_TILED
,
388 [MODIFIER_PRIORITY_TILED
] = DRM_FORMAT_MOD_VIVANTE_TILED
,
389 [MODIFIER_PRIORITY_SUPER_TILED
] = DRM_FORMAT_MOD_VIVANTE_SUPER_TILED
,
393 select_best_modifier(const struct etna_screen
* screen
,
394 const uint64_t *modifiers
, const unsigned count
)
396 enum modifier_priority prio
= MODIFIER_PRIORITY_INVALID
;
398 for (int i
= 0; i
< count
; i
++) {
399 switch (modifiers
[i
]) {
400 case DRM_FORMAT_MOD_VIVANTE_SUPER_TILED
:
401 if ((screen
->specs
.pixel_pipes
> 1 && !screen
->specs
.single_buffer
) ||
402 !screen
->specs
.can_supertile
)
404 prio
= MAX2(prio
, MODIFIER_PRIORITY_SUPER_TILED
);
406 case DRM_FORMAT_MOD_VIVANTE_TILED
:
407 if (screen
->specs
.pixel_pipes
> 1 && !screen
->specs
.single_buffer
)
409 prio
= MAX2(prio
, MODIFIER_PRIORITY_TILED
);
411 case DRM_FORMAT_MOD_VIVANTE_SPLIT_SUPER_TILED
:
412 if ((screen
->specs
.pixel_pipes
< 2) || !screen
->specs
.can_supertile
)
414 prio
= MAX2(prio
, MODIFIER_PRIORITY_SPLIT_SUPER_TILED
);
416 case DRM_FORMAT_MOD_VIVANTE_SPLIT_TILED
:
417 if (screen
->specs
.pixel_pipes
< 2)
419 prio
= MAX2(prio
, MODIFIER_PRIORITY_SPLIT_TILED
);
421 case DRM_FORMAT_MOD_LINEAR
:
422 prio
= MAX2(prio
, MODIFIER_PRIORITY_LINEAR
);
424 case DRM_FORMAT_MOD_INVALID
:
430 return priority_to_modifier
[prio
];
433 static struct pipe_resource
*
434 etna_resource_create_modifiers(struct pipe_screen
*pscreen
,
435 const struct pipe_resource
*templat
,
436 const uint64_t *modifiers
, int count
)
438 struct etna_screen
*screen
= etna_screen(pscreen
);
439 struct pipe_resource tmpl
= *templat
;
440 uint64_t modifier
= select_best_modifier(screen
, modifiers
, count
);
442 if (modifier
== DRM_FORMAT_MOD_INVALID
)
446 * We currently assume that all buffers allocated through this interface
447 * should be scanout enabled.
449 tmpl
.bind
|= PIPE_BIND_SCANOUT
;
451 return etna_resource_alloc(pscreen
, modifier_to_layout(modifier
),
452 ETNA_ADDRESSING_MODE_TILED
, modifier
, &tmpl
);
456 etna_resource_changed(struct pipe_screen
*pscreen
, struct pipe_resource
*prsc
)
458 struct etna_resource
*res
= etna_resource(prsc
);
461 etna_resource(res
->external
)->seqno
++;
467 etna_resource_destroy(struct pipe_screen
*pscreen
, struct pipe_resource
*prsc
)
469 struct etna_screen
*screen
= etna_screen(pscreen
);
470 struct etna_resource
*rsc
= etna_resource(prsc
);
472 mtx_lock(&screen
->lock
);
473 _mesa_set_remove_key(screen
->used_resources
, rsc
);
474 _mesa_set_destroy(rsc
->pending_ctx
, NULL
);
475 mtx_unlock(&screen
->lock
);
478 etna_bo_del(rsc
->bo
);
481 etna_bo_del(rsc
->ts_bo
);
484 renderonly_scanout_destroy(rsc
->scanout
, etna_screen(pscreen
)->ro
);
486 pipe_resource_reference(&rsc
->texture
, NULL
);
487 pipe_resource_reference(&rsc
->external
, NULL
);
489 for (unsigned i
= 0; i
< ETNA_NUM_LOD
; i
++)
490 FREE(rsc
->levels
[i
].patch_offsets
);
495 static struct pipe_resource
*
496 etna_resource_from_handle(struct pipe_screen
*pscreen
,
497 const struct pipe_resource
*tmpl
,
498 struct winsys_handle
*handle
, unsigned usage
)
500 struct etna_screen
*screen
= etna_screen(pscreen
);
501 struct etna_resource
*rsc
;
502 struct etna_resource_level
*level
;
503 struct pipe_resource
*prsc
;
504 struct pipe_resource
*ptiled
= NULL
;
506 DBG("target=%d, format=%s, %ux%ux%u, array_size=%u, last_level=%u, "
507 "nr_samples=%u, usage=%u, bind=%x, flags=%x",
508 tmpl
->target
, util_format_name(tmpl
->format
), tmpl
->width0
,
509 tmpl
->height0
, tmpl
->depth0
, tmpl
->array_size
, tmpl
->last_level
,
510 tmpl
->nr_samples
, tmpl
->usage
, tmpl
->bind
, tmpl
->flags
);
512 rsc
= CALLOC_STRUCT(etna_resource
);
516 level
= &rsc
->levels
[0];
521 pipe_reference_init(&prsc
->reference
, 1);
522 prsc
->screen
= pscreen
;
524 rsc
->bo
= etna_screen_bo_from_handle(pscreen
, handle
, &level
->stride
);
529 rsc
->layout
= modifier_to_layout(handle
->modifier
);
530 rsc
->halign
= TEXTURE_HALIGN_FOUR
;
531 rsc
->addressing_mode
= ETNA_ADDRESSING_MODE_TILED
;
534 level
->width
= tmpl
->width0
;
535 level
->height
= tmpl
->height0
;
537 /* Determine padding of the imported resource. */
538 unsigned paddingX
= 0, paddingY
= 0;
539 etna_layout_multiple(rsc
->layout
, screen
->specs
.pixel_pipes
,
540 is_rs_align(screen
, tmpl
),
541 &paddingX
, &paddingY
, &rsc
->halign
);
543 if (!screen
->specs
.use_blt
)
544 etna_adjust_rs_align(screen
->specs
.pixel_pipes
, NULL
, &paddingY
);
545 level
->padded_width
= align(level
->width
, paddingX
);
546 level
->padded_height
= align(level
->height
, paddingY
);
548 level
->layer_stride
= level
->stride
* util_format_get_nblocksy(prsc
->format
,
549 level
->padded_height
);
550 level
->size
= level
->layer_stride
;
552 /* The DDX must give us a BO which conforms to our padding size.
553 * The stride of the BO must be greater or equal to our padded
554 * stride. The size of the BO must accomodate the padded height. */
555 if (level
->stride
< util_format_get_stride(tmpl
->format
, level
->padded_width
)) {
556 BUG("BO stride %u is too small for RS engine width padding (%zu, format %s)",
557 level
->stride
, util_format_get_stride(tmpl
->format
, level
->padded_width
),
558 util_format_name(tmpl
->format
));
561 if (etna_bo_size(rsc
->bo
) < level
->stride
* level
->padded_height
) {
562 BUG("BO size %u is too small for RS engine height padding (%u, format %s)",
563 etna_bo_size(rsc
->bo
), level
->stride
* level
->padded_height
,
564 util_format_name(tmpl
->format
));
568 rsc
->pending_ctx
= _mesa_set_create(NULL
, _mesa_hash_pointer
,
569 _mesa_key_pointer_equal
);
570 if (!rsc
->pending_ctx
)
573 if (rsc
->layout
== ETNA_LAYOUT_LINEAR
) {
575 * Both sampler and pixel pipes can't handle linear, create a compatible
576 * base resource, where we can attach the imported buffer as an external
579 struct pipe_resource tiled_templat
= *tmpl
;
582 * Remove BIND_SCANOUT to avoid recursion, as etna_resource_create uses
583 * this function to import the scanout buffer and get a tiled resource.
585 tiled_templat
.bind
&= ~PIPE_BIND_SCANOUT
;
587 ptiled
= etna_resource_create(pscreen
, &tiled_templat
);
591 etna_resource(ptiled
)->external
= prsc
;
599 etna_resource_destroy(pscreen
, prsc
);
601 etna_resource_destroy(pscreen
, ptiled
);
607 etna_resource_get_handle(struct pipe_screen
*pscreen
,
608 struct pipe_context
*pctx
,
609 struct pipe_resource
*prsc
,
610 struct winsys_handle
*handle
, unsigned usage
)
612 struct etna_resource
*rsc
= etna_resource(prsc
);
613 /* Scanout is always attached to the base resource */
614 struct renderonly_scanout
*scanout
= rsc
->scanout
;
617 * External resources are preferred, so a import->export chain of
618 * render/sampler incompatible buffers yield the same handle.
621 rsc
= etna_resource(rsc
->external
);
623 handle
->stride
= rsc
->levels
[0].stride
;
624 handle
->offset
= rsc
->levels
[0].offset
;
625 handle
->modifier
= layout_to_modifier(rsc
->layout
);
627 if (handle
->type
== WINSYS_HANDLE_TYPE_SHARED
) {
628 return etna_bo_get_name(rsc
->bo
, &handle
->handle
) == 0;
629 } else if (handle
->type
== WINSYS_HANDLE_TYPE_KMS
) {
630 if (renderonly_get_handle(scanout
, handle
)) {
633 handle
->handle
= etna_bo_handle(rsc
->bo
);
636 } else if (handle
->type
== WINSYS_HANDLE_TYPE_FD
) {
637 handle
->handle
= etna_bo_dmabuf(rsc
->bo
);
645 etna_resource_used(struct etna_context
*ctx
, struct pipe_resource
*prsc
,
646 enum etna_resource_status status
)
648 struct etna_screen
*screen
= ctx
->screen
;
649 struct etna_resource
*rsc
;
654 rsc
= etna_resource(prsc
);
656 mtx_lock(&screen
->lock
);
659 * if we are pending read or write by any other context or
660 * if reading a resource pending a write, then
661 * flush all the contexts to maintain coherency
663 if (((status
& ETNA_PENDING_WRITE
) && rsc
->status
) ||
664 ((status
& ETNA_PENDING_READ
) && (rsc
->status
& ETNA_PENDING_WRITE
))) {
665 set_foreach(rsc
->pending_ctx
, entry
) {
666 struct etna_context
*extctx
= (struct etna_context
*)entry
->key
;
667 struct pipe_context
*pctx
= &extctx
->base
;
672 pctx
->flush(pctx
, NULL
, 0);
673 /* It's safe to clear the status here. If we need to flush it means
674 * either another context had the resource in exclusive (write) use,
675 * or we transition the resource to exclusive use in our context.
676 * In both cases the new status accurately reflects the resource use
683 rsc
->status
|= status
;
685 _mesa_set_add(screen
->used_resources
, rsc
);
686 _mesa_set_add(rsc
->pending_ctx
, ctx
);
688 mtx_unlock(&screen
->lock
);
692 etna_resource_has_valid_ts(struct etna_resource
*rsc
)
697 for (int level
= 0; level
<= rsc
->base
.last_level
; level
++)
698 if (rsc
->levels
[level
].ts_valid
)
705 etna_resource_screen_init(struct pipe_screen
*pscreen
)
707 pscreen
->can_create_resource
= etna_screen_can_create_resource
;
708 pscreen
->resource_create
= etna_resource_create
;
709 pscreen
->resource_create_with_modifiers
= etna_resource_create_modifiers
;
710 pscreen
->resource_from_handle
= etna_resource_from_handle
;
711 pscreen
->resource_get_handle
= etna_resource_get_handle
;
712 pscreen
->resource_changed
= etna_resource_changed
;
713 pscreen
->resource_destroy
= etna_resource_destroy
;