src/gallium/drivers/etnaviv/etnaviv_surface.c

   1 /*
   2  * Copyright (c) 2012-2013 Etnaviv Project
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sub license,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the
  12  * next paragraph) shall be included in all copies or substantial portions
  13  * of the Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  21  * DEALINGS IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *    Wladimir J. van der Laan <laanwj@gmail.com>
  25  */
  26
  27 #include "etnaviv_surface.h"
  28 #include "etnaviv_screen.h"
  29
  30 #include "etnaviv_clear_blit.h"
  31 #include "etnaviv_context.h"
  32 #include "etnaviv_translate.h"
  33 #include "pipe/p_defines.h"
  34 #include "pipe/p_state.h"
  35 #include "util/u_inlines.h"
  36 #include "util/u_memory.h"
  37
  38 #include "hw/common.xml.h"
  39
  40 static struct pipe_surface *
  41 etna_create_surface(struct pipe_context *pctx, struct pipe_resource *prsc,
  42                     const struct pipe_surface *templat)
  43 {
  44    struct etna_context *ctx = etna_context(pctx);
  45    struct etna_resource *rsc = etna_resource(prsc);
  46    struct etna_surface *surf = CALLOC_STRUCT(etna_surface);
  47
  48    if (!surf)
  49       return NULL;
  50
  51    assert(templat->u.tex.first_layer == templat->u.tex.last_layer);
  52    unsigned layer = templat->u.tex.first_layer;
  53    unsigned level = templat->u.tex.level;
  54    assert(layer < rsc->base.array_size);
  55
  56    surf->base.context = pctx;
  57
  58    pipe_reference_init(&surf->base.reference, 1);
  59    pipe_resource_reference(&surf->base.texture, &rsc->base);
  60
  61    /* Allocate a TS for the resource if there isn't one yet,
  62     * and it is allowed by the hw (width is a multiple of 16).
  63     * Avoid doing this for GPUs with MC1.0, as kernel sources
  64     * indicate the tile status module bypasses the memory
  65     * offset and MMU. */
  66
  67    if (VIV_FEATURE(ctx->screen, chipFeatures, FAST_CLEAR) &&
  68        VIV_FEATURE(ctx->screen, chipMinorFeatures0, MC20) &&
  69        !rsc->ts_bo &&
  70        (rsc->levels[level].padded_width & ETNA_RS_WIDTH_MASK) == 0 &&
  71        (rsc->levels[level].padded_height & ETNA_RS_HEIGHT_MASK) == 0) {
  72       etna_screen_resource_alloc_ts(pctx->screen, rsc);
  73    }
  74
  75    surf->base.texture = &rsc->base;
  76    surf->base.format = rsc->base.format;
  77    surf->base.width = rsc->levels[level].width;
  78    surf->base.height = rsc->levels[level].height;
  79    surf->base.writable = templat->writable; /* what is this for anyway */
  80    surf->base.u = templat->u;
  81
  82    surf->level = &rsc->levels[level]; /* Keep pointer to actual level to set
  83                                        * clear color on underlying resource
  84                                        * instead of surface */
  85    surf->surf = rsc->levels [level];  /* Make copy of level to narrow down
  86                                        * address to layer */
  87
  88    /* XXX we don't really need a copy but it's convenient */
  89    surf->surf.offset += layer * surf->surf.layer_stride;
  90
  91    struct etna_resource_level *lev = &rsc->levels[level];
  92
  93    /* Setup template relocations for this surface */
  94    for (unsigned pipe = 0; pipe < ctx->specs.pixel_pipes; ++pipe) {
  95       surf->reloc[pipe].bo = rsc->bo;
  96       surf->reloc[pipe].offset = surf->surf.offset;
  97       surf->reloc[pipe].flags = 0;
  98    }
  99
 100    /* In single buffer mode, both pixel pipes must point to the same address,
 101     * for multi-tiled surfaces on the other hand the second pipe is expected to
 102     * point halfway the image vertically.
 103     */
 104    if (rsc->layout & ETNA_LAYOUT_BIT_MULTI)
 105       surf->reloc[1].offset = surf->surf.offset + lev->stride * lev->padded_height / 2;
 106
 107    if (surf->surf.ts_size) {
 108       unsigned int layer_offset = layer * surf->surf.ts_layer_stride;
 109       assert(layer_offset < surf->surf.ts_size);
 110
 111       surf->surf.ts_offset += layer_offset;
 112       surf->surf.ts_size -= layer_offset;
 113       surf->surf.ts_valid = false;
 114
 115       surf->ts_reloc.bo = rsc->ts_bo;
 116       surf->ts_reloc.offset = surf->surf.ts_offset;
 117       surf->ts_reloc.flags = 0;
 118
 119       if (!ctx->specs.use_blt) {
 120          /* This (ab)uses the RS as a plain buffer memset().
 121           * Currently uses a fixed row size of 64 bytes. Some benchmarking with
 122           * different sizes may be in order. */
 123          struct etna_bo *ts_bo = etna_resource(surf->base.texture)->ts_bo;
 124          etna_compile_rs_state(ctx, &surf->clear_command, &(struct rs_state) {
 125             .source_format = RS_FORMAT_A8R8G8B8,
 126             .dest_format = RS_FORMAT_A8R8G8B8,
 127             .dest = ts_bo,
 128             .dest_offset = surf->surf.ts_offset,
 129             .dest_stride = 0x40,
 130             .dest_tiling = ETNA_LAYOUT_TILED,
 131             .dither = {0xffffffff, 0xffffffff},
 132             .width = 16,
 133             .height = etna_align_up(surf->surf.ts_size / 0x40, 4),
 134             .clear_value = {ctx->specs.ts_clear_value},
 135             .clear_mode = VIVS_RS_CLEAR_CONTROL_MODE_ENABLED1,
 136             .clear_bits = 0xffff
 137          });
 138       }
 139    } else {
 140       if (!ctx->specs.use_blt)
 141          etna_rs_gen_clear_surface(ctx, surf, surf->level->clear_value);
 142    }
 143
 144    return &surf->base;
 145 }
 146
 147 static void
 148 etna_surface_destroy(struct pipe_context *pctx, struct pipe_surface *psurf)
 149 {
 150    pipe_resource_reference(&psurf->texture, NULL);
 151    FREE(psurf);
 152 }
 153
 154 void
 155 etna_surface_init(struct pipe_context *pctx)
 156 {
 157    pctx->create_surface = etna_create_surface;
 158    pctx->surface_destroy = etna_surface_destroy;
 159 }