2 * Copyright (c) 2012-2015 Etnaviv Project
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sub license,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the
12 * next paragraph) shall be included in all copies or substantial portions
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
24 * Wladimir J. van der Laan <laanwj@gmail.com>
27 #include "etnaviv_texture_state.h"
29 #include "hw/common.xml.h"
31 #include "etnaviv_clear_blit.h"
32 #include "etnaviv_context.h"
33 #include "etnaviv_emit.h"
34 #include "etnaviv_format.h"
35 #include "etnaviv_texture.h"
36 #include "etnaviv_translate.h"
37 #include "util/u_inlines.h"
38 #include "util/u_memory.h"
40 #include "drm-uapi/drm_fourcc.h"
42 struct etna_sampler_state
{
43 struct pipe_sampler_state base
;
45 /* sampler offset +4*sampler, interleave when committing state */
46 uint32_t TE_SAMPLER_CONFIG0
;
47 uint32_t TE_SAMPLER_CONFIG1
;
48 uint32_t TE_SAMPLER_LOD_CONFIG
;
49 uint32_t TE_SAMPLER_3D_CONFIG
;
50 uint32_t NTE_SAMPLER_BASELOD
;
51 unsigned min_lod
, max_lod
, max_lod_min
;
54 static inline struct etna_sampler_state
*
55 etna_sampler_state(struct pipe_sampler_state
*samp
)
57 return (struct etna_sampler_state
*)samp
;
60 struct etna_sampler_view
{
61 struct pipe_sampler_view base
;
63 /* sampler offset +4*sampler, interleave when committing state */
64 uint32_t TE_SAMPLER_CONFIG0
;
65 uint32_t TE_SAMPLER_CONFIG0_MASK
;
66 uint32_t TE_SAMPLER_CONFIG1
;
67 uint32_t TE_SAMPLER_3D_CONFIG
;
68 uint32_t TE_SAMPLER_SIZE
;
69 uint32_t TE_SAMPLER_LOG_SIZE
;
70 uint32_t TE_SAMPLER_ASTC0
;
71 uint32_t TE_SAMPLER_LINEAR_STRIDE
[VIVS_TE_SAMPLER_LINEAR_STRIDE__LEN
];
72 struct etna_reloc TE_SAMPLER_LOD_ADDR
[VIVS_TE_SAMPLER_LOD_ADDR__LEN
];
73 unsigned min_lod
, max_lod
; /* 5.5 fixp */
75 struct etna_sampler_ts ts
;
78 static inline struct etna_sampler_view
*
79 etna_sampler_view(struct pipe_sampler_view
*view
)
81 return (struct etna_sampler_view
*)view
;
85 etna_create_sampler_state_state(struct pipe_context
*pipe
,
86 const struct pipe_sampler_state
*ss
)
88 struct etna_sampler_state
*cs
= CALLOC_STRUCT(etna_sampler_state
);
89 struct etna_context
*ctx
= etna_context(pipe
);
90 struct etna_screen
*screen
= ctx
->screen
;
91 const bool ansio
= ss
->max_anisotropy
> 1;
96 cs
->TE_SAMPLER_CONFIG0
=
97 VIVS_TE_SAMPLER_CONFIG0_UWRAP(translate_texture_wrapmode(ss
->wrap_s
)) |
98 VIVS_TE_SAMPLER_CONFIG0_VWRAP(translate_texture_wrapmode(ss
->wrap_t
)) |
99 VIVS_TE_SAMPLER_CONFIG0_MIN(translate_texture_filter(ss
->min_img_filter
)) |
100 VIVS_TE_SAMPLER_CONFIG0_MIP(translate_texture_mipfilter(ss
->min_mip_filter
)) |
101 VIVS_TE_SAMPLER_CONFIG0_MAG(translate_texture_filter(ss
->mag_img_filter
)) |
102 VIVS_TE_SAMPLER_CONFIG0_ANISOTROPY(COND(ansio
, etna_log2_fixp55(ss
->max_anisotropy
)));
104 /* ROUND_UV improves precision - but not compatible with NEAREST filter */
105 if (ss
->min_img_filter
!= PIPE_TEX_FILTER_NEAREST
&&
106 ss
->mag_img_filter
!= PIPE_TEX_FILTER_NEAREST
) {
107 cs
->TE_SAMPLER_CONFIG0
|= VIVS_TE_SAMPLER_CONFIG0_ROUND_UV
;
110 cs
->TE_SAMPLER_CONFIG1
= screen
->specs
.seamless_cube_map
?
111 COND(ss
->seamless_cube_map
, VIVS_TE_SAMPLER_CONFIG1_SEAMLESS_CUBE_MAP
) : 0;
113 cs
->TE_SAMPLER_LOD_CONFIG
=
114 COND(ss
->lod_bias
!= 0.0, VIVS_TE_SAMPLER_LOD_CONFIG_BIAS_ENABLE
) |
115 VIVS_TE_SAMPLER_LOD_CONFIG_BIAS(etna_float_to_fixp55(ss
->lod_bias
));
117 cs
->TE_SAMPLER_3D_CONFIG
=
118 VIVS_TE_SAMPLER_3D_CONFIG_WRAP(translate_texture_wrapmode(ss
->wrap_r
));
120 if (ss
->min_mip_filter
!= PIPE_TEX_MIPFILTER_NONE
) {
121 cs
->min_lod
= etna_float_to_fixp55(ss
->min_lod
);
122 cs
->max_lod
= etna_float_to_fixp55(ss
->max_lod
);
124 /* when not mipmapping, we need to set max/min lod so that always
125 * lowest LOD is selected */
126 cs
->min_lod
= cs
->max_lod
= etna_float_to_fixp55(ss
->min_lod
);
129 /* if max_lod is 0, MIN filter will never be used (GC3000)
130 * when min filter is different from mag filter, we need HW to compute LOD
131 * the workaround is to set max_lod to at least 1
133 cs
->max_lod_min
= (ss
->min_img_filter
!= ss
->mag_img_filter
) ? 1 : 0;
135 cs
->NTE_SAMPLER_BASELOD
=
136 COND(ss
->compare_mode
, VIVS_NTE_SAMPLER_BASELOD_COMPARE_ENABLE
) |
137 VIVS_NTE_SAMPLER_BASELOD_COMPARE_FUNC(translate_texture_compare(ss
->compare_func
));
143 etna_delete_sampler_state_state(struct pipe_context
*pctx
, void *ss
)
148 static struct pipe_sampler_view
*
149 etna_create_sampler_view_state(struct pipe_context
*pctx
, struct pipe_resource
*prsc
,
150 const struct pipe_sampler_view
*so
)
152 struct etna_sampler_view
*sv
= CALLOC_STRUCT(etna_sampler_view
);
153 struct etna_context
*ctx
= etna_context(pctx
);
154 struct etna_screen
*screen
= ctx
->screen
;
155 const uint32_t format
= translate_texture_format(so
->format
);
156 const bool ext
= !!(format
& EXT_FORMAT
);
157 const bool astc
= !!(format
& ASTC_FORMAT
);
158 const bool srgb
= util_format_is_srgb(so
->format
);
159 const uint32_t swiz
= get_texture_swiz(so
->format
, so
->swizzle_r
,
160 so
->swizzle_g
, so
->swizzle_b
,
166 struct etna_resource
*res
= etna_texture_handle_incompatible(pctx
, prsc
);
173 pipe_reference_init(&sv
->base
.reference
, 1);
174 sv
->base
.texture
= NULL
;
175 pipe_resource_reference(&sv
->base
.texture
, prsc
);
176 sv
->base
.context
= pctx
;
178 /* merged with sampler state */
179 sv
->TE_SAMPLER_CONFIG0
=
180 VIVS_TE_SAMPLER_CONFIG0_TYPE(translate_texture_target(sv
->base
.target
)) |
181 COND(!ext
&& !astc
, VIVS_TE_SAMPLER_CONFIG0_FORMAT(format
));
182 sv
->TE_SAMPLER_CONFIG0_MASK
= 0xffffffff;
184 uint32_t base_height
= res
->base
.height0
;
185 uint32_t base_depth
= res
->base
.depth0
;
186 bool is_array
= false;
188 switch (sv
->base
.target
) {
189 case PIPE_TEXTURE_1D
:
190 /* use 2D texture with T wrap to repeat for 1D texture
191 * TODO: check if old HW supports 1D texture
193 sv
->TE_SAMPLER_CONFIG0_MASK
= ~VIVS_TE_SAMPLER_CONFIG0_VWRAP__MASK
;
194 sv
->TE_SAMPLER_CONFIG0
&= ~VIVS_TE_SAMPLER_CONFIG0_TYPE__MASK
;
195 sv
->TE_SAMPLER_CONFIG0
|=
196 VIVS_TE_SAMPLER_CONFIG0_TYPE(TEXTURE_TYPE_2D
) |
197 VIVS_TE_SAMPLER_CONFIG0_VWRAP(TEXTURE_WRAPMODE_REPEAT
);
199 case PIPE_TEXTURE_1D_ARRAY
:
201 base_height
= res
->base
.array_size
;
203 case PIPE_TEXTURE_2D_ARRAY
:
205 base_depth
= res
->base
.array_size
;
211 if (res
->layout
== ETNA_LAYOUT_LINEAR
&& !util_format_is_compressed(so
->format
)) {
212 sv
->TE_SAMPLER_CONFIG0
|= VIVS_TE_SAMPLER_CONFIG0_ADDRESSING_MODE(TEXTURE_ADDRESSING_MODE_LINEAR
);
214 for (int lod
= 0; lod
<= res
->base
.last_level
; ++lod
)
215 sv
->TE_SAMPLER_LINEAR_STRIDE
[lod
] = res
->levels
[lod
].stride
;
218 sv
->TE_SAMPLER_CONFIG0
|= VIVS_TE_SAMPLER_CONFIG0_ADDRESSING_MODE(TEXTURE_ADDRESSING_MODE_TILED
);
219 memset(&sv
->TE_SAMPLER_LINEAR_STRIDE
, 0, sizeof(sv
->TE_SAMPLER_LINEAR_STRIDE
));
222 sv
->TE_SAMPLER_CONFIG1
|= COND(ext
, VIVS_TE_SAMPLER_CONFIG1_FORMAT_EXT(format
)) |
223 COND(astc
, VIVS_TE_SAMPLER_CONFIG1_FORMAT_EXT(TEXTURE_FORMAT_EXT_ASTC
)) |
224 COND(is_array
, VIVS_TE_SAMPLER_CONFIG1_TEXTURE_ARRAY
) |
225 VIVS_TE_SAMPLER_CONFIG1_HALIGN(res
->halign
) | swiz
;
226 sv
->TE_SAMPLER_ASTC0
= COND(astc
, VIVS_NTE_SAMPLER_ASTC0_ASTC_FORMAT(format
)) |
227 COND(astc
&& srgb
, VIVS_NTE_SAMPLER_ASTC0_ASTC_SRGB
) |
228 VIVS_NTE_SAMPLER_ASTC0_UNK8(0xc) |
229 VIVS_NTE_SAMPLER_ASTC0_UNK16(0xc) |
230 VIVS_NTE_SAMPLER_ASTC0_UNK24(0xc);
231 sv
->TE_SAMPLER_SIZE
= VIVS_TE_SAMPLER_SIZE_WIDTH(res
->base
.width0
) |
232 VIVS_TE_SAMPLER_SIZE_HEIGHT(base_height
);
233 sv
->TE_SAMPLER_LOG_SIZE
=
234 VIVS_TE_SAMPLER_LOG_SIZE_WIDTH(etna_log2_fixp55(res
->base
.width0
)) |
235 VIVS_TE_SAMPLER_LOG_SIZE_HEIGHT(etna_log2_fixp55(base_height
)) |
236 COND(util_format_is_srgb(so
->format
) && !astc
, VIVS_TE_SAMPLER_LOG_SIZE_SRGB
) |
237 COND(astc
, VIVS_TE_SAMPLER_LOG_SIZE_ASTC
);
238 sv
->TE_SAMPLER_3D_CONFIG
=
239 VIVS_TE_SAMPLER_3D_CONFIG_DEPTH(base_depth
) |
240 VIVS_TE_SAMPLER_3D_CONFIG_LOG_DEPTH(etna_log2_fixp55(base_depth
));
242 /* Set up levels-of-detail */
243 for (int lod
= 0; lod
<= res
->base
.last_level
; ++lod
) {
244 sv
->TE_SAMPLER_LOD_ADDR
[lod
].bo
= res
->bo
;
245 sv
->TE_SAMPLER_LOD_ADDR
[lod
].offset
= res
->levels
[lod
].offset
;
246 sv
->TE_SAMPLER_LOD_ADDR
[lod
].flags
= ETNA_RELOC_READ
;
248 sv
->min_lod
= sv
->base
.u
.tex
.first_level
<< 5;
249 sv
->max_lod
= MIN2(sv
->base
.u
.tex
.last_level
, res
->base
.last_level
) << 5;
251 /* Workaround for npot textures -- it appears that only CLAMP_TO_EDGE is
252 * supported when the appropriate capability is not set. */
253 if (!screen
->specs
.npot_tex_any_wrap
&&
254 (!util_is_power_of_two_or_zero(res
->base
.width0
) ||
255 !util_is_power_of_two_or_zero(res
->base
.height0
))) {
256 sv
->TE_SAMPLER_CONFIG0_MASK
= ~(VIVS_TE_SAMPLER_CONFIG0_UWRAP__MASK
|
257 VIVS_TE_SAMPLER_CONFIG0_VWRAP__MASK
);
258 sv
->TE_SAMPLER_CONFIG0
|=
259 VIVS_TE_SAMPLER_CONFIG0_UWRAP(TEXTURE_WRAPMODE_CLAMP_TO_EDGE
) |
260 VIVS_TE_SAMPLER_CONFIG0_VWRAP(TEXTURE_WRAPMODE_CLAMP_TO_EDGE
);
267 etna_sampler_view_state_destroy(struct pipe_context
*pctx
,
268 struct pipe_sampler_view
*view
)
270 pipe_resource_reference(&view
->texture
, NULL
);
274 #define EMIT_STATE(state_name, src_value) \
275 etna_coalsence_emit(stream, &coalesce, VIVS_##state_name, src_value)
277 #define EMIT_STATE_FIXP(state_name, src_value) \
278 etna_coalsence_emit_fixp(stream, &coalesce, VIVS_##state_name, src_value)
280 #define EMIT_STATE_RELOC(state_name, src_value) \
281 etna_coalsence_emit_reloc(stream, &coalesce, VIVS_##state_name, src_value)
283 /* Emit plain (non-descriptor) texture state */
285 etna_emit_texture_state(struct etna_context
*ctx
)
287 struct etna_cmd_stream
*stream
= ctx
->stream
;
288 struct etna_screen
*screen
= ctx
->screen
;
289 uint32_t active_samplers
= active_samplers_bits(ctx
);
290 uint32_t dirty
= ctx
->dirty
;
291 struct etna_coalesce coalesce
;
293 etna_coalesce_start(stream
, &coalesce
);
295 if (unlikely(dirty
& ETNA_DIRTY_SAMPLER_VIEWS
)) {
296 for (int x
= 0; x
< VIVS_TS_SAMPLER__LEN
; ++x
) {
297 if ((1 << x
) & active_samplers
) {
298 struct etna_sampler_view
*sv
= etna_sampler_view(ctx
->sampler_view
[x
]);
299 /*01720*/ EMIT_STATE(TS_SAMPLER_CONFIG(x
), sv
->ts
.TS_SAMPLER_CONFIG
);
302 for (int x
= 0; x
< VIVS_TS_SAMPLER__LEN
; ++x
) {
303 if ((1 << x
) & active_samplers
) {
304 struct etna_sampler_view
*sv
= etna_sampler_view(ctx
->sampler_view
[x
]);
305 /*01740*/ EMIT_STATE_RELOC(TS_SAMPLER_STATUS_BASE(x
), &sv
->ts
.TS_SAMPLER_STATUS_BASE
);
308 for (int x
= 0; x
< VIVS_TS_SAMPLER__LEN
; ++x
) {
309 if ((1 << x
) & active_samplers
) {
310 struct etna_sampler_view
*sv
= etna_sampler_view(ctx
->sampler_view
[x
]);
311 /*01760*/ EMIT_STATE(TS_SAMPLER_CLEAR_VALUE(x
), sv
->ts
.TS_SAMPLER_CLEAR_VALUE
);
314 for (int x
= 0; x
< VIVS_TS_SAMPLER__LEN
; ++x
) {
315 if ((1 << x
) & active_samplers
) {
316 struct etna_sampler_view
*sv
= etna_sampler_view(ctx
->sampler_view
[x
]);
317 /*01780*/ EMIT_STATE(TS_SAMPLER_CLEAR_VALUE2(x
), sv
->ts
.TS_SAMPLER_CLEAR_VALUE2
);
321 if (unlikely(dirty
& (ETNA_DIRTY_SAMPLER_VIEWS
| ETNA_DIRTY_SAMPLERS
))) {
322 for (int x
= 0; x
< VIVS_TE_SAMPLER__LEN
; ++x
) {
323 uint32_t val
= 0; /* 0 == sampler inactive */
325 /* set active samplers to their configuration value (determined by both
326 * the sampler state and sampler view) */
327 if ((1 << x
) & active_samplers
) {
328 struct etna_sampler_state
*ss
= etna_sampler_state(ctx
->sampler
[x
]);
329 struct etna_sampler_view
*sv
= etna_sampler_view(ctx
->sampler_view
[x
]);
331 val
= (ss
->TE_SAMPLER_CONFIG0
& sv
->TE_SAMPLER_CONFIG0_MASK
) |
332 sv
->TE_SAMPLER_CONFIG0
;
335 /*02000*/ EMIT_STATE(TE_SAMPLER_CONFIG0(x
), val
);
338 if (unlikely(dirty
& (ETNA_DIRTY_SAMPLER_VIEWS
))) {
339 struct etna_sampler_state
*ss
;
340 struct etna_sampler_view
*sv
;
342 for (int x
= 0; x
< VIVS_TE_SAMPLER__LEN
; ++x
) {
343 if ((1 << x
) & active_samplers
) {
344 sv
= etna_sampler_view(ctx
->sampler_view
[x
]);
345 /*02040*/ EMIT_STATE(TE_SAMPLER_SIZE(x
), sv
->TE_SAMPLER_SIZE
);
348 for (int x
= 0; x
< VIVS_TE_SAMPLER__LEN
; ++x
) {
349 if ((1 << x
) & active_samplers
) {
350 ss
= etna_sampler_state(ctx
->sampler
[x
]);
351 sv
= etna_sampler_view(ctx
->sampler_view
[x
]);
353 if (texture_use_int_filter(&sv
->base
, &ss
->base
, false))
354 sv
->TE_SAMPLER_LOG_SIZE
|= VIVS_TE_SAMPLER_LOG_SIZE_INT_FILTER
;
356 /*02080*/ EMIT_STATE(TE_SAMPLER_LOG_SIZE(x
), sv
->TE_SAMPLER_LOG_SIZE
);
360 if (unlikely(dirty
& (ETNA_DIRTY_SAMPLER_VIEWS
| ETNA_DIRTY_SAMPLERS
))) {
361 struct etna_sampler_state
*ss
;
362 struct etna_sampler_view
*sv
;
364 for (int x
= 0; x
< VIVS_TE_SAMPLER__LEN
; ++x
) {
365 if ((1 << x
) & active_samplers
) {
366 ss
= etna_sampler_state(ctx
->sampler
[x
]);
367 sv
= etna_sampler_view(ctx
->sampler_view
[x
]);
369 unsigned max_lod
= MAX2(MIN2(ss
->max_lod
, sv
->max_lod
), ss
->max_lod_min
);
371 /* min and max lod is determined both by the sampler and the view */
372 /*020C0*/ EMIT_STATE(TE_SAMPLER_LOD_CONFIG(x
),
373 ss
->TE_SAMPLER_LOD_CONFIG
|
374 VIVS_TE_SAMPLER_LOD_CONFIG_MAX(max_lod
) |
375 VIVS_TE_SAMPLER_LOD_CONFIG_MIN(MAX2(ss
->min_lod
, sv
->min_lod
)));
378 for (int x
= 0; x
< VIVS_TE_SAMPLER__LEN
; ++x
) {
379 if ((1 << x
) & active_samplers
) {
380 ss
= etna_sampler_state(ctx
->sampler
[x
]);
381 sv
= etna_sampler_view(ctx
->sampler_view
[x
]);
383 /*02180*/ EMIT_STATE(TE_SAMPLER_3D_CONFIG(x
), ss
->TE_SAMPLER_3D_CONFIG
|
384 sv
->TE_SAMPLER_3D_CONFIG
);
387 for (int x
= 0; x
< VIVS_TE_SAMPLER__LEN
; ++x
) {
388 if ((1 << x
) & active_samplers
) {
389 ss
= etna_sampler_state(ctx
->sampler
[x
]);
390 sv
= etna_sampler_view(ctx
->sampler_view
[x
]);
392 /*021C0*/ EMIT_STATE(TE_SAMPLER_CONFIG1(x
), ss
->TE_SAMPLER_CONFIG1
|
393 sv
->TE_SAMPLER_CONFIG1
|
394 COND(sv
->ts
.enable
, VIVS_TE_SAMPLER_CONFIG1_USE_TS
));
398 if (unlikely(dirty
& (ETNA_DIRTY_SAMPLER_VIEWS
))) {
399 for (int y
= 0; y
< VIVS_TE_SAMPLER_LOD_ADDR__LEN
; ++y
) {
400 for (int x
= 0; x
< VIVS_TE_SAMPLER__LEN
; ++x
) {
401 if ((1 << x
) & active_samplers
) {
402 struct etna_sampler_view
*sv
= etna_sampler_view(ctx
->sampler_view
[x
]);
403 /*02400*/ EMIT_STATE_RELOC(TE_SAMPLER_LOD_ADDR(x
, y
),&sv
->TE_SAMPLER_LOD_ADDR
[y
]);
408 if (unlikely(dirty
& (ETNA_DIRTY_SAMPLER_VIEWS
))) {
409 for (int y
= 0; y
< VIVS_TE_SAMPLER_LINEAR_STRIDE__LEN
; ++y
) {
410 for (int x
= 0; x
< VIVS_TE_SAMPLER__LEN
; ++x
) {
411 if ((1 << x
) & active_samplers
) {
412 struct etna_sampler_view
*sv
= etna_sampler_view(ctx
->sampler_view
[x
]);
413 /*02C00*/ EMIT_STATE(TE_SAMPLER_LINEAR_STRIDE(x
, y
), sv
->TE_SAMPLER_LINEAR_STRIDE
[y
]);
418 if (unlikely(screen
->specs
.tex_astc
&& (dirty
& (ETNA_DIRTY_SAMPLER_VIEWS
)))) {
419 for (int x
= 0; x
< VIVS_TE_SAMPLER__LEN
; ++x
) {
420 if ((1 << x
) & active_samplers
) {
421 struct etna_sampler_view
*sv
= etna_sampler_view(ctx
->sampler_view
[x
]);
422 /*10500*/ EMIT_STATE(NTE_SAMPLER_ASTC0(x
), sv
->TE_SAMPLER_ASTC0
);
426 if (unlikely(screen
->specs
.halti
>= 1 && (dirty
& (ETNA_DIRTY_SAMPLER_VIEWS
)))) {
427 for (int x
= 0; x
< VIVS_TE_SAMPLER__LEN
; ++x
) {
428 if ((1 << x
) & active_samplers
) {
429 struct etna_sampler_state
*ss
= etna_sampler_state(ctx
->sampler
[x
]);
430 /*10700*/ EMIT_STATE(NTE_SAMPLER_BASELOD(x
), ss
->NTE_SAMPLER_BASELOD
);
434 etna_coalesce_end(stream
, &coalesce
);
438 #undef EMIT_STATE_FIXP
439 #undef EMIT_STATE_RELOC
441 static struct etna_sampler_ts
*
442 etna_ts_for_sampler_view_state(struct pipe_sampler_view
*pview
)
444 struct etna_sampler_view
*sv
= etna_sampler_view(pview
);
449 etna_texture_state_init(struct pipe_context
*pctx
)
451 struct etna_context
*ctx
= etna_context(pctx
);
452 DBG("etnaviv: Using state-based texturing");
453 ctx
->base
.create_sampler_state
= etna_create_sampler_state_state
;
454 ctx
->base
.delete_sampler_state
= etna_delete_sampler_state_state
;
455 ctx
->base
.create_sampler_view
= etna_create_sampler_view_state
;
456 ctx
->base
.sampler_view_destroy
= etna_sampler_view_state_destroy
;
457 ctx
->emit_texture_state
= etna_emit_texture_state
;
458 ctx
->ts_for_sampler_view
= etna_ts_for_sampler_view_state
;