etnaviv: enable texture upload memory throttling
[mesa.git] / src / gallium / drivers / etnaviv / etnaviv_translate.h
1 /*
2 * Copyright (c) 2012-2013 Etnaviv Project
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sub license,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the
12 * next paragraph) shall be included in all copies or substantial portions
13 * of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
22 */
23 /* inlined translation functions between gallium and vivante */
24 #ifndef H_TRANSLATE
25 #define H_TRANSLATE
26
27 #include "pipe/p_defines.h"
28 #include "pipe/p_format.h"
29 #include "pipe/p_state.h"
30
31 #include "etnaviv_debug.h"
32 #include "etnaviv_format.h"
33 #include "etnaviv_util.h"
34 #include "hw/cmdstream.xml.h"
35 #include "hw/common_3d.xml.h"
36 #include "hw/state.xml.h"
37 #include "hw/state_3d.xml.h"
38
39 #include "util/format/u_format.h"
40 #include "util/u_math.h"
41
42 /* Returned when there is no match of pipe value to etna value */
43 #define ETNA_NO_MATCH (~0)
44
45 static inline uint32_t
46 translate_cull_face(unsigned cull_face, unsigned front_ccw)
47 {
48 switch (cull_face) {
49 case PIPE_FACE_NONE:
50 return VIVS_PA_CONFIG_CULL_FACE_MODE_OFF;
51 case PIPE_FACE_BACK:
52 return front_ccw ? VIVS_PA_CONFIG_CULL_FACE_MODE_CW
53 : VIVS_PA_CONFIG_CULL_FACE_MODE_CCW;
54 case PIPE_FACE_FRONT:
55 return front_ccw ? VIVS_PA_CONFIG_CULL_FACE_MODE_CCW
56 : VIVS_PA_CONFIG_CULL_FACE_MODE_CW;
57 default:
58 DBG("Unhandled cull face mode %i", cull_face);
59 return ETNA_NO_MATCH;
60 }
61 }
62
63 static inline uint32_t
64 translate_polygon_mode(unsigned polygon_mode)
65 {
66 switch (polygon_mode) {
67 case PIPE_POLYGON_MODE_FILL:
68 return VIVS_PA_CONFIG_FILL_MODE_SOLID;
69 case PIPE_POLYGON_MODE_LINE:
70 return VIVS_PA_CONFIG_FILL_MODE_WIREFRAME;
71 case PIPE_POLYGON_MODE_POINT:
72 return VIVS_PA_CONFIG_FILL_MODE_POINT;
73 default:
74 DBG("Unhandled polygon mode %i", polygon_mode);
75 return ETNA_NO_MATCH;
76 }
77 }
78
79 static inline uint32_t
80 translate_stencil_mode(bool enable_0, bool enable_1)
81 {
82 if (enable_0) {
83 return enable_1 ? VIVS_PE_STENCIL_CONFIG_MODE_TWO_SIDED
84 : VIVS_PE_STENCIL_CONFIG_MODE_ONE_SIDED;
85 } else {
86 return VIVS_PE_STENCIL_CONFIG_MODE_DISABLED;
87 }
88 }
89
90 static inline uint32_t
91 translate_stencil_op(unsigned stencil_op)
92 {
93 switch (stencil_op) {
94 case PIPE_STENCIL_OP_KEEP:
95 return STENCIL_OP_KEEP;
96 case PIPE_STENCIL_OP_ZERO:
97 return STENCIL_OP_ZERO;
98 case PIPE_STENCIL_OP_REPLACE:
99 return STENCIL_OP_REPLACE;
100 case PIPE_STENCIL_OP_INCR:
101 return STENCIL_OP_INCR;
102 case PIPE_STENCIL_OP_DECR:
103 return STENCIL_OP_DECR;
104 case PIPE_STENCIL_OP_INCR_WRAP:
105 return STENCIL_OP_INCR_WRAP;
106 case PIPE_STENCIL_OP_DECR_WRAP:
107 return STENCIL_OP_DECR_WRAP;
108 case PIPE_STENCIL_OP_INVERT:
109 return STENCIL_OP_INVERT;
110 default:
111 DBG("Unhandled stencil op: %i", stencil_op);
112 return ETNA_NO_MATCH;
113 }
114 }
115
116 static inline uint32_t
117 translate_blend(unsigned blend)
118 {
119 switch (blend) {
120 case PIPE_BLEND_ADD:
121 return BLEND_EQ_ADD;
122 case PIPE_BLEND_SUBTRACT:
123 return BLEND_EQ_SUBTRACT;
124 case PIPE_BLEND_REVERSE_SUBTRACT:
125 return BLEND_EQ_REVERSE_SUBTRACT;
126 case PIPE_BLEND_MIN:
127 return BLEND_EQ_MIN;
128 case PIPE_BLEND_MAX:
129 return BLEND_EQ_MAX;
130 default:
131 DBG("Unhandled blend: %i", blend);
132 return ETNA_NO_MATCH;
133 }
134 }
135
136 static inline uint32_t
137 translate_blend_factor(unsigned blend_factor)
138 {
139 switch (blend_factor) {
140 case PIPE_BLENDFACTOR_ONE:
141 return BLEND_FUNC_ONE;
142 case PIPE_BLENDFACTOR_SRC_COLOR:
143 return BLEND_FUNC_SRC_COLOR;
144 case PIPE_BLENDFACTOR_SRC_ALPHA:
145 return BLEND_FUNC_SRC_ALPHA;
146 case PIPE_BLENDFACTOR_DST_ALPHA:
147 return BLEND_FUNC_DST_ALPHA;
148 case PIPE_BLENDFACTOR_DST_COLOR:
149 return BLEND_FUNC_DST_COLOR;
150 case PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE:
151 return BLEND_FUNC_SRC_ALPHA_SATURATE;
152 case PIPE_BLENDFACTOR_CONST_COLOR:
153 return BLEND_FUNC_CONSTANT_COLOR;
154 case PIPE_BLENDFACTOR_CONST_ALPHA:
155 return BLEND_FUNC_CONSTANT_ALPHA;
156 case PIPE_BLENDFACTOR_ZERO:
157 return BLEND_FUNC_ZERO;
158 case PIPE_BLENDFACTOR_INV_SRC_COLOR:
159 return BLEND_FUNC_ONE_MINUS_SRC_COLOR;
160 case PIPE_BLENDFACTOR_INV_SRC_ALPHA:
161 return BLEND_FUNC_ONE_MINUS_SRC_ALPHA;
162 case PIPE_BLENDFACTOR_INV_DST_ALPHA:
163 return BLEND_FUNC_ONE_MINUS_DST_ALPHA;
164 case PIPE_BLENDFACTOR_INV_DST_COLOR:
165 return BLEND_FUNC_ONE_MINUS_DST_COLOR;
166 case PIPE_BLENDFACTOR_INV_CONST_COLOR:
167 return BLEND_FUNC_ONE_MINUS_CONSTANT_COLOR;
168 case PIPE_BLENDFACTOR_INV_CONST_ALPHA:
169 return BLEND_FUNC_ONE_MINUS_CONSTANT_ALPHA;
170 case PIPE_BLENDFACTOR_SRC1_COLOR:
171 case PIPE_BLENDFACTOR_SRC1_ALPHA:
172 case PIPE_BLENDFACTOR_INV_SRC1_COLOR:
173 case PIPE_BLENDFACTOR_INV_SRC1_ALPHA:
174 default:
175 DBG("Unhandled blend factor: %i", blend_factor);
176 return ETNA_NO_MATCH;
177 }
178 }
179
180 static inline uint32_t
181 translate_texture_wrapmode(unsigned wrap)
182 {
183 switch (wrap) {
184 case PIPE_TEX_WRAP_REPEAT:
185 return TEXTURE_WRAPMODE_REPEAT;
186 case PIPE_TEX_WRAP_CLAMP:
187 return TEXTURE_WRAPMODE_CLAMP_TO_EDGE;
188 case PIPE_TEX_WRAP_CLAMP_TO_EDGE:
189 return TEXTURE_WRAPMODE_CLAMP_TO_EDGE;
190 case PIPE_TEX_WRAP_CLAMP_TO_BORDER:
191 return TEXTURE_WRAPMODE_CLAMP_TO_EDGE; /* XXX */
192 case PIPE_TEX_WRAP_MIRROR_REPEAT:
193 return TEXTURE_WRAPMODE_MIRRORED_REPEAT;
194 case PIPE_TEX_WRAP_MIRROR_CLAMP:
195 return TEXTURE_WRAPMODE_MIRRORED_REPEAT; /* XXX */
196 case PIPE_TEX_WRAP_MIRROR_CLAMP_TO_EDGE:
197 return TEXTURE_WRAPMODE_MIRRORED_REPEAT; /* XXX */
198 case PIPE_TEX_WRAP_MIRROR_CLAMP_TO_BORDER:
199 return TEXTURE_WRAPMODE_MIRRORED_REPEAT; /* XXX */
200 default:
201 DBG("Unhandled texture wrapmode: %i", wrap);
202 return ETNA_NO_MATCH;
203 }
204 }
205
206 static inline uint32_t
207 translate_texture_mipfilter(unsigned filter)
208 {
209 switch (filter) {
210 case PIPE_TEX_MIPFILTER_NEAREST:
211 return TEXTURE_FILTER_NEAREST;
212 case PIPE_TEX_MIPFILTER_LINEAR:
213 return TEXTURE_FILTER_LINEAR;
214 case PIPE_TEX_MIPFILTER_NONE:
215 return TEXTURE_FILTER_NONE;
216 default:
217 DBG("Unhandled texture mipfilter: %i", filter);
218 return ETNA_NO_MATCH;
219 }
220 }
221
222 static inline uint32_t
223 translate_texture_filter(unsigned filter)
224 {
225 switch (filter) {
226 case PIPE_TEX_FILTER_NEAREST:
227 return TEXTURE_FILTER_NEAREST;
228 case PIPE_TEX_FILTER_LINEAR:
229 return TEXTURE_FILTER_LINEAR;
230 /* What about anisotropic? */
231 default:
232 DBG("Unhandled texture filter: %i", filter);
233 return ETNA_NO_MATCH;
234 }
235 }
236
237 static inline int
238 translate_rb_src_dst_swap(enum pipe_format src, enum pipe_format dst)
239 {
240 return translate_pe_format_rb_swap(src) ^ translate_pe_format_rb_swap(dst);
241 }
242
243 static inline uint32_t
244 translate_depth_format(enum pipe_format fmt)
245 {
246 /* Note: Pipe format convention is LSB to MSB, VIVS is MSB to LSB */
247 switch (fmt) {
248 case PIPE_FORMAT_Z16_UNORM:
249 return VIVS_PE_DEPTH_CONFIG_DEPTH_FORMAT_D16;
250 case PIPE_FORMAT_X8Z24_UNORM:
251 return VIVS_PE_DEPTH_CONFIG_DEPTH_FORMAT_D24S8;
252 case PIPE_FORMAT_S8_UINT_Z24_UNORM:
253 return VIVS_PE_DEPTH_CONFIG_DEPTH_FORMAT_D24S8;
254 default:
255 return ETNA_NO_MATCH;
256 }
257 }
258
259 /* render target format for MSAA */
260 static inline uint32_t
261 translate_ts_format(enum pipe_format fmt)
262 {
263 /* Note: Pipe format convention is LSB to MSB, VIVS is MSB to LSB */
264 switch (fmt) {
265 case PIPE_FORMAT_B4G4R4X4_UNORM:
266 case PIPE_FORMAT_B4G4R4A4_UNORM:
267 return COMPRESSION_FORMAT_A4R4G4B4;
268 case PIPE_FORMAT_B5G5R5X1_UNORM:
269 return COMPRESSION_FORMAT_A1R5G5B5;
270 case PIPE_FORMAT_B5G5R5A1_UNORM:
271 return COMPRESSION_FORMAT_A1R5G5B5;
272 case PIPE_FORMAT_B5G6R5_UNORM:
273 return COMPRESSION_FORMAT_R5G6B5;
274 case PIPE_FORMAT_B8G8R8X8_UNORM:
275 case PIPE_FORMAT_B8G8R8X8_SRGB:
276 case PIPE_FORMAT_R8G8B8X8_UNORM:
277 return COMPRESSION_FORMAT_X8R8G8B8;
278 case PIPE_FORMAT_B8G8R8A8_UNORM:
279 case PIPE_FORMAT_B8G8R8A8_SRGB:
280 case PIPE_FORMAT_R8G8B8A8_UNORM:
281 return COMPRESSION_FORMAT_A8R8G8B8;
282 case PIPE_FORMAT_S8_UINT_Z24_UNORM:
283 return COMPRESSION_FORMAT_D24S8;
284 case PIPE_FORMAT_X8Z24_UNORM:
285 return COMPRESSION_FORMAT_D24X8;
286 case PIPE_FORMAT_Z16_UNORM:
287 return COMPRESSION_FORMAT_D16;
288 /* MSAA with YUYV not supported */
289 default:
290 return ETNA_NO_MATCH;
291 }
292 }
293
294 /* Return normalization flag for vertex element format */
295 static inline uint32_t
296 translate_vertex_format_normalize(enum pipe_format fmt)
297 {
298 const struct util_format_description *desc = util_format_description(fmt);
299 if (!desc)
300 return VIVS_FE_VERTEX_ELEMENT_CONFIG_NORMALIZE_OFF;
301
302 /* assumes that normalization of channel 0 holds for all channels;
303 * this holds for all vertex formats that we support */
304 return desc->channel[0].normalized
305 ? VIVS_FE_VERTEX_ELEMENT_CONFIG_NORMALIZE_SIGN_EXTEND
306 : VIVS_FE_VERTEX_ELEMENT_CONFIG_NORMALIZE_OFF;
307 }
308
309 static inline uint32_t
310 translate_output_mode(enum pipe_format fmt, bool halti5)
311 {
312 const unsigned bits =
313 util_format_get_component_bits(fmt, UTIL_FORMAT_COLORSPACE_RGB, 0);
314
315 if (bits == 32)
316 return COLOR_OUTPUT_MODE_UIF32;
317
318 if (!util_format_is_pure_integer(fmt))
319 return COLOR_OUTPUT_MODE_NORMAL;
320
321 /* generic integer output mode pre-halti5 (?) */
322 if (bits == 10 || !halti5)
323 return COLOR_OUTPUT_MODE_A2B10G10R10UI;
324
325 if (util_format_is_pure_sint(fmt))
326 return bits == 8 ? COLOR_OUTPUT_MODE_I8 : COLOR_OUTPUT_MODE_I16;
327
328 return bits == 8 ? COLOR_OUTPUT_MODE_U8 : COLOR_OUTPUT_MODE_U16;
329 }
330
331 static inline uint32_t
332 translate_index_size(unsigned index_size)
333 {
334 switch (index_size) {
335 case 1:
336 return VIVS_FE_INDEX_STREAM_CONTROL_TYPE_UNSIGNED_CHAR;
337 case 2:
338 return VIVS_FE_INDEX_STREAM_CONTROL_TYPE_UNSIGNED_SHORT;
339 case 4:
340 return VIVS_FE_INDEX_STREAM_CONTROL_TYPE_UNSIGNED_INT;
341 default:
342 DBG("Unhandled index size %i", index_size);
343 return ETNA_NO_MATCH;
344 }
345 }
346
347 static inline uint32_t
348 translate_draw_mode(unsigned mode)
349 {
350 switch (mode) {
351 case PIPE_PRIM_POINTS:
352 return PRIMITIVE_TYPE_POINTS;
353 case PIPE_PRIM_LINES:
354 return PRIMITIVE_TYPE_LINES;
355 case PIPE_PRIM_LINE_LOOP:
356 return PRIMITIVE_TYPE_LINE_LOOP;
357 case PIPE_PRIM_LINE_STRIP:
358 return PRIMITIVE_TYPE_LINE_STRIP;
359 case PIPE_PRIM_TRIANGLES:
360 return PRIMITIVE_TYPE_TRIANGLES;
361 case PIPE_PRIM_TRIANGLE_STRIP:
362 return PRIMITIVE_TYPE_TRIANGLE_STRIP;
363 case PIPE_PRIM_TRIANGLE_FAN:
364 return PRIMITIVE_TYPE_TRIANGLE_FAN;
365 case PIPE_PRIM_QUADS:
366 return PRIMITIVE_TYPE_QUADS;
367 default:
368 DBG("Unhandled draw mode primitive %i", mode);
369 return ETNA_NO_MATCH;
370 }
371 }
372
373 /* Get size multiple for size of texture/rendertarget with a certain layout
374 * This is affected by many different parameters:
375 * - A horizontal multiple of 16 is used when possible as resolve can be used
376 * at the cost of only a little bit extra memory usage.
377 * - If the surface is to be used with the resolve engine, set rs_align true.
378 * If set, a horizontal multiple of 16 will be used for tiled and linear,
379 * otherwise one of 16. However, such a surface will be incompatible
380 * with the samplers if the GPU does hot support the HALIGN feature.
381 * - If the surface is supertiled, horizontal and vertical multiple is always 64
382 * - If the surface is multi tiled or supertiled, make sure that the vertical size
383 * is a multiple of the number of pixel pipes as well.
384 * */
385 static inline void
386 etna_layout_multiple(unsigned layout, unsigned pixel_pipes, bool rs_align,
387 unsigned *paddingX, unsigned *paddingY, unsigned *halign)
388 {
389 switch (layout) {
390 case ETNA_LAYOUT_LINEAR:
391 *paddingX = rs_align ? 16 : 4;
392 *paddingY = 1;
393 *halign = rs_align ? TEXTURE_HALIGN_SIXTEEN : TEXTURE_HALIGN_FOUR;
394 break;
395 case ETNA_LAYOUT_TILED:
396 *paddingX = rs_align ? 16 : 4;
397 *paddingY = 4;
398 *halign = rs_align ? TEXTURE_HALIGN_SIXTEEN : TEXTURE_HALIGN_FOUR;
399 break;
400 case ETNA_LAYOUT_SUPER_TILED:
401 *paddingX = 64;
402 *paddingY = 64;
403 *halign = TEXTURE_HALIGN_SUPER_TILED;
404 break;
405 case ETNA_LAYOUT_MULTI_TILED:
406 *paddingX = 16;
407 *paddingY = 4 * pixel_pipes;
408 *halign = TEXTURE_HALIGN_SPLIT_TILED;
409 break;
410 case ETNA_LAYOUT_MULTI_SUPERTILED:
411 *paddingX = 64;
412 *paddingY = 64 * pixel_pipes;
413 *halign = TEXTURE_HALIGN_SPLIT_SUPER_TILED;
414 break;
415 default:
416 DBG("Unhandled layout %i", layout);
417 }
418 }
419
420 static inline uint32_t
421 translate_clear_depth_stencil(enum pipe_format format, float depth,
422 unsigned stencil)
423 {
424 uint32_t clear_value = 0;
425
426 // XXX util_pack_color
427 switch (format) {
428 case PIPE_FORMAT_Z16_UNORM:
429 clear_value = etna_cfloat_to_uintN(depth, 16);
430 clear_value |= clear_value << 16;
431 break;
432 case PIPE_FORMAT_X8Z24_UNORM:
433 case PIPE_FORMAT_S8_UINT_Z24_UNORM:
434 clear_value = (etna_cfloat_to_uintN(depth, 24) << 8) | (stencil & 0xFF);
435 break;
436 default:
437 DBG("Unhandled pipe format for depth stencil clear: %i", format);
438 }
439 return clear_value;
440 }
441
442 /* Convert MSAA number of samples to x and y scaling factor.
443 * Return true if supported and false otherwise. */
444 static inline bool
445 translate_samples_to_xyscale(int num_samples, int *xscale_out, int *yscale_out)
446 {
447 int xscale, yscale;
448
449 switch (num_samples) {
450 case 0:
451 case 1:
452 xscale = 1;
453 yscale = 1;
454 break;
455 case 2:
456 xscale = 2;
457 yscale = 1;
458 break;
459 case 4:
460 xscale = 2;
461 yscale = 2;
462 break;
463 default:
464 return false;
465 }
466
467 if (xscale_out)
468 *xscale_out = xscale;
469 if (yscale_out)
470 *yscale_out = yscale;
471
472 return true;
473 }
474
475 static inline uint32_t
476 translate_texture_target(unsigned target)
477 {
478 switch (target) {
479 case PIPE_TEXTURE_1D:
480 return TEXTURE_TYPE_1D;
481 case PIPE_TEXTURE_2D:
482 case PIPE_TEXTURE_RECT:
483 case PIPE_TEXTURE_1D_ARRAY:
484 return TEXTURE_TYPE_2D;
485 case PIPE_TEXTURE_CUBE:
486 return TEXTURE_TYPE_CUBE_MAP;
487 case PIPE_TEXTURE_3D:
488 case PIPE_TEXTURE_2D_ARRAY:
489 return TEXTURE_TYPE_3D;
490 default:
491 DBG("Unhandled texture target: %i", target);
492 return ETNA_NO_MATCH;
493 }
494 }
495
496 static inline uint32_t
497 translate_texture_compare(enum pipe_compare_func compare_func)
498 {
499 switch (compare_func) {
500 case PIPE_FUNC_NEVER:
501 return TEXTURE_COMPARE_FUNC_NEVER;
502 case PIPE_FUNC_LESS:
503 return TEXTURE_COMPARE_FUNC_LESS;
504 case PIPE_FUNC_EQUAL:
505 return TEXTURE_COMPARE_FUNC_EQUAL;
506 case PIPE_FUNC_LEQUAL:
507 return TEXTURE_COMPARE_FUNC_LEQUAL;
508 case PIPE_FUNC_GREATER:
509 return TEXTURE_COMPARE_FUNC_GREATER;
510 case PIPE_FUNC_NOTEQUAL:
511 return TEXTURE_COMPARE_FUNC_NOTEQUAL;
512 case PIPE_FUNC_GEQUAL:
513 return TEXTURE_COMPARE_FUNC_GEQUAL;
514 case PIPE_FUNC_ALWAYS:
515 return TEXTURE_COMPARE_FUNC_ALWAYS;
516 default:
517 unreachable("Invalid compare func");
518 }
519 }
520
521 #endif