src/gallium/drivers/freedreno/a2xx/ir-a2xx.h

   1 /*
   2  * Copyright (c) 2012 Rob Clark <robdclark@gmail.com>
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  20  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  21  * SOFTWARE.
  22  */
  23
  24 #ifndef IR2_H_
  25 #define IR2_H_
  26
  27 #include <stdint.h>
  28 #include <stdbool.h>
  29
  30 #include "instr-a2xx.h"
  31
  32 /* low level intermediate representation of an adreno a2xx shader program */
  33
  34 struct ir2_shader;
  35
  36 #define REG_MASK 0xff
  37
  38 struct ir2_shader_info {
  39         uint16_t sizedwords;
  40         int8_t   max_reg;   /* highest GPR # used by shader */
  41 };
  42
  43 struct ir2_register {
  44         int16_t write_idx, write_idx2, read_idx, reg;
  45         /* bitmask of variables on which this one depends
  46          * XXX: use bitmask util?
  47          */
  48         uint32_t regmask[REG_MASK/32+1];
  49 };
  50
  51 struct ir2_src_register {
  52         enum {
  53                 IR2_REG_INPUT  = 0x1,
  54                 IR2_REG_CONST  = 0x2,
  55                 IR2_REG_NEGATE = 0x4,
  56                 IR2_REG_ABS    = 0x8,
  57         } flags;
  58         int num;
  59         char *swizzle;
  60 };
  61
  62 struct ir2_dst_register {
  63         enum {
  64                 IR2_REG_EXPORT = 0x1,
  65         } flags;
  66         int num;
  67         char *swizzle;
  68 };
  69
  70 enum ir2_pred {
  71         IR2_PRED_NONE = 0,
  72         IR2_PRED_EQ = 1,
  73         IR2_PRED_NE = 2,
  74 };
  75
  76 struct ir2_instruction {
  77         struct ir2_shader *shader;
  78         unsigned idx;
  79         enum {
  80                 IR2_FETCH,
  81                 IR2_ALU_VECTOR,
  82                 IR2_ALU_SCALAR,
  83         } instr_type;
  84         enum ir2_pred pred;
  85         int sync;
  86         unsigned src_reg_count;
  87         struct ir2_dst_register dst_reg;
  88         struct ir2_src_register src_reg[3];
  89         union {
  90                 /* FETCH specific: */
  91                 struct {
  92                         instr_fetch_opc_t opc;
  93                         unsigned const_idx;
  94                         /* texture fetch specific: */
  95                         bool is_cube : 1;
  96                         bool is_rect : 1;
  97                         /* vertex fetch specific: */
  98                         unsigned const_idx_sel;
  99                         enum a2xx_sq_surfaceformat fmt;
 100                         bool is_signed : 1;
 101                         bool is_normalized : 1;
 102                         uint32_t stride;
 103                         uint32_t offset;
 104                 } fetch;
 105                 /* ALU-Vector specific: */
 106                 struct {
 107                         instr_vector_opc_t opc;
 108                         bool clamp;
 109                 } alu_vector;
 110                 /* ALU-Scalar specific: */
 111                 struct {
 112                         instr_scalar_opc_t opc;
 113                         bool clamp;
 114                 } alu_scalar;
 115         };
 116 };
 117
 118 struct ir2_shader {
 119         unsigned instr_count;
 120         int max_reg;
 121         struct ir2_register reg[REG_MASK+1];
 122
 123         struct ir2_instruction *instr[0x200];
 124         uint32_t heap[100 * 4096];
 125         unsigned heap_idx;
 126
 127         enum ir2_pred pred;  /* pred inherited by newly created instrs */
 128 };
 129
 130 struct ir2_shader * ir2_shader_create(void);
 131 void ir2_shader_destroy(struct ir2_shader *shader);
 132 void * ir2_shader_assemble(struct ir2_shader *shader,
 133                 struct ir2_shader_info *info);
 134
 135 struct ir2_instruction * ir2_instr_create(struct ir2_shader *shader,
 136                 int instr_type);
 137
 138 struct ir2_dst_register * ir2_dst_create(struct ir2_instruction *instr,
 139                 int num, const char *swizzle, int flags);
 140 struct ir2_src_register * ir2_reg_create(struct ir2_instruction *instr,
 141                 int num, const char *swizzle, int flags);
 142
 143 /* some helper fxns: */
 144
 145 static inline struct ir2_instruction *
 146 ir2_instr_create_alu_v(struct ir2_shader *shader, instr_vector_opc_t vop)
 147 {
 148         struct ir2_instruction *instr = ir2_instr_create(shader, IR2_ALU_VECTOR);
 149         if (!instr)
 150                 return instr;
 151         instr->alu_vector.opc = vop;
 152         return instr;
 153 }
 154
 155 static inline struct ir2_instruction *
 156 ir2_instr_create_alu_s(struct ir2_shader *shader, instr_scalar_opc_t sop)
 157 {
 158         struct ir2_instruction *instr = ir2_instr_create(shader, IR2_ALU_SCALAR);
 159         if (!instr)
 160                 return instr;
 161         instr->alu_scalar.opc = sop;
 162         return instr;
 163 }
 164
 165 static inline struct ir2_instruction *
 166 ir2_instr_create_vtx_fetch(struct ir2_shader *shader, int ci, int cis,
 167                 enum a2xx_sq_surfaceformat fmt, bool is_signed, int stride)
 168 {
 169         struct ir2_instruction *instr = ir2_instr_create(shader, IR2_FETCH);
 170         instr->fetch.opc = VTX_FETCH;
 171         instr->fetch.const_idx = ci;
 172         instr->fetch.const_idx_sel = cis;
 173         instr->fetch.fmt = fmt;
 174         instr->fetch.is_signed = is_signed;
 175         instr->fetch.stride = stride;
 176         return instr;
 177 }
 178 static inline struct ir2_instruction *
 179 ir2_instr_create_tex_fetch(struct ir2_shader *shader, int ci)
 180 {
 181         struct ir2_instruction *instr = ir2_instr_create(shader, IR2_FETCH);
 182         instr->fetch.opc = TEX_FETCH;
 183         instr->fetch.const_idx = ci;
 184         return instr;
 185 }
 186
 187
 188 #endif /* IR2_H_ */