freedreno: Split ir3_const's user buffer and indirect upload APIs.
[mesa.git] / src / gallium / drivers / freedreno / a4xx / fd4_draw.h
1 /*
2 * Copyright (C) 2014 Rob Clark <robclark@freedesktop.org>
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 * SOFTWARE.
22 *
23 * Authors:
24 * Rob Clark <robclark@freedesktop.org>
25 */
26
27 #ifndef FD4_DRAW_H_
28 #define FD4_DRAW_H_
29
30 #include "pipe/p_context.h"
31
32 #include "freedreno_draw.h"
33
34 void fd4_draw_init(struct pipe_context *pctx);
35
36 /* draw packet changed on a4xx, so cannot reuse one from a2xx/a3xx.. */
37
38 static inline uint32_t DRAW4(enum pc_di_primtype prim_type,
39 enum pc_di_src_sel source_select, enum a4xx_index_size index_size,
40 enum pc_di_vis_cull_mode vis_cull_mode)
41 {
42 return CP_DRAW_INDX_OFFSET_0_PRIM_TYPE(prim_type) |
43 CP_DRAW_INDX_OFFSET_0_SOURCE_SELECT(source_select) |
44 CP_DRAW_INDX_OFFSET_0_INDEX_SIZE(index_size) |
45 CP_DRAW_INDX_OFFSET_0_VIS_CULL(vis_cull_mode);
46 }
47
48 static inline void
49 fd4_draw(struct fd_batch *batch, struct fd_ringbuffer *ring,
50 enum pc_di_primtype primtype,
51 enum pc_di_vis_cull_mode vismode,
52 enum pc_di_src_sel src_sel, uint32_t count,
53 uint32_t instances, enum a4xx_index_size idx_type,
54 uint32_t max_indices, uint32_t idx_offset,
55 struct pipe_resource *idx_buffer)
56 {
57 /* for debug after a lock up, write a unique counter value
58 * to scratch7 for each draw, to make it easier to match up
59 * register dumps to cmdstream. The combination of IB
60 * (scratch6) and DRAW is enough to "triangulate" the
61 * particular draw that caused lockup.
62 */
63 emit_marker(ring, 7);
64
65 OUT_PKT3(ring, CP_DRAW_INDX_OFFSET, idx_buffer ? 6 : 3);
66 if (vismode == USE_VISIBILITY) {
67 /* leave vis mode blank for now, it will be patched up when
68 * we know if we are binning or not
69 */
70 OUT_RINGP(ring, DRAW4(primtype, src_sel, idx_type, 0),
71 &batch->draw_patches);
72 } else {
73 OUT_RING(ring, DRAW4(primtype, src_sel, idx_type, vismode));
74 }
75 OUT_RING(ring, instances); /* NumInstances */
76 OUT_RING(ring, count); /* NumIndices */
77 if (idx_buffer) {
78 OUT_RING(ring, 0x0); /* XXX */
79 OUT_RELOC(ring, fd_resource(idx_buffer)->bo, idx_offset, 0, 0);
80 OUT_RING (ring, max_indices);
81 }
82
83 emit_marker(ring, 7);
84
85 fd_reset_wfi(batch);
86 }
87
88 static inline void
89 fd4_draw_emit(struct fd_batch *batch, struct fd_ringbuffer *ring,
90 enum pc_di_primtype primtype,
91 enum pc_di_vis_cull_mode vismode,
92 const struct pipe_draw_info *info,
93 unsigned index_offset)
94 {
95 struct pipe_resource *idx_buffer = NULL;
96 enum a4xx_index_size idx_type;
97 enum pc_di_src_sel src_sel;
98 uint32_t idx_size, idx_offset;
99
100 if (info->indirect) {
101 struct fd_resource *ind = fd_resource(info->indirect->buffer);
102
103 emit_marker(ring, 7);
104
105 if (info->index_size) {
106 struct pipe_resource *idx = info->index.resource;
107
108 OUT_PKT3(ring, CP_DRAW_INDX_INDIRECT, 4);
109 OUT_RINGP(ring, DRAW4(primtype, DI_SRC_SEL_DMA,
110 fd4_size2indextype(info->index_size), 0),
111 &batch->draw_patches);
112 OUT_RELOC(ring, fd_resource(idx)->bo, index_offset, 0, 0);
113 OUT_RING(ring, A4XX_CP_DRAW_INDX_INDIRECT_2_INDX_SIZE(
114 idx->width0 - index_offset));
115 OUT_RELOC(ring, ind->bo, info->indirect->offset, 0, 0);
116 } else {
117 OUT_PKT3(ring, CP_DRAW_INDIRECT, 2);
118 OUT_RINGP(ring, DRAW4(primtype, DI_SRC_SEL_AUTO_INDEX, 0, 0),
119 &batch->draw_patches);
120 OUT_RELOC(ring, ind->bo, info->indirect->offset, 0, 0);
121 }
122
123 emit_marker(ring, 7);
124 fd_reset_wfi(batch);
125
126 return;
127 }
128
129 if (info->index_size) {
130 assert(!info->has_user_indices);
131
132 idx_buffer = info->index.resource;
133 idx_type = fd4_size2indextype(info->index_size);
134 idx_size = info->index_size * info->count;
135 idx_offset = index_offset + info->start * info->index_size;
136 src_sel = DI_SRC_SEL_DMA;
137 } else {
138 idx_buffer = NULL;
139 idx_type = INDEX4_SIZE_32_BIT;
140 idx_size = 0;
141 idx_offset = 0;
142 src_sel = DI_SRC_SEL_AUTO_INDEX;
143 }
144
145 fd4_draw(batch, ring, primtype, vismode, src_sel,
146 info->count, info->instance_count,
147 idx_type, idx_size, idx_offset, idx_buffer);
148 }
149
150 #endif /* FD4_DRAW_H_ */