38348580e2169c940b5c2f69bcd2e55106d8347c
[mesa.git] / src / gallium / drivers / freedreno / a4xx / fd4_texture.c
1 /* -*- mode: C; c-file-style: "k&r"; tab-width 4; indent-tabs-mode: t; -*- */
2
3 /*
4 * Copyright (C) 2014 Rob Clark <robclark@freedesktop.org>
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
15 * Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
23 * SOFTWARE.
24 *
25 * Authors:
26 * Rob Clark <robclark@freedesktop.org>
27 */
28
29 #include "pipe/p_state.h"
30 #include "util/u_string.h"
31 #include "util/u_memory.h"
32 #include "util/u_inlines.h"
33 #include "util/u_format.h"
34
35 #include "fd4_texture.h"
36 #include "fd4_format.h"
37
38 static enum a4xx_tex_clamp
39 tex_clamp(unsigned wrap, bool clamp_to_edge)
40 {
41 /* Hardware does not support _CLAMP, but we emulate it: */
42 if (wrap == PIPE_TEX_WRAP_CLAMP) {
43 wrap = (clamp_to_edge) ?
44 PIPE_TEX_WRAP_CLAMP_TO_EDGE : PIPE_TEX_WRAP_CLAMP_TO_BORDER;
45 }
46
47 switch (wrap) {
48 case PIPE_TEX_WRAP_REPEAT:
49 return A4XX_TEX_REPEAT;
50 case PIPE_TEX_WRAP_CLAMP_TO_EDGE:
51 return A4XX_TEX_CLAMP_TO_EDGE;
52 case PIPE_TEX_WRAP_CLAMP_TO_BORDER:
53 return A4XX_TEX_CLAMP_TO_BORDER;
54 case PIPE_TEX_WRAP_MIRROR_CLAMP_TO_EDGE:
55 /* only works for PoT.. need to emulate otherwise! */
56 return A4XX_TEX_MIRROR_CLAMP;
57 case PIPE_TEX_WRAP_MIRROR_REPEAT:
58 return A4XX_TEX_MIRROR_REPEAT;
59 case PIPE_TEX_WRAP_MIRROR_CLAMP:
60 case PIPE_TEX_WRAP_MIRROR_CLAMP_TO_BORDER:
61 /* these two we could perhaps emulate, but we currently
62 * just don't advertise PIPE_CAP_TEXTURE_MIRROR_CLAMP
63 */
64 default:
65 DBG("invalid wrap: %u", wrap);
66 return 0;
67 }
68 }
69
70 static enum a4xx_tex_filter
71 tex_filter(unsigned filter, bool aniso)
72 {
73 switch (filter) {
74 case PIPE_TEX_FILTER_NEAREST:
75 return A4XX_TEX_NEAREST;
76 case PIPE_TEX_FILTER_LINEAR:
77 return aniso ? A4XX_TEX_ANISO : A4XX_TEX_LINEAR;
78 default:
79 DBG("invalid filter: %u", filter);
80 return 0;
81 }
82 }
83
84 static void *
85 fd4_sampler_state_create(struct pipe_context *pctx,
86 const struct pipe_sampler_state *cso)
87 {
88 struct fd4_sampler_stateobj *so = CALLOC_STRUCT(fd4_sampler_stateobj);
89 unsigned aniso = util_last_bit(MIN2(cso->max_anisotropy >> 1, 8));
90 bool miplinear = false;
91 bool clamp_to_edge;
92
93 if (!so)
94 return NULL;
95
96 if (cso->min_mip_filter == PIPE_TEX_MIPFILTER_LINEAR)
97 miplinear = true;
98
99 so->base = *cso;
100
101 /*
102 * For nearest filtering, _CLAMP means _CLAMP_TO_EDGE; for linear
103 * filtering, _CLAMP means _CLAMP_TO_BORDER while additionally
104 * clamping the texture coordinates to [0.0, 1.0].
105 *
106 * The clamping will be taken care of in the shaders. There are two
107 * filters here, but let the minification one has a say.
108 */
109 clamp_to_edge = (cso->min_img_filter == PIPE_TEX_FILTER_NEAREST);
110 if (!clamp_to_edge) {
111 so->saturate_s = (cso->wrap_s == PIPE_TEX_WRAP_CLAMP);
112 so->saturate_t = (cso->wrap_t == PIPE_TEX_WRAP_CLAMP);
113 so->saturate_r = (cso->wrap_r == PIPE_TEX_WRAP_CLAMP);
114 }
115
116 so->texsamp0 =
117 COND(miplinear, A4XX_TEX_SAMP_0_MIPFILTER_LINEAR_NEAR) |
118 A4XX_TEX_SAMP_0_XY_MAG(tex_filter(cso->mag_img_filter, aniso)) |
119 A4XX_TEX_SAMP_0_XY_MIN(tex_filter(cso->min_img_filter, aniso)) |
120 A4XX_TEX_SAMP_0_ANISO(aniso) |
121 A4XX_TEX_SAMP_0_WRAP_S(tex_clamp(cso->wrap_s, clamp_to_edge)) |
122 A4XX_TEX_SAMP_0_WRAP_T(tex_clamp(cso->wrap_t, clamp_to_edge)) |
123 A4XX_TEX_SAMP_0_WRAP_R(tex_clamp(cso->wrap_r, clamp_to_edge));
124
125 so->texsamp1 =
126 // COND(miplinear, A4XX_TEX_SAMP_1_MIPFILTER_LINEAR_FAR) |
127 COND(!cso->seamless_cube_map, A4XX_TEX_SAMP_1_CUBEMAPSEAMLESSFILTOFF) |
128 COND(!cso->normalized_coords, A4XX_TEX_SAMP_1_UNNORM_COORDS);
129
130 if (cso->min_mip_filter != PIPE_TEX_MIPFILTER_NONE) {
131 so->texsamp0 |= A4XX_TEX_SAMP_0_LOD_BIAS(cso->lod_bias);
132 so->texsamp1 |=
133 A4XX_TEX_SAMP_1_MIN_LOD(cso->min_lod) |
134 A4XX_TEX_SAMP_1_MAX_LOD(cso->max_lod);
135 }
136
137 if (cso->compare_mode)
138 so->texsamp1 |= A4XX_TEX_SAMP_1_COMPARE_FUNC(cso->compare_func); /* maps 1:1 */
139
140 return so;
141 }
142
143 static void
144 fd4_sampler_states_bind(struct pipe_context *pctx,
145 unsigned shader, unsigned start,
146 unsigned nr, void **hwcso)
147 {
148 struct fd_context *ctx = fd_context(pctx);
149 struct fd4_context *fd4_ctx = fd4_context(ctx);
150 uint16_t saturate_s = 0, saturate_t = 0, saturate_r = 0;
151 unsigned i;
152
153 if (!hwcso)
154 nr = 0;
155
156 for (i = 0; i < nr; i++) {
157 if (hwcso[i]) {
158 struct fd4_sampler_stateobj *sampler =
159 fd4_sampler_stateobj(hwcso[i]);
160 if (sampler->saturate_s)
161 saturate_s |= (1 << i);
162 if (sampler->saturate_t)
163 saturate_t |= (1 << i);
164 if (sampler->saturate_r)
165 saturate_r |= (1 << i);
166 }
167 }
168
169 fd_sampler_states_bind(pctx, shader, start, nr, hwcso);
170
171 if (shader == PIPE_SHADER_FRAGMENT) {
172 fd4_ctx->fsaturate =
173 (saturate_s != 0) ||
174 (saturate_t != 0) ||
175 (saturate_r != 0);
176 fd4_ctx->fsaturate_s = saturate_s;
177 fd4_ctx->fsaturate_t = saturate_t;
178 fd4_ctx->fsaturate_r = saturate_r;
179 } else if (shader == PIPE_SHADER_VERTEX) {
180 fd4_ctx->vsaturate =
181 (saturate_s != 0) ||
182 (saturate_t != 0) ||
183 (saturate_r != 0);
184 fd4_ctx->vsaturate_s = saturate_s;
185 fd4_ctx->vsaturate_t = saturate_t;
186 fd4_ctx->vsaturate_r = saturate_r;
187 }
188 }
189
190 static enum a4xx_tex_type
191 tex_type(unsigned target)
192 {
193 switch (target) {
194 default:
195 assert(0);
196 case PIPE_BUFFER:
197 case PIPE_TEXTURE_1D:
198 case PIPE_TEXTURE_1D_ARRAY:
199 return A4XX_TEX_1D;
200 case PIPE_TEXTURE_RECT:
201 case PIPE_TEXTURE_2D:
202 case PIPE_TEXTURE_2D_ARRAY:
203 return A4XX_TEX_2D;
204 case PIPE_TEXTURE_3D:
205 return A4XX_TEX_3D;
206 case PIPE_TEXTURE_CUBE:
207 case PIPE_TEXTURE_CUBE_ARRAY:
208 return A4XX_TEX_CUBE;
209 }
210 }
211
212 static struct pipe_sampler_view *
213 fd4_sampler_view_create(struct pipe_context *pctx, struct pipe_resource *prsc,
214 const struct pipe_sampler_view *cso)
215 {
216 struct fd4_pipe_sampler_view *so = CALLOC_STRUCT(fd4_pipe_sampler_view);
217 struct fd_resource *rsc = fd_resource(prsc);
218 unsigned lvl, layers;
219 uint32_t sz2 = 0;
220
221 if (!so)
222 return NULL;
223
224 so->base = *cso;
225 pipe_reference(NULL, &prsc->reference);
226 so->base.texture = prsc;
227 so->base.reference.count = 1;
228 so->base.context = pctx;
229
230 so->texconst0 =
231 A4XX_TEX_CONST_0_TYPE(tex_type(cso->target)) |
232 A4XX_TEX_CONST_0_FMT(fd4_pipe2tex(cso->format)) |
233 fd4_tex_swiz(cso->format, cso->swizzle_r, cso->swizzle_g,
234 cso->swizzle_b, cso->swizzle_a);
235
236 if (util_format_is_srgb(cso->format))
237 so->texconst0 |= A4XX_TEX_CONST_0_SRGB;
238
239 if (cso->target == PIPE_BUFFER) {
240 unsigned elements = cso->u.buf.last_element -
241 cso->u.buf.first_element + 1;
242 lvl = 0;
243 so->texconst1 =
244 A4XX_TEX_CONST_1_WIDTH(elements) |
245 A4XX_TEX_CONST_1_HEIGHT(1);
246 so->texconst2 =
247 A4XX_TEX_CONST_2_FETCHSIZE(fd4_pipe2fetchsize(cso->format)) |
248 A4XX_TEX_CONST_2_PITCH(elements * rsc->cpp);
249 so->offset = cso->u.buf.first_element *
250 util_format_get_blocksize(cso->format);
251 } else {
252 unsigned miplevels;
253
254 lvl = fd_sampler_first_level(cso);
255 miplevels = fd_sampler_last_level(cso) - lvl;
256 layers = cso->u.tex.last_layer - cso->u.tex.first_layer + 1;
257
258 so->texconst0 |= A4XX_TEX_CONST_0_MIPLVLS(miplevels);
259 so->texconst1 =
260 A4XX_TEX_CONST_1_WIDTH(u_minify(prsc->width0, lvl)) |
261 A4XX_TEX_CONST_1_HEIGHT(u_minify(prsc->height0, lvl));
262 so->texconst2 =
263 A4XX_TEX_CONST_2_FETCHSIZE(fd4_pipe2fetchsize(cso->format)) |
264 A4XX_TEX_CONST_2_PITCH(
265 util_format_get_nblocksx(
266 cso->format, rsc->slices[lvl].pitch) * rsc->cpp);
267 so->offset = fd_resource_offset(rsc, lvl, cso->u.tex.first_layer);
268 }
269
270 switch (cso->target) {
271 case PIPE_TEXTURE_1D_ARRAY:
272 case PIPE_TEXTURE_2D_ARRAY:
273 so->texconst3 =
274 A4XX_TEX_CONST_3_DEPTH(layers) |
275 A4XX_TEX_CONST_3_LAYERSZ(rsc->layer_size);
276 break;
277 case PIPE_TEXTURE_CUBE:
278 case PIPE_TEXTURE_CUBE_ARRAY:
279 so->texconst3 =
280 A4XX_TEX_CONST_3_DEPTH(layers / 6) |
281 A4XX_TEX_CONST_3_LAYERSZ(rsc->layer_size);
282 break;
283 case PIPE_TEXTURE_3D:
284 so->texconst3 =
285 A4XX_TEX_CONST_3_DEPTH(u_minify(prsc->depth0, lvl)) |
286 A4XX_TEX_CONST_3_LAYERSZ(rsc->slices[lvl].size0);
287 while (lvl < cso->u.tex.last_level && sz2 != rsc->slices[lvl+1].size0)
288 sz2 = rsc->slices[++lvl].size0;
289 so->texconst4 = A4XX_TEX_CONST_4_LAYERSZ(sz2);
290 break;
291 default:
292 so->texconst3 = 0x00000000;
293 break;
294 }
295
296 return &so->base;
297 }
298
299 void
300 fd4_texture_init(struct pipe_context *pctx)
301 {
302 pctx->create_sampler_state = fd4_sampler_state_create;
303 pctx->bind_sampler_states = fd4_sampler_states_bind;
304 pctx->create_sampler_view = fd4_sampler_view_create;
305 pctx->set_sampler_views = fd_set_sampler_views;
306 }