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freedreno/a6xx: blitter fixes
[mesa.git] / src / gallium / drivers / freedreno / a6xx / fd6_blitter.c
1 /*
2 * Copyright (C) 2017 Rob Clark <robclark@freedesktop.org>
3 * Copyright © 2018 Google, Inc.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
22 * SOFTWARE.
23 *
24 * Authors:
25 * Rob Clark <robclark@freedesktop.org>
26 */
27
28 #include "util/u_dump.h"
29
30 #include "freedreno_blitter.h"
31 #include "freedreno_fence.h"
32 #include "freedreno_resource.h"
33
34 #include "fd6_blitter.h"
35 #include "fd6_format.h"
36 #include "fd6_emit.h"
37
38 /* Make sure none of the requested dimensions extend beyond the size of the
39 * resource. Not entirely sure why this happens, but sometimes it does, and
40 * w/ 2d blt doesn't have wrap modes like a sampler, so force those cases
41 * back to u_blitter
42 */
43 static bool
44 ok_dims(const struct pipe_resource *r, const struct pipe_box *b, int lvl)
45 {
46 int last_layer =
47 r->target == PIPE_TEXTURE_3D ? u_minify(r->depth0, lvl)
48 : r->array_size;
49
50 return (b->x >= 0) && (b->x + b->width <= u_minify(r->width0, lvl)) &&
51 (b->y >= 0) && (b->y + b->height <= u_minify(r->height0, lvl)) &&
52 (b->z >= 0) && (b->z + b->depth <= last_layer);
53 }
54
55 #define DEBUG_BLIT_FALLBACK 0
56 #define fail_if(cond) \
57 do { \
58 if (cond) { \
59 if (DEBUG_BLIT_FALLBACK) { \
60 fprintf(stderr, "falling back: %s for blit:\n", #cond); \
61 util_dump_blit_info(stderr, info); \
62 fprintf(stderr, "\nsrc: "); \
63 util_dump_resource(stderr, info->src.resource); \
64 fprintf(stderr, "\ndst: "); \
65 util_dump_resource(stderr, info->dst.resource); \
66 fprintf(stderr, "\n"); \
67 } \
68 return false; \
69 } \
70 } while (0)
71
72 static bool
73 can_do_blit(const struct pipe_blit_info *info)
74 {
75 /* I think we can do scaling, but not in z dimension since that would
76 * require blending..
77 */
78 fail_if(info->dst.box.depth != info->src.box.depth);
79
80 /* We can blit if both or neither formats are compressed formats... */
81 fail_if(util_format_is_compressed(info->src.format) !=
82 util_format_is_compressed(info->src.format));
83
84 /* ... but only if they're the same compression format. */
85 fail_if(util_format_is_compressed(info->src.format) &&
86 info->src.format != info->dst.format);
87
88 /* hw ignores {SRC,DST}_INFO.COLOR_SWAP if {SRC,DST}_INFO.TILE_MODE
89 * is set (not linear). We can kind of get around that when tiling/
90 * untiling by setting both src and dst COLOR_SWAP=WZYX, but that
91 * means the formats must match:
92 */
93 fail_if((fd_resource(info->dst.resource)->tile_mode ||
94 fd_resource(info->src.resource)->tile_mode) &&
95 info->dst.format != info->src.format);
96
97 /* src box can be inverted, which we don't support.. dst box cannot: */
98 fail_if((info->src.box.width < 0) || (info->src.box.height < 0));
99
100 fail_if(!ok_dims(info->src.resource, &info->src.box, info->src.level));
101
102 fail_if(!ok_dims(info->dst.resource, &info->dst.box, info->dst.level));
103
104 debug_assert(info->dst.box.width >= 0);
105 debug_assert(info->dst.box.height >= 0);
106 debug_assert(info->dst.box.depth >= 0);
107
108 fail_if(info->dst.resource->nr_samples + info->src.resource->nr_samples > 2);
109
110 fail_if(info->window_rectangle_include);
111
112 fail_if(info->render_condition_enable);
113
114 fail_if(info->alpha_blend);
115
116 fail_if(info->mask != util_format_get_mask(info->src.format));
117
118 fail_if(info->mask != util_format_get_mask(info->dst.format));
119
120 return true;
121 }
122
123 static void
124 emit_setup(struct fd_ringbuffer *ring)
125 {
126 OUT_PKT7(ring, CP_EVENT_WRITE, 1);
127 OUT_RING(ring, PC_CCU_INVALIDATE_COLOR);
128
129 OUT_PKT7(ring, CP_EVENT_WRITE, 1);
130 OUT_RING(ring, LRZ_FLUSH);
131
132 OUT_PKT7(ring, CP_SKIP_IB2_ENABLE_GLOBAL, 1);
133 OUT_RING(ring, 0x0);
134
135 OUT_WFI5(ring);
136
137 OUT_PKT4(ring, REG_A6XX_RB_CCU_CNTL, 1);
138 OUT_RING(ring, 0x10000000);
139 }
140
141 static uint32_t
142 blit_control(enum a6xx_color_fmt fmt)
143 {
144 unsigned blit_cntl = 0xf00000;
145 blit_cntl |= A6XX_RB_2D_BLIT_CNTL_COLOR_FORMAT(fmt);
146 blit_cntl |= A6XX_RB_2D_BLIT_CNTL_IFMT(fd6_ifmt(fmt));
147 return blit_cntl;
148 }
149
150 /* buffers need to be handled specially since x/width can exceed the bounds
151 * supported by hw.. if necessary decompose into (potentially) two 2D blits
152 */
153 static void
154 emit_blit_buffer(struct fd_ringbuffer *ring, const struct pipe_blit_info *info)
155 {
156 const struct pipe_box *sbox = &info->src.box;
157 const struct pipe_box *dbox = &info->dst.box;
158 struct fd_resource *src, *dst;
159 unsigned sshift, dshift;
160
161 if (DEBUG_BLIT_FALLBACK) {
162 fprintf(stderr, "buffer blit: ");
163 util_dump_blit_info(stderr, info);
164 fprintf(stderr, "\ndst resource: ");
165 util_dump_resource(stderr, info->dst.resource);
166 fprintf(stderr, "\nsrc resource: ");
167 util_dump_resource(stderr, info->src.resource);
168 fprintf(stderr, "\n");
169 }
170
171 src = fd_resource(info->src.resource);
172 dst = fd_resource(info->dst.resource);
173
174 debug_assert(src->cpp == 1);
175 debug_assert(dst->cpp == 1);
176 debug_assert(info->src.resource->format == info->dst.resource->format);
177 debug_assert((sbox->y == 0) && (sbox->height == 1));
178 debug_assert((dbox->y == 0) && (dbox->height == 1));
179 debug_assert((sbox->z == 0) && (sbox->depth == 1));
180 debug_assert((dbox->z == 0) && (dbox->depth == 1));
181 debug_assert(sbox->width == dbox->width);
182 debug_assert(info->src.level == 0);
183 debug_assert(info->dst.level == 0);
184
185 /*
186 * Buffers can have dimensions bigger than max width, remap into
187 * multiple 1d blits to fit within max dimension
188 *
189 * Note that blob uses .ARRAY_PITCH=128 for blitting buffers, which
190 * seems to prevent overfetch related faults. Not quite sure what
191 * the deal is there.
192 *
193 * Low 6 bits of SRC/DST addresses need to be zero (ie. address
194 * aligned to 64) so we need to shift src/dst x1/x2 to make up the
195 * difference. On top of already splitting up the blit so width
196 * isn't > 16k.
197 *
198 * We perhaps could do a bit better, if src and dst are aligned but
199 * in the worst case this means we have to split the copy up into
200 * 16k (0x4000) minus 64 (0x40).
201 */
202
203 sshift = sbox->x & 0x3f;
204 dshift = dbox->x & 0x3f;
205
206 OUT_PKT7(ring, CP_SET_MARKER, 1);
207 OUT_RING(ring, A2XX_CP_SET_MARKER_0_MODE(RM6_BLIT2DSCALE));
208
209 uint32_t blit_cntl = blit_control(RB6_R8_UNORM) | 0x20000000;
210 OUT_PKT4(ring, REG_A6XX_RB_2D_BLIT_CNTL, 1);
211 OUT_RING(ring, blit_cntl);
212
213 OUT_PKT4(ring, REG_A6XX_GRAS_2D_BLIT_CNTL, 1);
214 OUT_RING(ring, blit_cntl);
215
216 for (unsigned off = 0; off < sbox->width; off += (0x4000 - 0x40)) {
217 unsigned soff, doff, w, p;
218
219 soff = (sbox->x + off) & ~0x3f;
220 doff = (dbox->x + off) & ~0x3f;
221
222 w = MIN2(sbox->width - off, (0x4000 - 0x40));
223 p = align(w, 64);
224
225 debug_assert((soff + w) <= fd_bo_size(src->bo));
226 debug_assert((doff + w) <= fd_bo_size(dst->bo));
227
228 /*
229 * Emit source:
230 */
231 OUT_PKT4(ring, REG_A6XX_SP_PS_2D_SRC_INFO, 13);
232 OUT_RING(ring, A6XX_SP_PS_2D_SRC_INFO_COLOR_FORMAT(RB6_R8_UNORM) |
233 A6XX_SP_PS_2D_SRC_INFO_TILE_MODE(TILE6_LINEAR) |
234 A6XX_SP_PS_2D_SRC_INFO_COLOR_SWAP(WZYX) | 0x500000);
235 OUT_RING(ring, A6XX_SP_PS_2D_SRC_SIZE_WIDTH(sshift + w) |
236 A6XX_SP_PS_2D_SRC_SIZE_HEIGHT(1)); /* SP_PS_2D_SRC_SIZE */
237 OUT_RELOC(ring, src->bo, soff, 0, 0); /* SP_PS_2D_SRC_LO/HI */
238 OUT_RING(ring, A6XX_SP_PS_2D_SRC_PITCH_PITCH(p));
239
240 OUT_RING(ring, 0x00000000);
241 OUT_RING(ring, 0x00000000);
242 OUT_RING(ring, 0x00000000);
243 OUT_RING(ring, 0x00000000);
244 OUT_RING(ring, 0x00000000);
245
246 OUT_RING(ring, 0x00000000);
247 OUT_RING(ring, 0x00000000);
248 OUT_RING(ring, 0x00000000);
249
250 /*
251 * Emit destination:
252 */
253 OUT_PKT4(ring, REG_A6XX_RB_2D_DST_INFO, 9);
254 OUT_RING(ring, A6XX_RB_2D_DST_INFO_COLOR_FORMAT(RB6_R8_UNORM) |
255 A6XX_RB_2D_DST_INFO_TILE_MODE(TILE6_LINEAR) |
256 A6XX_RB_2D_DST_INFO_COLOR_SWAP(WZYX));
257 OUT_RELOC(ring, dst->bo, doff, 0, 0); /* RB_2D_DST_LO/HI */
258 OUT_RING(ring, A6XX_RB_2D_DST_SIZE_PITCH(p));
259 OUT_RING(ring, 0x00000000);
260 OUT_RING(ring, 0x00000000);
261 OUT_RING(ring, 0x00000000);
262 OUT_RING(ring, 0x00000000);
263 OUT_RING(ring, 0x00000000);
264
265 /*
266 * Blit command:
267 */
268 OUT_PKT4(ring, REG_A6XX_GRAS_2D_SRC_TL_X, 4);
269 OUT_RING(ring, A6XX_GRAS_2D_SRC_TL_X_X(sshift));
270 OUT_RING(ring, A6XX_GRAS_2D_SRC_BR_X_X(sshift + w - 1));
271 OUT_RING(ring, A6XX_GRAS_2D_SRC_TL_Y_Y(0));
272 OUT_RING(ring, A6XX_GRAS_2D_SRC_BR_Y_Y(0));
273
274 OUT_PKT4(ring, REG_A6XX_GRAS_2D_DST_TL, 2);
275 OUT_RING(ring, A6XX_GRAS_2D_DST_TL_X(dshift) | A6XX_GRAS_2D_DST_TL_Y(0));
276 OUT_RING(ring, A6XX_GRAS_2D_DST_BR_X(dshift + w - 1) | A6XX_GRAS_2D_DST_BR_Y(0));
277
278 OUT_PKT7(ring, CP_EVENT_WRITE, 1);
279 OUT_RING(ring, 0x3f);
280 OUT_WFI5(ring);
281
282 OUT_PKT4(ring, 0x8c01, 1);
283 OUT_RING(ring, 0);
284
285 OUT_PKT4(ring, 0xacc0, 1);
286 OUT_RING(ring, 0xf180);
287
288 OUT_PKT4(ring, 0x8e04, 1);
289 OUT_RING(ring, 0x01000000);
290
291 OUT_PKT7(ring, CP_BLIT, 1);
292 OUT_RING(ring, CP_BLIT_0_OP(BLIT_OP_SCALE));
293
294 OUT_WFI5(ring);
295
296 OUT_PKT4(ring, 0x8e04, 1);
297 OUT_RING(ring, 0);
298 }
299 }
300
301 static void
302 emit_blit_texture(struct fd_ringbuffer *ring, const struct pipe_blit_info *info)
303 {
304 const struct pipe_box *sbox = &info->src.box;
305 const struct pipe_box *dbox = &info->dst.box;
306 struct fd_resource *src, *dst;
307 struct fd_resource_slice *sslice, *dslice;
308 enum a6xx_color_fmt sfmt, dfmt;
309 enum a6xx_tile_mode stile, dtile;
310 enum a3xx_color_swap sswap, dswap;
311 unsigned spitch, dpitch;
312 unsigned sx1, sy1, sx2, sy2;
313 unsigned dx1, dy1, dx2, dy2;
314
315 if (DEBUG_BLIT_FALLBACK) {
316 fprintf(stderr, "texture blit: ");
317 util_dump_blit_info(stderr, info);
318 fprintf(stderr, "\ndst resource: ");
319 util_dump_resource(stderr, info->dst.resource);
320 fprintf(stderr, "\nsrc resource: ");
321 util_dump_resource(stderr, info->src.resource);
322 fprintf(stderr, "\n");
323 }
324
325 src = fd_resource(info->src.resource);
326 dst = fd_resource(info->dst.resource);
327
328 sslice = fd_resource_slice(src, info->src.level);
329 dslice = fd_resource_slice(dst, info->dst.level);
330
331 sfmt = fd6_pipe2color(info->src.format);
332 dfmt = fd6_pipe2color(info->dst.format);
333
334 int blocksize = util_format_get_blocksize(info->src.format);
335 int blockwidth = util_format_get_blockwidth(info->src.format);
336 int blockheight = util_format_get_blockheight(info->src.format);
337 int nelements;
338
339 stile = fd_resource_level_linear(info->src.resource, info->src.level) ?
340 TILE6_LINEAR : src->tile_mode;
341 dtile = fd_resource_level_linear(info->dst.resource, info->dst.level) ?
342 TILE6_LINEAR : dst->tile_mode;
343
344 sswap = fd6_pipe2swap(info->src.format);
345 dswap = fd6_pipe2swap(info->dst.format);
346
347 if (util_format_is_compressed(info->src.format)) {
348 debug_assert(info->src.format == info->dst.format);
349 sfmt = dfmt = RB6_R8_UNORM;
350 nelements = blocksize;
351 } else {
352 debug_assert(!util_format_is_compressed(info->dst.format));
353 nelements = 1;
354 }
355
356 spitch = DIV_ROUND_UP(sslice->pitch, blockwidth) * src->cpp;
357 dpitch = DIV_ROUND_UP(dslice->pitch, blockwidth) * dst->cpp;
358
359 sx1 = sbox->x / blockwidth * nelements;
360 sy1 = sbox->y / blockheight;
361 sx2 = DIV_ROUND_UP(sbox->x + sbox->width, blockwidth) * nelements - 1;
362 sy2 = DIV_ROUND_UP(sbox->y + sbox->height, blockheight) - 1;
363
364 dx1 = dbox->x / blockwidth * nelements;
365 dy1 = dbox->y / blockheight;
366 dx2 = DIV_ROUND_UP(dbox->x + dbox->width, blockwidth) * nelements - 1;
367 dy2 = DIV_ROUND_UP(dbox->y + dbox->height, blockheight) - 1;
368
369 uint32_t width = DIV_ROUND_UP(u_minify(src->base.width0, info->src.level), blockwidth) * nelements;
370 uint32_t height = DIV_ROUND_UP(u_minify(src->base.height0, info->src.level), blockheight);
371
372 /* if dtile, then dswap ignored by hw, and likewise if stile then sswap
373 * ignored by hw.. but in this case we have already rejected the blit
374 * if src and dst formats differ, so juse use WZYX for both src and
375 * dst swap mode (so we don't change component order)
376 */
377 if (stile || dtile) {
378 debug_assert(info->src.format == info->dst.format);
379 sswap = dswap = WZYX;
380 }
381
382 OUT_PKT7(ring, CP_SET_MARKER, 1);
383 OUT_RING(ring, A2XX_CP_SET_MARKER_0_MODE(RM6_BLIT2DSCALE));
384
385 uint32_t blit_cntl = blit_control(dfmt);
386
387 if (dtile != stile)
388 blit_cntl |= 0x20000000;
389
390 if (info->scissor_enable) {
391 OUT_PKT4(ring, REG_A6XX_GRAS_RESOLVE_CNTL_1, 2);
392 OUT_RING(ring, A6XX_GRAS_RESOLVE_CNTL_1_X(info->scissor.minx) |
393 A6XX_GRAS_RESOLVE_CNTL_1_Y(info->scissor.miny));
394 OUT_RING(ring, A6XX_GRAS_RESOLVE_CNTL_1_X(info->scissor.maxx - 1) |
395 A6XX_GRAS_RESOLVE_CNTL_1_Y(info->scissor.maxy - 1));
396 blit_cntl |= A6XX_RB_2D_BLIT_CNTL_SCISSOR;
397 }
398
399 OUT_PKT4(ring, REG_A6XX_RB_2D_BLIT_CNTL, 1);
400 OUT_RING(ring, blit_cntl);
401
402 OUT_PKT4(ring, REG_A6XX_GRAS_2D_BLIT_CNTL, 1);
403 OUT_RING(ring, blit_cntl);
404
405 for (unsigned i = 0; i < info->dst.box.depth; i++) {
406 unsigned soff = fd_resource_offset(src, info->src.level, sbox->z + i);
407 unsigned doff = fd_resource_offset(dst, info->dst.level, dbox->z + i);
408
409 /*
410 * Emit source:
411 */
412 uint32_t filter = 0;
413 if (info->filter == PIPE_TEX_FILTER_LINEAR)
414 filter = A6XX_SP_PS_2D_SRC_INFO_FILTER;
415
416 OUT_PKT4(ring, REG_A6XX_SP_PS_2D_SRC_INFO, 13);
417 OUT_RING(ring, A6XX_SP_PS_2D_SRC_INFO_COLOR_FORMAT(sfmt) |
418 A6XX_SP_PS_2D_SRC_INFO_TILE_MODE(stile) |
419 A6XX_SP_PS_2D_SRC_INFO_COLOR_SWAP(sswap) | 0x500000 | filter);
420 OUT_RING(ring, A6XX_SP_PS_2D_SRC_SIZE_WIDTH(width) |
421 A6XX_SP_PS_2D_SRC_SIZE_HEIGHT(height)); /* SP_PS_2D_SRC_SIZE */
422 OUT_RELOC(ring, src->bo, soff, 0, 0); /* SP_PS_2D_SRC_LO/HI */
423 OUT_RING(ring, A6XX_SP_PS_2D_SRC_PITCH_PITCH(spitch));
424 OUT_RING(ring, 0x00000000);
425 OUT_RING(ring, 0x00000000);
426 OUT_RING(ring, 0x00000000);
427 OUT_RING(ring, 0x00000000);
428 OUT_RING(ring, 0x00000000);
429
430 OUT_RING(ring, 0x00000000);
431 OUT_RING(ring, 0x00000000);
432 OUT_RING(ring, 0x00000000);
433
434 /*
435 * Emit destination:
436 */
437 OUT_PKT4(ring, REG_A6XX_RB_2D_DST_INFO, 9);
438 OUT_RING(ring, A6XX_RB_2D_DST_INFO_COLOR_FORMAT(dfmt) |
439 A6XX_RB_2D_DST_INFO_TILE_MODE(dtile) |
440 A6XX_RB_2D_DST_INFO_COLOR_SWAP(dswap));
441 OUT_RELOC(ring, dst->bo, doff, 0, 0); /* RB_2D_DST_LO/HI */
442 OUT_RING(ring, A6XX_RB_2D_DST_SIZE_PITCH(dpitch));
443 OUT_RING(ring, 0x00000000);
444 OUT_RING(ring, 0x00000000);
445 OUT_RING(ring, 0x00000000);
446 OUT_RING(ring, 0x00000000);
447 OUT_RING(ring, 0x00000000);
448
449 /*
450 * Blit command:
451 */
452 OUT_PKT4(ring, REG_A6XX_GRAS_2D_SRC_TL_X, 4);
453 OUT_RING(ring, A6XX_GRAS_2D_SRC_TL_X_X(sx1));
454 OUT_RING(ring, A6XX_GRAS_2D_SRC_BR_X_X(sx2));
455 OUT_RING(ring, A6XX_GRAS_2D_SRC_TL_Y_Y(sy1));
456 OUT_RING(ring, A6XX_GRAS_2D_SRC_BR_Y_Y(sy2));
457
458 OUT_PKT4(ring, REG_A6XX_GRAS_2D_DST_TL, 2);
459 OUT_RING(ring, A6XX_GRAS_2D_DST_TL_X(dx1) | A6XX_GRAS_2D_DST_TL_Y(dy1));
460 OUT_RING(ring, A6XX_GRAS_2D_DST_BR_X(dx2) | A6XX_GRAS_2D_DST_BR_Y(dy2));
461
462 OUT_PKT7(ring, CP_EVENT_WRITE, 1);
463 OUT_RING(ring, 0x3f);
464 OUT_WFI5(ring);
465
466 OUT_PKT4(ring, 0x8c01, 1);
467 OUT_RING(ring, 0);
468
469 OUT_PKT4(ring, 0xacc0, 1);
470 OUT_RING(ring, 0xf180);
471
472 OUT_PKT4(ring, 0x8e04, 1);
473 OUT_RING(ring, 0x01000000);
474
475 OUT_PKT7(ring, CP_BLIT, 1);
476 OUT_RING(ring, CP_BLIT_0_OP(BLIT_OP_SCALE));
477
478 OUT_WFI5(ring);
479
480 OUT_PKT4(ring, 0x8e04, 1);
481 OUT_RING(ring, 0);
482 }
483 }
484
485 static void
486 fd6_blit(struct pipe_context *pctx, const struct pipe_blit_info *info)
487 {
488 struct fd_context *ctx = fd_context(pctx);
489 struct fd_batch *batch;
490
491 if (!can_do_blit(info)) {
492 fd_blitter_pipe_begin(ctx, info->render_condition_enable, false, FD_STAGE_BLIT);
493 fd_blitter_blit(ctx, info);
494 fd_blitter_pipe_end(ctx);
495 return;
496 }
497
498 fd_fence_ref(pctx->screen, &ctx->last_fence, NULL);
499
500 batch = fd_bc_alloc_batch(&ctx->screen->batch_cache, ctx, true);
501
502 fd6_emit_restore(batch, batch->draw);
503 fd6_emit_lrz_flush(batch->draw);
504
505 mtx_lock(&ctx->screen->lock);
506
507 fd_batch_resource_used(batch, fd_resource(info->src.resource), false);
508 fd_batch_resource_used(batch, fd_resource(info->dst.resource), true);
509
510 mtx_unlock(&ctx->screen->lock);
511
512 emit_setup(batch->draw);
513
514 if ((info->src.resource->target == PIPE_BUFFER) &&
515 (info->dst.resource->target == PIPE_BUFFER)) {
516 assert(fd_resource(info->src.resource)->tile_mode == TILE6_LINEAR);
517 assert(fd_resource(info->dst.resource)->tile_mode == TILE6_LINEAR);
518 emit_blit_buffer(batch->draw, info);
519 } else {
520 /* I don't *think* we need to handle blits between buffer <-> !buffer */
521 debug_assert(info->src.resource->target != PIPE_BUFFER);
522 debug_assert(info->dst.resource->target != PIPE_BUFFER);
523 emit_blit_texture(batch->draw, info);
524 }
525
526 fd6_event_write(batch, batch->draw, 0x1d, true);
527 fd6_event_write(batch, batch->draw, FACENESS_FLUSH, true);
528 fd6_event_write(batch, batch->draw, CACHE_FLUSH_TS, true);
529
530 fd_resource(info->dst.resource)->valid = true;
531 batch->needs_flush = true;
532
533 fd_batch_flush(batch, false, false);
534 fd_batch_reference(&batch, NULL);
535 }
536
537 static void
538 fd6_resource_copy_region(struct pipe_context *pctx,
539 struct pipe_resource *dst,
540 unsigned dst_level,
541 unsigned dstx, unsigned dsty, unsigned dstz,
542 struct pipe_resource *src,
543 unsigned src_level,
544 const struct pipe_box *src_box)
545 {
546 struct pipe_blit_info info;
547
548 debug_assert(src->format == dst->format);
549
550 memset(&info, 0, sizeof info);
551 info.dst.resource = dst;
552 info.dst.level = dst_level;
553 info.dst.box.x = dstx;
554 info.dst.box.y = dsty;
555 info.dst.box.z = dstz;
556 info.dst.box.width = src_box->width;
557 info.dst.box.height = src_box->height;
558 assert(info.dst.box.width >= 0);
559 assert(info.dst.box.height >= 0);
560 info.dst.box.depth = 1;
561 info.dst.format = dst->format;
562 info.src.resource = src;
563 info.src.level = src_level;
564 info.src.box = *src_box;
565 info.src.format = src->format;
566 info.mask = util_format_get_mask(src->format);
567 info.filter = PIPE_TEX_FILTER_NEAREST;
568 info.scissor_enable = 0;
569
570 fd6_blit(pctx, &info);
571 }
572
573 void
574 fd6_blitter_init(struct pipe_context *pctx)
575 {
576 if (fd_mesa_debug & FD_DBG_NOBLIT)
577 return;
578
579 pctx->resource_copy_region = fd6_resource_copy_region;
580 pctx->blit = fd6_blit;
581 }
582
583 unsigned
584 fd6_tile_mode(const struct pipe_resource *tmpl)
585 {
586 /* basically just has to be a format we can blit, so uploads/downloads
587 * via linear staging buffer works:
588 */
589 return TILE6_3;
590 }