1a60f978597a1e642539890808fb58c08ecedfb3
[mesa.git] / src / gallium / drivers / freedreno / freedreno_context.h
1 /*
2 * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 * SOFTWARE.
22 *
23 * Authors:
24 * Rob Clark <robclark@freedesktop.org>
25 */
26
27 #ifndef FREEDRENO_CONTEXT_H_
28 #define FREEDRENO_CONTEXT_H_
29
30 #include "pipe/p_context.h"
31 #include "indices/u_primconvert.h"
32 #include "util/u_blitter.h"
33 #include "util/list.h"
34 #include "util/slab.h"
35 #include "util/u_string.h"
36
37 #include "freedreno_batch.h"
38 #include "freedreno_screen.h"
39 #include "freedreno_gmem.h"
40 #include "freedreno_util.h"
41
42 #define BORDER_COLOR_UPLOAD_SIZE (2 * PIPE_MAX_SAMPLERS * BORDERCOLOR_SIZE)
43
44 struct fd_vertex_stateobj;
45
46 struct fd_texture_stateobj {
47 struct pipe_sampler_view *textures[PIPE_MAX_SAMPLERS];
48 unsigned num_textures;
49 unsigned valid_textures;
50 struct pipe_sampler_state *samplers[PIPE_MAX_SAMPLERS];
51 unsigned num_samplers;
52 unsigned valid_samplers;
53 /* number of samples per sampler, 2 bits per sampler: */
54 uint32_t samples;
55 };
56
57 struct fd_program_stateobj {
58 void *vs, *hs, *ds, *gs, *fs;
59 };
60
61 struct fd_constbuf_stateobj {
62 struct pipe_constant_buffer cb[PIPE_MAX_CONSTANT_BUFFERS];
63 uint32_t enabled_mask;
64 };
65
66 struct fd_shaderbuf_stateobj {
67 struct pipe_shader_buffer sb[PIPE_MAX_SHADER_BUFFERS];
68 uint32_t enabled_mask;
69 };
70
71 struct fd_shaderimg_stateobj {
72 struct pipe_image_view si[PIPE_MAX_SHADER_IMAGES];
73 uint32_t enabled_mask;
74 };
75
76 struct fd_vertexbuf_stateobj {
77 struct pipe_vertex_buffer vb[PIPE_MAX_ATTRIBS];
78 unsigned count;
79 uint32_t enabled_mask;
80 };
81
82 struct fd_vertex_stateobj {
83 struct pipe_vertex_element pipe[PIPE_MAX_ATTRIBS];
84 unsigned num_elements;
85 };
86
87 struct fd_streamout_stateobj {
88 struct pipe_stream_output_target *targets[PIPE_MAX_SO_BUFFERS];
89 /* Bitmask of stream that should be reset. */
90 unsigned reset;
91
92 unsigned num_targets;
93 /* Track offset from vtxcnt for streamout data. This counter
94 * is just incremented by # of vertices on each draw until
95 * reset or new streamout buffer bound.
96 *
97 * When we eventually have GS, the CPU won't actually know the
98 * number of vertices per draw, so I think we'll have to do
99 * something more clever.
100 */
101 unsigned offsets[PIPE_MAX_SO_BUFFERS];
102 };
103
104 #define MAX_GLOBAL_BUFFERS 16
105 struct fd_global_bindings_stateobj {
106 struct pipe_resource *buf[MAX_GLOBAL_BUFFERS];
107 uint32_t enabled_mask;
108 };
109
110 /* group together the vertex and vertexbuf state.. for ease of passing
111 * around, and because various internal operations (gmem<->mem, etc)
112 * need their own vertex state:
113 */
114 struct fd_vertex_state {
115 struct fd_vertex_stateobj *vtx;
116 struct fd_vertexbuf_stateobj vertexbuf;
117 };
118
119 /* global 3d pipeline dirty state: */
120 enum fd_dirty_3d_state {
121 FD_DIRTY_BLEND = BIT(0),
122 FD_DIRTY_RASTERIZER = BIT(1),
123 FD_DIRTY_ZSA = BIT(2),
124 FD_DIRTY_BLEND_COLOR = BIT(3),
125 FD_DIRTY_STENCIL_REF = BIT(4),
126 FD_DIRTY_SAMPLE_MASK = BIT(5),
127 FD_DIRTY_FRAMEBUFFER = BIT(6),
128 FD_DIRTY_STIPPLE = BIT(7),
129 FD_DIRTY_VIEWPORT = BIT(8),
130 FD_DIRTY_VTXSTATE = BIT(9),
131 FD_DIRTY_VTXBUF = BIT(10),
132 FD_DIRTY_MIN_SAMPLES = BIT(11),
133
134 FD_DIRTY_SCISSOR = BIT(12),
135 FD_DIRTY_STREAMOUT = BIT(13),
136 FD_DIRTY_UCP = BIT(14),
137 FD_DIRTY_BLEND_DUAL = BIT(15),
138
139 /* These are a bit redundent with fd_dirty_shader_state, and possibly
140 * should be removed. (But OTOH kinda convenient in some places)
141 */
142 FD_DIRTY_PROG = BIT(16),
143 FD_DIRTY_CONST = BIT(17),
144 FD_DIRTY_TEX = BIT(18),
145
146 /* only used by a2xx.. possibly can be removed.. */
147 FD_DIRTY_TEXSTATE = BIT(19),
148 };
149
150 /* per shader-stage dirty state: */
151 enum fd_dirty_shader_state {
152 FD_DIRTY_SHADER_PROG = BIT(0),
153 FD_DIRTY_SHADER_CONST = BIT(1),
154 FD_DIRTY_SHADER_TEX = BIT(2),
155 FD_DIRTY_SHADER_SSBO = BIT(3),
156 FD_DIRTY_SHADER_IMAGE = BIT(4),
157 };
158
159 struct fd_context {
160 struct pipe_context base;
161
162 struct fd_device *dev;
163 struct fd_screen *screen;
164 struct fd_pipe *pipe;
165
166 struct util_queue flush_queue;
167
168 struct blitter_context *blitter;
169 void *clear_rs_state;
170 struct primconvert_context *primconvert;
171
172 /* slab for pipe_transfer allocations: */
173 struct slab_child_pool transfer_pool;
174
175 /**
176 * query related state:
177 */
178 /*@{*/
179 /* slabs for fd_hw_sample and fd_hw_sample_period allocations: */
180 struct slab_mempool sample_pool;
181 struct slab_mempool sample_period_pool;
182
183 /* sample-providers for hw queries: */
184 const struct fd_hw_sample_provider *hw_sample_providers[MAX_HW_SAMPLE_PROVIDERS];
185
186 /* list of active queries: */
187 struct list_head hw_active_queries;
188
189 /* sample-providers for accumulating hw queries: */
190 const struct fd_acc_sample_provider *acc_sample_providers[MAX_HW_SAMPLE_PROVIDERS];
191
192 /* list of active accumulating queries: */
193 struct list_head acc_active_queries;
194 /*@}*/
195
196 /* table with PIPE_PRIM_MAX entries mapping PIPE_PRIM_x to
197 * DI_PT_x value to use for draw initiator. There are some
198 * slight differences between generation:
199 */
200 const uint8_t *primtypes;
201 uint32_t primtype_mask;
202
203 /* shaders used by clear, and gmem->mem blits: */
204 struct fd_program_stateobj solid_prog; // TODO move to screen?
205
206 /* shaders used by mem->gmem blits: */
207 struct fd_program_stateobj blit_prog[MAX_RENDER_TARGETS]; // TODO move to screen?
208 struct fd_program_stateobj blit_z, blit_zs;
209
210 /* Stats/counters:
211 */
212 struct {
213 uint64_t prims_emitted;
214 uint64_t prims_generated;
215 uint64_t draw_calls;
216 uint64_t batch_total, batch_sysmem, batch_gmem, batch_nondraw, batch_restore;
217 uint64_t staging_uploads, shadow_uploads;
218 uint64_t vs_regs, hs_regs, ds_regs, gs_regs, fs_regs;
219 } stats;
220
221 /* Current batch.. the rule here is that you can deref ctx->batch
222 * in codepaths from pipe_context entrypoints. But not in code-
223 * paths from fd_batch_flush() (basically, the stuff that gets
224 * called from GMEM code), since in those code-paths the batch
225 * you care about is not necessarily the same as ctx->batch.
226 */
227 struct fd_batch *batch;
228
229 /* NULL if there has been rendering since last flush. Otherwise
230 * keeps a reference to the last fence so we can re-use it rather
231 * than having to flush no-op batch.
232 */
233 struct pipe_fence_handle *last_fence;
234
235 /* track last known reset status globally and per-context to
236 * determine if more resets occurred since then. If global reset
237 * count increases, it means some other context crashed. If
238 * per-context reset count increases, it means we crashed the
239 * gpu.
240 */
241 uint32_t context_reset_count, global_reset_count;
242
243 /* Are we in process of shadowing a resource? Used to detect recursion
244 * in transfer_map, and skip unneeded synchronization.
245 */
246 bool in_shadow : 1;
247
248 /* Ie. in blit situation where we no longer care about previous framebuffer
249 * contents. Main point is to eliminate blits from fd_try_shadow_resource().
250 * For example, in case of texture upload + gen-mipmaps.
251 */
252 bool in_blit : 1;
253
254 struct pipe_scissor_state scissor;
255
256 /* we don't have a disable/enable bit for scissor, so instead we keep
257 * a disabled-scissor state which matches the entire bound framebuffer
258 * and use that when scissor is not enabled.
259 */
260 struct pipe_scissor_state disabled_scissor;
261
262 /* Current gmem/tiling configuration.. gets updated on render_tiles()
263 * if out of date with current maximal-scissor/cpp:
264 *
265 * (NOTE: this is kind of related to the batch, but moving it there
266 * means we'd always have to recalc tiles ever batch)
267 */
268 struct fd_gmem_stateobj gmem;
269
270 /* Per vsc pipe bo's (a2xx-a5xx): */
271 struct fd_bo *vsc_pipe_bo[32];
272
273 /* which state objects need to be re-emit'd: */
274 enum fd_dirty_3d_state dirty;
275
276 /* per shader-stage dirty status: */
277 enum fd_dirty_shader_state dirty_shader[PIPE_SHADER_TYPES];
278
279 void *compute;
280 struct pipe_blend_state *blend;
281 struct pipe_rasterizer_state *rasterizer;
282 struct pipe_depth_stencil_alpha_state *zsa;
283
284 struct fd_texture_stateobj tex[PIPE_SHADER_TYPES];
285
286 struct fd_program_stateobj prog;
287
288 struct fd_vertex_state vtx;
289
290 struct pipe_blend_color blend_color;
291 struct pipe_stencil_ref stencil_ref;
292 unsigned sample_mask;
293 unsigned min_samples;
294 /* local context fb state, for when ctx->batch is null: */
295 struct pipe_framebuffer_state framebuffer;
296 struct pipe_poly_stipple stipple;
297 struct pipe_viewport_state viewport;
298 struct pipe_scissor_state viewport_scissor;
299 struct fd_constbuf_stateobj constbuf[PIPE_SHADER_TYPES];
300 struct fd_shaderbuf_stateobj shaderbuf[PIPE_SHADER_TYPES];
301 struct fd_shaderimg_stateobj shaderimg[PIPE_SHADER_TYPES];
302 struct fd_streamout_stateobj streamout;
303 struct fd_global_bindings_stateobj global_bindings;
304 struct pipe_clip_state ucp;
305
306 struct pipe_query *cond_query;
307 bool cond_cond; /* inverted rendering condition */
308 uint cond_mode;
309
310 struct pipe_debug_callback debug;
311
312 /* GMEM/tile handling fxns: */
313 void (*emit_tile_init)(struct fd_batch *batch);
314 void (*emit_tile_prep)(struct fd_batch *batch, const struct fd_tile *tile);
315 void (*emit_tile_mem2gmem)(struct fd_batch *batch, const struct fd_tile *tile);
316 void (*emit_tile_renderprep)(struct fd_batch *batch, const struct fd_tile *tile);
317 void (*emit_tile)(struct fd_batch *batch, const struct fd_tile *tile);
318 void (*emit_tile_gmem2mem)(struct fd_batch *batch, const struct fd_tile *tile);
319 void (*emit_tile_fini)(struct fd_batch *batch); /* optional */
320
321 /* optional, for GMEM bypass: */
322 void (*emit_sysmem_prep)(struct fd_batch *batch);
323 void (*emit_sysmem_fini)(struct fd_batch *batch);
324
325 /* draw: */
326 bool (*draw_vbo)(struct fd_context *ctx, const struct pipe_draw_info *info,
327 unsigned index_offset);
328 bool (*clear)(struct fd_context *ctx, unsigned buffers,
329 const union pipe_color_union *color, double depth, unsigned stencil);
330
331 /* compute: */
332 void (*launch_grid)(struct fd_context *ctx, const struct pipe_grid_info *info);
333
334 /* query: */
335 struct fd_query * (*create_query)(struct fd_context *ctx, unsigned query_type, unsigned index);
336 void (*query_prepare)(struct fd_batch *batch, uint32_t num_tiles);
337 void (*query_prepare_tile)(struct fd_batch *batch, uint32_t n,
338 struct fd_ringbuffer *ring);
339 void (*query_set_stage)(struct fd_batch *batch, enum fd_render_stage stage);
340
341 /* blitter: */
342 bool (*blit)(struct fd_context *ctx, const struct pipe_blit_info *info);
343
344 /* handling for barriers: */
345 void (*framebuffer_barrier)(struct fd_context *ctx);
346
347 /*
348 * Common pre-cooked VBO state (used for a3xx and later):
349 */
350
351 /* for clear/gmem->mem vertices, and mem->gmem */
352 struct pipe_resource *solid_vbuf;
353
354 /* for mem->gmem tex coords: */
355 struct pipe_resource *blit_texcoord_vbuf;
356
357 /* vertex state for solid_vbuf:
358 * - solid_vbuf / 12 / R32G32B32_FLOAT
359 */
360 struct fd_vertex_state solid_vbuf_state;
361
362 /* vertex state for blit_prog:
363 * - blit_texcoord_vbuf / 8 / R32G32_FLOAT
364 * - solid_vbuf / 12 / R32G32B32_FLOAT
365 */
366 struct fd_vertex_state blit_vbuf_state;
367
368 /*
369 * Info about state of previous draw, for state that comes from
370 * pipe_draw_info (ie. not part of a CSO). This allows us to
371 * skip some register emit when the state doesn't change from
372 * draw-to-draw
373 */
374 struct {
375 bool dirty; /* last draw state unknown */
376 bool primitive_restart;
377 uint32_t index_start;
378 uint32_t instance_start;
379 uint32_t restart_index;
380 } last;
381 };
382
383 static inline struct fd_context *
384 fd_context(struct pipe_context *pctx)
385 {
386 return (struct fd_context *)pctx;
387 }
388
389 static inline void
390 fd_context_assert_locked(struct fd_context *ctx)
391 {
392 pipe_mutex_assert_locked(ctx->screen->lock);
393 }
394
395 static inline void
396 fd_context_lock(struct fd_context *ctx)
397 {
398 mtx_lock(&ctx->screen->lock);
399 }
400
401 static inline void
402 fd_context_unlock(struct fd_context *ctx)
403 {
404 mtx_unlock(&ctx->screen->lock);
405 }
406
407 /* mark all state dirty: */
408 static inline void
409 fd_context_all_dirty(struct fd_context *ctx)
410 {
411 ctx->last.dirty = true;
412 ctx->dirty = ~0;
413 for (unsigned i = 0; i < PIPE_SHADER_TYPES; i++)
414 ctx->dirty_shader[i] = ~0;
415 }
416
417 static inline void
418 fd_context_all_clean(struct fd_context *ctx)
419 {
420 ctx->dirty = 0;
421 for (unsigned i = 0; i < PIPE_SHADER_TYPES; i++) {
422 /* don't mark compute state as clean, since it is not emitted
423 * during normal draw call. The places that call _all_dirty(),
424 * it is safe to mark compute state dirty as well, but the
425 * inverse is not true.
426 */
427 if (i == PIPE_SHADER_COMPUTE)
428 continue;
429 ctx->dirty_shader[i] = 0;
430 }
431 }
432
433 static inline struct pipe_scissor_state *
434 fd_context_get_scissor(struct fd_context *ctx)
435 {
436 if (ctx->rasterizer && ctx->rasterizer->scissor)
437 return &ctx->scissor;
438 return &ctx->disabled_scissor;
439 }
440
441 static inline bool
442 fd_supported_prim(struct fd_context *ctx, unsigned prim)
443 {
444 return (1 << prim) & ctx->primtype_mask;
445 }
446
447 static inline struct fd_batch *
448 fd_context_batch(struct fd_context *ctx)
449 {
450 if (unlikely(!ctx->batch)) {
451 struct fd_batch *batch =
452 fd_batch_from_fb(&ctx->screen->batch_cache, ctx, &ctx->framebuffer);
453 util_copy_framebuffer_state(&batch->framebuffer, &ctx->framebuffer);
454 ctx->batch = batch;
455 fd_context_all_dirty(ctx);
456 }
457 return ctx->batch;
458 }
459
460 static inline void
461 fd_batch_set_stage(struct fd_batch *batch, enum fd_render_stage stage)
462 {
463 struct fd_context *ctx = batch->ctx;
464
465 /* special case: internal blits (like mipmap level generation)
466 * go through normal draw path (via util_blitter_blit()).. but
467 * we need to ignore the FD_STAGE_DRAW which will be set, so we
468 * don't enable queries which should be paused during internal
469 * blits:
470 */
471 if ((batch->stage == FD_STAGE_BLIT) &&
472 (stage != FD_STAGE_NULL))
473 return;
474
475 if (ctx->query_set_stage)
476 ctx->query_set_stage(batch, stage);
477
478 batch->stage = stage;
479 }
480
481 void fd_context_setup_common_vbos(struct fd_context *ctx);
482 void fd_context_cleanup_common_vbos(struct fd_context *ctx);
483
484 struct pipe_context * fd_context_init(struct fd_context *ctx,
485 struct pipe_screen *pscreen, const uint8_t *primtypes,
486 void *priv, unsigned flags);
487
488 void fd_context_destroy(struct pipe_context *pctx);
489
490 #endif /* FREEDRENO_CONTEXT_H_ */