freedreno/a6xx: move ubwc clear to blitter
[mesa.git] / src / gallium / drivers / freedreno / freedreno_context.h
1 /*
2 * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
21 * SOFTWARE.
22 *
23 * Authors:
24 * Rob Clark <robclark@freedesktop.org>
25 */
26
27 #ifndef FREEDRENO_CONTEXT_H_
28 #define FREEDRENO_CONTEXT_H_
29
30 #include "pipe/p_context.h"
31 #include "indices/u_primconvert.h"
32 #include "util/u_blitter.h"
33 #include "util/list.h"
34 #include "util/slab.h"
35 #include "util/u_string.h"
36
37 #include "freedreno_batch.h"
38 #include "freedreno_screen.h"
39 #include "freedreno_gmem.h"
40 #include "freedreno_util.h"
41
42 #define BORDER_COLOR_UPLOAD_SIZE (2 * PIPE_MAX_SAMPLERS * BORDERCOLOR_SIZE)
43
44 struct fd_vertex_stateobj;
45
46 struct fd_texture_stateobj {
47 struct pipe_sampler_view *textures[PIPE_MAX_SAMPLERS];
48 unsigned num_textures;
49 unsigned valid_textures;
50 struct pipe_sampler_state *samplers[PIPE_MAX_SAMPLERS];
51 unsigned num_samplers;
52 unsigned valid_samplers;
53 /* number of samples per sampler, 2 bits per sampler: */
54 uint32_t samples;
55 };
56
57 struct fd_program_stateobj {
58 void *vs, *hs, *ds, *gs, *fs;
59 };
60
61 struct fd_constbuf_stateobj {
62 struct pipe_constant_buffer cb[PIPE_MAX_CONSTANT_BUFFERS];
63 uint32_t enabled_mask;
64 };
65
66 struct fd_shaderbuf_stateobj {
67 struct pipe_shader_buffer sb[PIPE_MAX_SHADER_BUFFERS];
68 uint32_t enabled_mask;
69 uint32_t writable_mask;
70 };
71
72 struct fd_shaderimg_stateobj {
73 struct pipe_image_view si[PIPE_MAX_SHADER_IMAGES];
74 uint32_t enabled_mask;
75 };
76
77 struct fd_vertexbuf_stateobj {
78 struct pipe_vertex_buffer vb[PIPE_MAX_ATTRIBS];
79 unsigned count;
80 uint32_t enabled_mask;
81 };
82
83 struct fd_vertex_stateobj {
84 struct pipe_vertex_element pipe[PIPE_MAX_ATTRIBS];
85 unsigned num_elements;
86 };
87
88 struct fd_streamout_stateobj {
89 struct pipe_stream_output_target *targets[PIPE_MAX_SO_BUFFERS];
90 /* Bitmask of stream that should be reset. */
91 unsigned reset;
92
93 unsigned num_targets;
94 /* Track offset from vtxcnt for streamout data. This counter
95 * is just incremented by # of vertices on each draw until
96 * reset or new streamout buffer bound.
97 *
98 * When we eventually have GS, the CPU won't actually know the
99 * number of vertices per draw, so I think we'll have to do
100 * something more clever.
101 */
102 unsigned offsets[PIPE_MAX_SO_BUFFERS];
103 };
104
105 #define MAX_GLOBAL_BUFFERS 16
106 struct fd_global_bindings_stateobj {
107 struct pipe_resource *buf[MAX_GLOBAL_BUFFERS];
108 uint32_t enabled_mask;
109 };
110
111 /* group together the vertex and vertexbuf state.. for ease of passing
112 * around, and because various internal operations (gmem<->mem, etc)
113 * need their own vertex state:
114 */
115 struct fd_vertex_state {
116 struct fd_vertex_stateobj *vtx;
117 struct fd_vertexbuf_stateobj vertexbuf;
118 };
119
120 /* global 3d pipeline dirty state: */
121 enum fd_dirty_3d_state {
122 FD_DIRTY_BLEND = BIT(0),
123 FD_DIRTY_RASTERIZER = BIT(1),
124 FD_DIRTY_ZSA = BIT(2),
125 FD_DIRTY_BLEND_COLOR = BIT(3),
126 FD_DIRTY_STENCIL_REF = BIT(4),
127 FD_DIRTY_SAMPLE_MASK = BIT(5),
128 FD_DIRTY_FRAMEBUFFER = BIT(6),
129 FD_DIRTY_STIPPLE = BIT(7),
130 FD_DIRTY_VIEWPORT = BIT(8),
131 FD_DIRTY_VTXSTATE = BIT(9),
132 FD_DIRTY_VTXBUF = BIT(10),
133 FD_DIRTY_MIN_SAMPLES = BIT(11),
134 FD_DIRTY_SCISSOR = BIT(12),
135 FD_DIRTY_STREAMOUT = BIT(13),
136 FD_DIRTY_UCP = BIT(14),
137 FD_DIRTY_BLEND_DUAL = BIT(15),
138
139 /* These are a bit redundent with fd_dirty_shader_state, and possibly
140 * should be removed. (But OTOH kinda convenient in some places)
141 */
142 FD_DIRTY_PROG = BIT(16),
143 FD_DIRTY_CONST = BIT(17),
144 FD_DIRTY_TEX = BIT(18),
145 FD_DIRTY_IMAGE = BIT(19),
146 FD_DIRTY_SSBO = BIT(20),
147
148 /* only used by a2xx.. possibly can be removed.. */
149 FD_DIRTY_TEXSTATE = BIT(21),
150
151 /* fine grained state changes, for cases where state is not orthogonal
152 * from hw perspective:
153 */
154 FD_DIRTY_RASTERIZER_DISCARD = BIT(24),
155 };
156
157 /* per shader-stage dirty state: */
158 enum fd_dirty_shader_state {
159 FD_DIRTY_SHADER_PROG = BIT(0),
160 FD_DIRTY_SHADER_CONST = BIT(1),
161 FD_DIRTY_SHADER_TEX = BIT(2),
162 FD_DIRTY_SHADER_SSBO = BIT(3),
163 FD_DIRTY_SHADER_IMAGE = BIT(4),
164 };
165
166 struct fd_context {
167 struct pipe_context base;
168
169 struct list_head node; /* node in screen->context_list */
170
171 /* We currently need to serialize emitting GMEM batches, because of
172 * VSC state access in the context.
173 *
174 * In practice this lock should not be contended, since pipe_context
175 * use should be single threaded. But it is needed to protect the
176 * case, with batch reordering where a ctxB batch triggers flushing
177 * a ctxA batch
178 */
179 mtx_t gmem_lock;
180
181 struct fd_device *dev;
182 struct fd_screen *screen;
183 struct fd_pipe *pipe;
184
185 struct blitter_context *blitter;
186 void *clear_rs_state;
187 struct primconvert_context *primconvert;
188
189 /* slab for pipe_transfer allocations: */
190 struct slab_child_pool transfer_pool;
191
192 /**
193 * query related state:
194 */
195 /*@{*/
196 /* slabs for fd_hw_sample and fd_hw_sample_period allocations: */
197 struct slab_mempool sample_pool;
198 struct slab_mempool sample_period_pool;
199
200 /* sample-providers for hw queries: */
201 const struct fd_hw_sample_provider *hw_sample_providers[MAX_HW_SAMPLE_PROVIDERS];
202
203 /* list of active queries: */
204 struct list_head hw_active_queries;
205
206 /* sample-providers for accumulating hw queries: */
207 const struct fd_acc_sample_provider *acc_sample_providers[MAX_HW_SAMPLE_PROVIDERS];
208
209 /* list of active accumulating queries: */
210 struct list_head acc_active_queries;
211 /*@}*/
212
213 /* Whether we need to walk the acc_active_queries next fd_set_stage() to
214 * update active queries (even if stage doesn't change).
215 */
216 bool update_active_queries;
217
218 /* Current state of pctx->set_active_query_state() (i.e. "should drawing
219 * be counted against non-perfcounter queries")
220 */
221 bool active_queries;
222
223 /* table with PIPE_PRIM_MAX entries mapping PIPE_PRIM_x to
224 * DI_PT_x value to use for draw initiator. There are some
225 * slight differences between generation:
226 */
227 const uint8_t *primtypes;
228 uint32_t primtype_mask;
229
230 /* shaders used by clear, and gmem->mem blits: */
231 struct fd_program_stateobj solid_prog; // TODO move to screen?
232
233 /* shaders used by mem->gmem blits: */
234 struct fd_program_stateobj blit_prog[MAX_RENDER_TARGETS]; // TODO move to screen?
235 struct fd_program_stateobj blit_z, blit_zs;
236
237 /* Stats/counters:
238 */
239 struct {
240 uint64_t prims_emitted;
241 uint64_t prims_generated;
242 uint64_t draw_calls;
243 uint64_t batch_total, batch_sysmem, batch_gmem, batch_nondraw, batch_restore;
244 uint64_t staging_uploads, shadow_uploads;
245 uint64_t vs_regs, hs_regs, ds_regs, gs_regs, fs_regs;
246 } stats;
247
248 /* Current batch.. the rule here is that you can deref ctx->batch
249 * in codepaths from pipe_context entrypoints. But not in code-
250 * paths from fd_batch_flush() (basically, the stuff that gets
251 * called from GMEM code), since in those code-paths the batch
252 * you care about is not necessarily the same as ctx->batch.
253 */
254 struct fd_batch *batch;
255
256 /* NULL if there has been rendering since last flush. Otherwise
257 * keeps a reference to the last fence so we can re-use it rather
258 * than having to flush no-op batch.
259 */
260 struct pipe_fence_handle *last_fence;
261
262 /* track last known reset status globally and per-context to
263 * determine if more resets occurred since then. If global reset
264 * count increases, it means some other context crashed. If
265 * per-context reset count increases, it means we crashed the
266 * gpu.
267 */
268 uint32_t context_reset_count, global_reset_count;
269
270 /* Are we in process of shadowing a resource? Used to detect recursion
271 * in transfer_map, and skip unneeded synchronization.
272 */
273 bool in_shadow : 1;
274
275 /* Ie. in blit situation where we no longer care about previous framebuffer
276 * contents. Main point is to eliminate blits from fd_try_shadow_resource().
277 * For example, in case of texture upload + gen-mipmaps.
278 */
279 bool in_discard_blit : 1;
280
281 /* points to either scissor or disabled_scissor depending on rast state: */
282 struct pipe_scissor_state *current_scissor;
283
284 struct pipe_scissor_state scissor;
285
286 /* we don't have a disable/enable bit for scissor, so instead we keep
287 * a disabled-scissor state which matches the entire bound framebuffer
288 * and use that when scissor is not enabled.
289 */
290 struct pipe_scissor_state disabled_scissor;
291
292 /* Per vsc pipe bo's (a2xx-a5xx): */
293 struct fd_bo *vsc_pipe_bo[32];
294
295 /* which state objects need to be re-emit'd: */
296 enum fd_dirty_3d_state dirty;
297
298 /* per shader-stage dirty status: */
299 enum fd_dirty_shader_state dirty_shader[PIPE_SHADER_TYPES];
300
301 void *compute;
302 struct pipe_blend_state *blend;
303 struct pipe_rasterizer_state *rasterizer;
304 struct pipe_depth_stencil_alpha_state *zsa;
305
306 struct fd_texture_stateobj tex[PIPE_SHADER_TYPES];
307
308 struct fd_program_stateobj prog;
309
310 struct fd_vertex_state vtx;
311
312 struct pipe_blend_color blend_color;
313 struct pipe_stencil_ref stencil_ref;
314 unsigned sample_mask;
315 unsigned min_samples;
316 /* local context fb state, for when ctx->batch is null: */
317 struct pipe_framebuffer_state framebuffer;
318 struct pipe_poly_stipple stipple;
319 struct pipe_viewport_state viewport;
320 struct pipe_scissor_state viewport_scissor;
321 struct fd_constbuf_stateobj constbuf[PIPE_SHADER_TYPES];
322 struct fd_shaderbuf_stateobj shaderbuf[PIPE_SHADER_TYPES];
323 struct fd_shaderimg_stateobj shaderimg[PIPE_SHADER_TYPES];
324 struct fd_streamout_stateobj streamout;
325 struct fd_global_bindings_stateobj global_bindings;
326 struct pipe_clip_state ucp;
327
328 struct pipe_query *cond_query;
329 bool cond_cond; /* inverted rendering condition */
330 uint cond_mode;
331
332 struct pipe_debug_callback debug;
333
334 /* Called on rebind_resource() for any per-gen cleanup required: */
335 void (*rebind_resource)(struct fd_context *ctx, struct fd_resource *rsc);
336
337 /* GMEM/tile handling fxns: */
338 void (*emit_tile_init)(struct fd_batch *batch);
339 void (*emit_tile_prep)(struct fd_batch *batch, const struct fd_tile *tile);
340 void (*emit_tile_mem2gmem)(struct fd_batch *batch, const struct fd_tile *tile);
341 void (*emit_tile_renderprep)(struct fd_batch *batch, const struct fd_tile *tile);
342 void (*emit_tile)(struct fd_batch *batch, const struct fd_tile *tile);
343 void (*emit_tile_gmem2mem)(struct fd_batch *batch, const struct fd_tile *tile);
344 void (*emit_tile_fini)(struct fd_batch *batch); /* optional */
345
346 /* optional, for GMEM bypass: */
347 void (*emit_sysmem_prep)(struct fd_batch *batch);
348 void (*emit_sysmem_fini)(struct fd_batch *batch);
349
350 /* draw: */
351 bool (*draw_vbo)(struct fd_context *ctx, const struct pipe_draw_info *info,
352 unsigned index_offset);
353 bool (*clear)(struct fd_context *ctx, unsigned buffers,
354 const union pipe_color_union *color, double depth, unsigned stencil);
355
356 /* compute: */
357 void (*launch_grid)(struct fd_context *ctx, const struct pipe_grid_info *info);
358
359 /* query: */
360 struct fd_query * (*create_query)(struct fd_context *ctx, unsigned query_type, unsigned index);
361 void (*query_prepare)(struct fd_batch *batch, uint32_t num_tiles);
362 void (*query_prepare_tile)(struct fd_batch *batch, uint32_t n,
363 struct fd_ringbuffer *ring);
364 void (*query_set_stage)(struct fd_batch *batch, enum fd_render_stage stage);
365
366 /* blitter: */
367 bool (*blit)(struct fd_context *ctx, const struct pipe_blit_info *info);
368 void (*clear_ubwc)(struct fd_batch *batch, struct fd_resource *rsc);
369
370 /* handling for barriers: */
371 void (*framebuffer_barrier)(struct fd_context *ctx);
372
373 /* logger: */
374 void (*record_timestamp)(struct fd_ringbuffer *ring, struct fd_bo *bo, unsigned offset);
375 uint64_t (*ts_to_ns)(uint64_t ts);
376
377 struct list_head log_chunks; /* list of flushed log chunks in fifo order */
378 unsigned frame_nr; /* frame counter (for fd_log) */
379 FILE *log_out;
380
381 /*
382 * Common pre-cooked VBO state (used for a3xx and later):
383 */
384
385 /* for clear/gmem->mem vertices, and mem->gmem */
386 struct pipe_resource *solid_vbuf;
387
388 /* for mem->gmem tex coords: */
389 struct pipe_resource *blit_texcoord_vbuf;
390
391 /* vertex state for solid_vbuf:
392 * - solid_vbuf / 12 / R32G32B32_FLOAT
393 */
394 struct fd_vertex_state solid_vbuf_state;
395
396 /* vertex state for blit_prog:
397 * - blit_texcoord_vbuf / 8 / R32G32_FLOAT
398 * - solid_vbuf / 12 / R32G32B32_FLOAT
399 */
400 struct fd_vertex_state blit_vbuf_state;
401
402 /*
403 * Info about state of previous draw, for state that comes from
404 * pipe_draw_info (ie. not part of a CSO). This allows us to
405 * skip some register emit when the state doesn't change from
406 * draw-to-draw
407 */
408 struct {
409 bool dirty; /* last draw state unknown */
410 bool primitive_restart;
411 uint32_t index_start;
412 uint32_t instance_start;
413 uint32_t restart_index;
414 uint32_t streamout_mask;
415 } last;
416 };
417
418 static inline struct fd_context *
419 fd_context(struct pipe_context *pctx)
420 {
421 return (struct fd_context *)pctx;
422 }
423
424 static inline void
425 fd_context_assert_locked(struct fd_context *ctx)
426 {
427 fd_screen_assert_locked(ctx->screen);
428 }
429
430 static inline void
431 fd_context_lock(struct fd_context *ctx)
432 {
433 fd_screen_lock(ctx->screen);
434 }
435
436 static inline void
437 fd_context_unlock(struct fd_context *ctx)
438 {
439 fd_screen_unlock(ctx->screen);
440 }
441
442 /* mark all state dirty: */
443 static inline void
444 fd_context_all_dirty(struct fd_context *ctx)
445 {
446 ctx->last.dirty = true;
447 ctx->dirty = ~0;
448 for (unsigned i = 0; i < PIPE_SHADER_TYPES; i++)
449 ctx->dirty_shader[i] = ~0;
450 }
451
452 static inline void
453 fd_context_all_clean(struct fd_context *ctx)
454 {
455 ctx->last.dirty = false;
456 ctx->dirty = 0;
457 for (unsigned i = 0; i < PIPE_SHADER_TYPES; i++) {
458 /* don't mark compute state as clean, since it is not emitted
459 * during normal draw call. The places that call _all_dirty(),
460 * it is safe to mark compute state dirty as well, but the
461 * inverse is not true.
462 */
463 if (i == PIPE_SHADER_COMPUTE)
464 continue;
465 ctx->dirty_shader[i] = 0;
466 }
467 }
468
469 static inline struct pipe_scissor_state *
470 fd_context_get_scissor(struct fd_context *ctx)
471 {
472 return ctx->current_scissor;
473 }
474
475 static inline bool
476 fd_supported_prim(struct fd_context *ctx, unsigned prim)
477 {
478 return (1 << prim) & ctx->primtype_mask;
479 }
480
481 static inline struct fd_batch *
482 fd_context_batch(struct fd_context *ctx)
483 {
484 if (unlikely(!ctx->batch)) {
485 struct fd_batch *batch =
486 fd_batch_from_fb(&ctx->screen->batch_cache, ctx, &ctx->framebuffer);
487 util_copy_framebuffer_state(&batch->framebuffer, &ctx->framebuffer);
488 ctx->batch = batch;
489 fd_context_all_dirty(ctx);
490 }
491 return ctx->batch;
492 }
493
494 static inline void
495 fd_batch_set_stage(struct fd_batch *batch, enum fd_render_stage stage)
496 {
497 struct fd_context *ctx = batch->ctx;
498
499 if (ctx->query_set_stage)
500 ctx->query_set_stage(batch, stage);
501
502 batch->stage = stage;
503 }
504
505 void fd_context_setup_common_vbos(struct fd_context *ctx);
506 void fd_context_cleanup_common_vbos(struct fd_context *ctx);
507 void fd_emit_string(struct fd_ringbuffer *ring, const char *string, int len);
508 void fd_emit_string5(struct fd_ringbuffer *ring, const char *string, int len);
509
510 struct pipe_context * fd_context_init(struct fd_context *ctx,
511 struct pipe_screen *pscreen, const uint8_t *primtypes,
512 void *priv, unsigned flags);
513
514 void fd_context_destroy(struct pipe_context *pctx);
515
516 #endif /* FREEDRENO_CONTEXT_H_ */