src/gallium/drivers/freedreno/freedreno_draw.h

   1 /*
   2  * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  20  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  21  * SOFTWARE.
  22  *
  23  * Authors:
  24  *    Rob Clark <robclark@freedesktop.org>
  25  */
  26
  27 #ifndef FREEDRENO_DRAW_H_
  28 #define FREEDRENO_DRAW_H_
  29
  30 #include "pipe/p_state.h"
  31 #include "pipe/p_context.h"
  32
  33 #include "freedreno_context.h"
  34 #include "freedreno_resource.h"
  35 #include "freedreno_screen.h"
  36 #include "freedreno_util.h"
  37
  38 struct fd_ringbuffer;
  39
  40 void fd_draw_init(struct pipe_context *pctx);
  41
  42 static inline void
  43 fd_draw(struct fd_batch *batch, struct fd_ringbuffer *ring,
  44                 enum pc_di_primtype primtype,
  45                 enum pc_di_vis_cull_mode vismode,
  46                 enum pc_di_src_sel src_sel, uint32_t count,
  47                 uint8_t instances,
  48                 enum pc_di_index_size idx_type,
  49                 uint32_t idx_size, uint32_t idx_offset,
  50                 struct pipe_resource *idx_buffer)
  51 {
  52         /* for debug after a lock up, write a unique counter value
  53          * to scratch7 for each draw, to make it easier to match up
  54          * register dumps to cmdstream.  The combination of IB
  55          * (scratch6) and DRAW is enough to "triangulate" the
  56          * particular draw that caused lockup.
  57          */
  58         emit_marker(ring, 7);
  59
  60         if (is_a3xx_p0(batch->ctx->screen)) {
  61                 /* dummy-draw workaround: */
  62                 OUT_PKT3(ring, CP_DRAW_INDX, 3);
  63                 OUT_RING(ring, 0x00000000);
  64                 OUT_RING(ring, DRAW(1, DI_SRC_SEL_AUTO_INDEX,
  65                                                         INDEX_SIZE_IGN, USE_VISIBILITY, 0));
  66                 OUT_RING(ring, 0);             /* NumIndices */
  67
  68                 /* ugg, hard-code register offset to avoid pulling in the
  69                  * a3xx register headers into something #included from a2xx
  70                  */
  71                 OUT_PKT0(ring, 0x2206, 1);     /* A3XX_HLSQ_CONST_VSPRESV_RANGE_REG */
  72                 OUT_RING(ring, 0);
  73         }
  74
  75         if (is_a20x(batch->ctx->screen)) {
  76                 /* a20x has a different draw command for drawing with binning data
  77                  * note: if we do patching we will have to insert a NOP
  78                  *
  79                  * binning data is is 1 byte/vertex (8x8x4 bin position of vertex)
  80                  * base ptr set by the CP_SET_DRAW_INIT_FLAGS command
  81                  *
  82                  * TODO: investigate the faceness_cull_select parameter to see how
  83                  * it is used with hw binning to use "faceness" bits
  84                  */
  85                 uint32_t size = 2;
  86                 if (vismode)
  87                         size += 2;
  88                 if (idx_buffer)
  89                         size += 2;
  90
  91                 BEGIN_RING(ring, size+1);
  92                 if (vismode)
  93                         util_dynarray_append(&batch->draw_patches, uint32_t*, ring->cur);
  94
  95                 OUT_PKT3(ring, vismode ? CP_DRAW_INDX_BIN : CP_DRAW_INDX, size);
  96                 OUT_RING(ring, 0x00000000);
  97                 OUT_RING(ring, DRAW_A20X(primtype, DI_FACE_CULL_NONE, src_sel,
  98                                                                  idx_type, vismode, vismode, count));
  99                 if (vismode == USE_VISIBILITY) {
 100                         OUT_RING(ring, batch->num_vertices);
 101                         OUT_RING(ring, count);
 102                 }
 103         } else {
 104                 OUT_PKT3(ring, CP_DRAW_INDX, idx_buffer ? 5 : 3);
 105                 OUT_RING(ring, 0x00000000);        /* viz query info. */
 106                 if (vismode == USE_VISIBILITY) {
 107                         /* leave vis mode blank for now, it will be patched up when
 108                          * we know if we are binning or not
 109                          */
 110                         OUT_RINGP(ring, DRAW(primtype, src_sel, idx_type, 0, instances),
 111                                         &batch->draw_patches);
 112                 } else {
 113                         OUT_RING(ring, DRAW(primtype, src_sel, idx_type, vismode, instances));
 114                 }
 115                 OUT_RING(ring, count);             /* NumIndices */
 116         }
 117
 118         if (idx_buffer) {
 119                 OUT_RELOC(ring, fd_resource(idx_buffer)->bo, idx_offset, 0, 0);
 120                 OUT_RING (ring, idx_size);
 121         }
 122
 123         emit_marker(ring, 7);
 124
 125         fd_reset_wfi(batch);
 126 }
 127
 128
 129 static inline enum pc_di_index_size
 130 size2indextype(unsigned index_size)
 131 {
 132         switch (index_size) {
 133         case 1: return INDEX_SIZE_8_BIT;
 134         case 2: return INDEX_SIZE_16_BIT;
 135         case 4: return INDEX_SIZE_32_BIT;
 136         }
 137         DBG("unsupported index size: %d", index_size);
 138         assert(0);
 139         return INDEX_SIZE_IGN;
 140 }
 141
 142 /* this is same for a2xx/a3xx, so split into helper: */
 143 static inline void
 144 fd_draw_emit(struct fd_batch *batch, struct fd_ringbuffer *ring,
 145                 enum pc_di_primtype primtype,
 146                 enum pc_di_vis_cull_mode vismode,
 147                 const struct pipe_draw_info *info,
 148                 unsigned index_offset)
 149 {
 150         struct pipe_resource *idx_buffer = NULL;
 151         enum pc_di_index_size idx_type = INDEX_SIZE_IGN;
 152         enum pc_di_src_sel src_sel;
 153         uint32_t idx_size, idx_offset;
 154
 155         if (info->index_size) {
 156                 assert(!info->has_user_indices);
 157
 158                 idx_buffer = info->index.resource;
 159                 idx_type = size2indextype(info->index_size);
 160                 idx_size = info->index_size * info->count;
 161                 idx_offset = index_offset + info->start * info->index_size;
 162                 src_sel = DI_SRC_SEL_DMA;
 163         } else {
 164                 idx_buffer = NULL;
 165                 idx_type = INDEX_SIZE_IGN;
 166                 idx_size = 0;
 167                 idx_offset = 0;
 168                 src_sel = DI_SRC_SEL_AUTO_INDEX;
 169         }
 170
 171         fd_draw(batch, ring, primtype, vismode, src_sel,
 172                         info->count, info->instance_count - 1,
 173                         idx_type, idx_size, idx_offset, idx_buffer);
 174 }
 175
 176 #endif /* FREEDRENO_DRAW_H_ */