src/gallium/drivers/freedreno/freedreno_gmem.c

   1 /*
   2  * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  20  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  21  * SOFTWARE.
  22  *
  23  * Authors:
  24  *    Rob Clark <robclark@freedesktop.org>
  25  */
  26
  27 #include "pipe/p_state.h"
  28 #include "util/u_string.h"
  29 #include "util/u_memory.h"
  30 #include "util/u_inlines.h"
  31 #include "util/u_format.h"
  32
  33 #include "freedreno_gmem.h"
  34 #include "freedreno_context.h"
  35 #include "freedreno_fence.h"
  36 #include "freedreno_resource.h"
  37 #include "freedreno_query_hw.h"
  38 #include "freedreno_util.h"
  39
  40 /*
  41  * GMEM is the small (ie. 256KiB for a200, 512KiB for a220, etc) tile buffer
  42  * inside the GPU.  All rendering happens to GMEM.  Larger render targets
  43  * are split into tiles that are small enough for the color (and depth and/or
  44  * stencil, if enabled) buffers to fit within GMEM.  Before rendering a tile,
  45  * if there was not a clear invalidating the previous tile contents, we need
  46  * to restore the previous tiles contents (system mem -> GMEM), and after all
  47  * the draw calls, before moving to the next tile, we need to save the tile
  48  * contents (GMEM -> system mem).
  49  *
  50  * The code in this file handles dealing with GMEM and tiling.
  51  *
  52  * The structure of the ringbuffer ends up being:
  53  *
  54  *     +--<---<-- IB ---<---+---<---+---<---<---<--+
  55  *     |                    |       |              |
  56  *     v                    ^       ^              ^
  57  *   ------------------------------------------------------
  58  *     | clear/draw cmds | Tile0 | Tile1 | .... | TileN |
  59  *   ------------------------------------------------------
  60  *                       ^
  61  *                       |
  62  *                       address submitted in issueibcmds
  63  *
  64  * Where the per-tile section handles scissor setup, mem2gmem restore (if
  65  * needed), IB to draw cmds earlier in the ringbuffer, and then gmem2mem
  66  * resolve.
  67  */
  68
  69 static uint32_t bin_width(struct fd_screen *screen)
  70 {
  71         if (is_a4xx(screen) || is_a5xx(screen) || is_a6xx(screen))
  72                 return 1024;
  73         if (is_a3xx(screen))
  74                 return 992;
  75         return 512;
  76 }
  77
  78 static uint32_t
  79 total_size(uint8_t cbuf_cpp[], uint8_t zsbuf_cpp[2],
  80                    uint32_t bin_w, uint32_t bin_h, uint32_t gmem_align,
  81                    struct fd_gmem_stateobj *gmem)
  82 {
  83         uint32_t total = 0, i;
  84
  85         for (i = 0; i < MAX_RENDER_TARGETS; i++) {
  86                 if (cbuf_cpp[i]) {
  87                         gmem->cbuf_base[i] = align(total, gmem_align);
  88                         total = gmem->cbuf_base[i] + cbuf_cpp[i] * bin_w * bin_h;
  89                 }
  90         }
  91
  92         if (zsbuf_cpp[0]) {
  93                 gmem->zsbuf_base[0] = align(total, gmem_align);
  94                 total = gmem->zsbuf_base[0] + zsbuf_cpp[0] * bin_w * bin_h;
  95         }
  96
  97         if (zsbuf_cpp[1]) {
  98                 gmem->zsbuf_base[1] = align(total, gmem_align);
  99                 total = gmem->zsbuf_base[1] + zsbuf_cpp[1] * bin_w * bin_h;
 100         }
 101
 102         return total;
 103 }
 104
 105 static void
 106 calculate_tiles(struct fd_batch *batch)
 107 {
 108         struct fd_context *ctx = batch->ctx;
 109         struct fd_screen *screen = ctx->screen;
 110         struct fd_gmem_stateobj *gmem = &ctx->gmem;
 111         struct pipe_scissor_state *scissor = &batch->max_scissor;
 112         struct pipe_framebuffer_state *pfb = &batch->framebuffer;
 113         const uint32_t gmem_alignw = screen->gmem_alignw;
 114         const uint32_t gmem_alignh = screen->gmem_alignh;
 115         const unsigned npipes = screen->num_vsc_pipes;
 116         const uint32_t gmem_size = screen->gmemsize_bytes;
 117         uint32_t minx, miny, width, height;
 118         uint32_t nbins_x = 1, nbins_y = 1;
 119         uint32_t bin_w, bin_h;
 120         uint32_t gmem_align = 0x4000;
 121         uint32_t max_width = bin_width(screen);
 122         uint8_t cbuf_cpp[MAX_RENDER_TARGETS] = {0}, zsbuf_cpp[2] = {0};
 123         uint32_t i, j, t, xoff, yoff;
 124         uint32_t tpp_x, tpp_y;
 125         bool has_zs = !!(batch->gmem_reason & (FD_GMEM_DEPTH_ENABLED |
 126                 FD_GMEM_STENCIL_ENABLED | FD_GMEM_CLEARS_DEPTH_STENCIL));
 127         int tile_n[npipes];
 128
 129         if (has_zs) {
 130                 struct fd_resource *rsc = fd_resource(pfb->zsbuf->texture);
 131                 zsbuf_cpp[0] = rsc->cpp;
 132                 if (rsc->stencil)
 133                         zsbuf_cpp[1] = rsc->stencil->cpp;
 134         } else {
 135                 /* we might have a zsbuf, but it isn't used */
 136                 batch->restore &= ~(FD_BUFFER_DEPTH | FD_BUFFER_STENCIL);
 137                 batch->resolve &= ~(FD_BUFFER_DEPTH | FD_BUFFER_STENCIL);
 138         }
 139         for (i = 0; i < pfb->nr_cbufs; i++) {
 140                 if (pfb->cbufs[i])
 141                         cbuf_cpp[i] = util_format_get_blocksize(pfb->cbufs[i]->format);
 142                 else
 143                         cbuf_cpp[i] = 4;
 144                 /* if MSAA, color buffers are super-sampled in GMEM: */
 145                 cbuf_cpp[i] *= pfb->samples;
 146         }
 147
 148         if (!memcmp(gmem->zsbuf_cpp, zsbuf_cpp, sizeof(zsbuf_cpp)) &&
 149                 !memcmp(gmem->cbuf_cpp, cbuf_cpp, sizeof(cbuf_cpp)) &&
 150                 !memcmp(&gmem->scissor, scissor, sizeof(gmem->scissor))) {
 151                 /* everything is up-to-date */
 152                 return;
 153         }
 154
 155         if (fd_mesa_debug & FD_DBG_NOSCIS) {
 156                 minx = 0;
 157                 miny = 0;
 158                 width = pfb->width;
 159                 height = pfb->height;
 160         } else {
 161                 /* round down to multiple of alignment: */
 162                 minx = scissor->minx & ~(gmem_alignw - 1);
 163                 miny = scissor->miny & ~(gmem_alignh - 1);
 164                 width = scissor->maxx - minx;
 165                 height = scissor->maxy - miny;
 166         }
 167
 168         bin_w = align(width, gmem_alignw);
 169         bin_h = align(height, gmem_alignh);
 170
 171         /* first, find a bin width that satisfies the maximum width
 172          * restrictions:
 173          */
 174         while (bin_w > max_width) {
 175                 nbins_x++;
 176                 bin_w = align(width / nbins_x, gmem_alignw);
 177         }
 178
 179         if (fd_mesa_debug & FD_DBG_MSGS) {
 180                 debug_printf("binning input: cbuf cpp:");
 181                 for (i = 0; i < pfb->nr_cbufs; i++)
 182                         debug_printf(" %d", cbuf_cpp[i]);
 183                 debug_printf(", zsbuf cpp: %d; %dx%d\n",
 184                                 zsbuf_cpp[0], width, height);
 185         }
 186
 187         if (is_a20x(screen) && batch->cleared) {
 188                 /* under normal circumstances the requirement would be 4K
 189                  * but the fast clear path requires an alignment of 32K
 190                  */
 191                 gmem_align = 0x8000;
 192         }
 193
 194         /* then find a bin width/height that satisfies the memory
 195          * constraints:
 196          */
 197         while (total_size(cbuf_cpp, zsbuf_cpp, bin_w, bin_h, gmem_align, gmem) >
 198                    gmem_size) {
 199                 if (bin_w > bin_h) {
 200                         nbins_x++;
 201                         bin_w = align(width / nbins_x, gmem_alignw);
 202                 } else {
 203                         nbins_y++;
 204                         bin_h = align(height / nbins_y, gmem_alignh);
 205                 }
 206         }
 207
 208         DBG("using %d bins of size %dx%d", nbins_x*nbins_y, bin_w, bin_h);
 209
 210         gmem->scissor = *scissor;
 211         memcpy(gmem->cbuf_cpp, cbuf_cpp, sizeof(cbuf_cpp));
 212         memcpy(gmem->zsbuf_cpp, zsbuf_cpp, sizeof(zsbuf_cpp));
 213         gmem->bin_h = bin_h;
 214         gmem->bin_w = bin_w;
 215         gmem->nbins_x = nbins_x;
 216         gmem->nbins_y = nbins_y;
 217         gmem->minx = minx;
 218         gmem->miny = miny;
 219         gmem->width = width;
 220         gmem->height = height;
 221
 222         /*
 223          * Assign tiles and pipes:
 224          *
 225          * At some point it might be worth playing with different
 226          * strategies and seeing if that makes much impact on
 227          * performance.
 228          */
 229
 230 #define div_round_up(v, a)  (((v) + (a) - 1) / (a))
 231         /* figure out number of tiles per pipe: */
 232         if (is_a20x(ctx->screen)) {
 233                 /* for a20x we want to minimize the number of "pipes"
 234                  * binning data has 3 bits for x/y (8x8) but the edges are used to
 235                  * cull off-screen vertices with hw binning, so we have 6x6 pipes
 236                  */
 237                 tpp_x = 6;
 238                 tpp_y = 6;
 239         } else {
 240                 tpp_x = tpp_y = 1;
 241                 while (div_round_up(nbins_y, tpp_y) > screen->num_vsc_pipes)
 242                         tpp_y += 2;
 243                 while ((div_round_up(nbins_y, tpp_y) *
 244                                 div_round_up(nbins_x, tpp_x)) > screen->num_vsc_pipes)
 245                         tpp_x += 1;
 246         }
 247
 248         gmem->maxpw = tpp_x;
 249         gmem->maxph = tpp_y;
 250
 251         /* configure pipes: */
 252         xoff = yoff = 0;
 253         for (i = 0; i < npipes; i++) {
 254                 struct fd_vsc_pipe *pipe = &ctx->vsc_pipe[i];
 255
 256                 if (xoff >= nbins_x) {
 257                         xoff = 0;
 258                         yoff += tpp_y;
 259                 }
 260
 261                 if (yoff >= nbins_y) {
 262                         break;
 263                 }
 264
 265                 pipe->x = xoff;
 266                 pipe->y = yoff;
 267                 pipe->w = MIN2(tpp_x, nbins_x - xoff);
 268                 pipe->h = MIN2(tpp_y, nbins_y - yoff);
 269
 270                 xoff += tpp_x;
 271         }
 272
 273         /* number of pipes to use for a20x */
 274         gmem->num_vsc_pipes = MAX2(1, i);
 275
 276         for (; i < npipes; i++) {
 277                 struct fd_vsc_pipe *pipe = &ctx->vsc_pipe[i];
 278                 pipe->x = pipe->y = pipe->w = pipe->h = 0;
 279         }
 280
 281 #if 0 /* debug */
 282         printf("%dx%d ... tpp=%dx%d\n", nbins_x, nbins_y, tpp_x, tpp_y);
 283         for (i = 0; i < 8; i++) {
 284                 struct fd_vsc_pipe *pipe = &ctx->pipe[i];
 285                 printf("pipe[%d]: %ux%u @ %u,%u\n", i,
 286                                 pipe->w, pipe->h, pipe->x, pipe->y);
 287         }
 288 #endif
 289
 290         /* configure tiles: */
 291         t = 0;
 292         yoff = miny;
 293         memset(tile_n, 0, sizeof(tile_n));
 294         for (i = 0; i < nbins_y; i++) {
 295                 uint32_t bw, bh;
 296
 297                 xoff = minx;
 298
 299                 /* clip bin height: */
 300                 bh = MIN2(bin_h, miny + height - yoff);
 301
 302                 for (j = 0; j < nbins_x; j++) {
 303                         struct fd_tile *tile = &ctx->tile[t];
 304                         uint32_t p;
 305
 306                         assert(t < ARRAY_SIZE(ctx->tile));
 307
 308                         /* pipe number: */
 309                         p = ((i / tpp_y) * div_round_up(nbins_x, tpp_x)) + (j / tpp_x);
 310                         assert(p < gmem->num_vsc_pipes);
 311
 312                         /* clip bin width: */
 313                         bw = MIN2(bin_w, minx + width - xoff);
 314                         tile->n = !is_a20x(ctx->screen) ? tile_n[p]++ :
 315                                 ((i % tpp_y + 1) << 3 | (j % tpp_x + 1));
 316                         tile->p = p;
 317                         tile->bin_w = bw;
 318                         tile->bin_h = bh;
 319                         tile->xoff = xoff;
 320                         tile->yoff = yoff;
 321
 322                         t++;
 323
 324                         xoff += bw;
 325                 }
 326
 327                 yoff += bh;
 328         }
 329
 330 #if 0 /* debug */
 331         t = 0;
 332         for (i = 0; i < nbins_y; i++) {
 333                 for (j = 0; j < nbins_x; j++) {
 334                         struct fd_tile *tile = &ctx->tile[t++];
 335                         printf("|p:%u n:%u|", tile->p, tile->n);
 336                 }
 337                 printf("\n");
 338         }
 339 #endif
 340 }
 341
 342 static void
 343 render_tiles(struct fd_batch *batch)
 344 {
 345         struct fd_context *ctx = batch->ctx;
 346         struct fd_gmem_stateobj *gmem = &ctx->gmem;
 347         int i;
 348
 349         ctx->emit_tile_init(batch);
 350
 351         if (batch->restore)
 352                 ctx->stats.batch_restore++;
 353
 354         for (i = 0; i < (gmem->nbins_x * gmem->nbins_y); i++) {
 355                 struct fd_tile *tile = &ctx->tile[i];
 356
 357                 DBG("bin_h=%d, yoff=%d, bin_w=%d, xoff=%d",
 358                         tile->bin_h, tile->yoff, tile->bin_w, tile->xoff);
 359
 360                 ctx->emit_tile_prep(batch, tile);
 361
 362                 if (batch->restore) {
 363                         ctx->emit_tile_mem2gmem(batch, tile);
 364                 }
 365
 366                 ctx->emit_tile_renderprep(batch, tile);
 367
 368                 if (ctx->query_prepare_tile)
 369                         ctx->query_prepare_tile(batch, i, batch->gmem);
 370
 371                 /* emit IB to drawcmds: */
 372                 ctx->emit_ib(batch->gmem, batch->draw);
 373                 fd_reset_wfi(batch);
 374
 375                 /* emit gmem2mem to transfer tile back to system memory: */
 376                 ctx->emit_tile_gmem2mem(batch, tile);
 377         }
 378
 379         if (ctx->emit_tile_fini)
 380                 ctx->emit_tile_fini(batch);
 381 }
 382
 383 static void
 384 render_sysmem(struct fd_batch *batch)
 385 {
 386         struct fd_context *ctx = batch->ctx;
 387
 388         ctx->emit_sysmem_prep(batch);
 389
 390         if (ctx->query_prepare_tile)
 391                 ctx->query_prepare_tile(batch, 0, batch->gmem);
 392
 393         /* emit IB to drawcmds: */
 394         ctx->emit_ib(batch->gmem, batch->draw);
 395         fd_reset_wfi(batch);
 396
 397         if (ctx->emit_sysmem_fini)
 398                 ctx->emit_sysmem_fini(batch);
 399 }
 400
 401 static void
 402 flush_ring(struct fd_batch *batch)
 403 {
 404         uint32_t timestamp;
 405         int out_fence_fd = -1;
 406
 407         fd_submit_flush(batch->submit, batch->in_fence_fd,
 408                         batch->needs_out_fence_fd ? &out_fence_fd : NULL,
 409                         &timestamp);
 410
 411         fd_fence_populate(batch->fence, timestamp, out_fence_fd);
 412 }
 413
 414 void
 415 fd_gmem_render_tiles(struct fd_batch *batch)
 416 {
 417         struct fd_context *ctx = batch->ctx;
 418         struct pipe_framebuffer_state *pfb = &batch->framebuffer;
 419         bool sysmem = false;
 420
 421         if (ctx->emit_sysmem_prep && !batch->nondraw) {
 422                 if (batch->cleared || batch->gmem_reason ||
 423                                 ((batch->num_draws > 5) && !batch->blit) ||
 424                                 (pfb->samples > 1)) {
 425                         DBG("GMEM: cleared=%x, gmem_reason=%x, num_draws=%u, samples=%u",
 426                                 batch->cleared, batch->gmem_reason, batch->num_draws,
 427                                 pfb->samples);
 428                 } else if (!(fd_mesa_debug & FD_DBG_NOBYPASS)) {
 429                         sysmem = true;
 430                 }
 431
 432                 /* For ARB_framebuffer_no_attachments: */
 433                 if ((pfb->nr_cbufs == 0) && !pfb->zsbuf) {
 434                         sysmem = true;
 435                 }
 436         }
 437
 438         fd_reset_wfi(batch);
 439
 440         ctx->stats.batch_total++;
 441
 442         if (batch->nondraw) {
 443                 DBG("%p: rendering non-draw", batch);
 444                 ctx->stats.batch_nondraw++;
 445         } else if (sysmem) {
 446                 DBG("%p: rendering sysmem %ux%u (%s/%s), num_draws=%u",
 447                         batch, pfb->width, pfb->height,
 448                         util_format_short_name(pipe_surface_format(pfb->cbufs[0])),
 449                         util_format_short_name(pipe_surface_format(pfb->zsbuf)),
 450                         batch->num_draws);
 451                 if (ctx->query_prepare)
 452                         ctx->query_prepare(batch, 1);
 453                 render_sysmem(batch);
 454                 ctx->stats.batch_sysmem++;
 455         } else {
 456                 struct fd_gmem_stateobj *gmem = &ctx->gmem;
 457                 calculate_tiles(batch);
 458                 DBG("%p: rendering %dx%d tiles %ux%u (%s/%s)",
 459                         batch, pfb->width, pfb->height, gmem->nbins_x, gmem->nbins_y,
 460                         util_format_short_name(pipe_surface_format(pfb->cbufs[0])),
 461                         util_format_short_name(pipe_surface_format(pfb->zsbuf)));
 462                 if (ctx->query_prepare)
 463                         ctx->query_prepare(batch, gmem->nbins_x * gmem->nbins_y);
 464                 render_tiles(batch);
 465                 ctx->stats.batch_gmem++;
 466         }
 467
 468         flush_ring(batch);
 469 }
 470
 471 /* When deciding whether a tile needs mem2gmem, we need to take into
 472  * account the scissor rect(s) that were cleared.  To simplify we only
 473  * consider the last scissor rect for each buffer, since the common
 474  * case would be a single clear.
 475  */
 476 bool
 477 fd_gmem_needs_restore(struct fd_batch *batch, struct fd_tile *tile,
 478                 uint32_t buffers)
 479 {
 480         if (!(batch->restore & buffers))
 481                 return false;
 482
 483         return true;
 484 }