src/gallium/drivers/freedreno/freedreno_gmem.c

   1 /* -*- mode: C; c-file-style: "k&r"; tab-width 4; indent-tabs-mode: t; -*- */
   2
   3 /*
   4  * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the "Software"),
   8  * to deal in the Software without restriction, including without limitation
   9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10  * and/or sell copies of the Software, and to permit persons to whom the
  11  * Software is furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice (including the next
  14  * paragraph) shall be included in all copies or substantial portions of the
  15  * Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  22  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  23  * SOFTWARE.
  24  *
  25  * Authors:
  26  *    Rob Clark <robclark@freedesktop.org>
  27  */
  28
  29 #include "pipe/p_state.h"
  30 #include "util/u_string.h"
  31 #include "util/u_memory.h"
  32 #include "util/u_inlines.h"
  33 #include "util/u_format.h"
  34
  35 #include "freedreno_gmem.h"
  36 #include "freedreno_context.h"
  37 #include "freedreno_fence.h"
  38 #include "freedreno_resource.h"
  39 #include "freedreno_query_hw.h"
  40 #include "freedreno_util.h"
  41
  42 /*
  43  * GMEM is the small (ie. 256KiB for a200, 512KiB for a220, etc) tile buffer
  44  * inside the GPU.  All rendering happens to GMEM.  Larger render targets
  45  * are split into tiles that are small enough for the color (and depth and/or
  46  * stencil, if enabled) buffers to fit within GMEM.  Before rendering a tile,
  47  * if there was not a clear invalidating the previous tile contents, we need
  48  * to restore the previous tiles contents (system mem -> GMEM), and after all
  49  * the draw calls, before moving to the next tile, we need to save the tile
  50  * contents (GMEM -> system mem).
  51  *
  52  * The code in this file handles dealing with GMEM and tiling.
  53  *
  54  * The structure of the ringbuffer ends up being:
  55  *
  56  *     +--<---<-- IB ---<---+---<---+---<---<---<--+
  57  *     |                    |       |              |
  58  *     v                    ^       ^              ^
  59  *   ------------------------------------------------------
  60  *     | clear/draw cmds | Tile0 | Tile1 | .... | TileN |
  61  *   ------------------------------------------------------
  62  *                       ^
  63  *                       |
  64  *                       address submitted in issueibcmds
  65  *
  66  * Where the per-tile section handles scissor setup, mem2gmem restore (if
  67  * needed), IB to draw cmds earlier in the ringbuffer, and then gmem2mem
  68  * resolve.
  69  */
  70
  71 static uint32_t bin_width(struct fd_screen *screen)
  72 {
  73         if (is_a4xx(screen) || is_a5xx(screen))
  74                 return 1024;
  75         if (is_a3xx(screen))
  76                 return 992;
  77         return 512;
  78 }
  79
  80 static uint32_t
  81 total_size(uint8_t cbuf_cpp[], uint8_t zsbuf_cpp[2],
  82                    uint32_t bin_w, uint32_t bin_h, struct fd_gmem_stateobj *gmem)
  83 {
  84         uint32_t total = 0, i;
  85
  86         for (i = 0; i < MAX_RENDER_TARGETS; i++) {
  87                 if (cbuf_cpp[i]) {
  88                         gmem->cbuf_base[i] = align(total, 0x4000);
  89                         total = gmem->cbuf_base[i] + cbuf_cpp[i] * bin_w * bin_h;
  90                 }
  91         }
  92
  93         if (zsbuf_cpp[0]) {
  94                 gmem->zsbuf_base[0] = align(total, 0x4000);
  95                 total = gmem->zsbuf_base[0] + zsbuf_cpp[0] * bin_w * bin_h;
  96         }
  97
  98         if (zsbuf_cpp[1]) {
  99                 gmem->zsbuf_base[1] = align(total, 0x4000);
 100                 total = gmem->zsbuf_base[1] + zsbuf_cpp[1] * bin_w * bin_h;
 101         }
 102
 103         return total;
 104 }
 105
 106 static void
 107 calculate_tiles(struct fd_batch *batch)
 108 {
 109         struct fd_context *ctx = batch->ctx;
 110         struct fd_gmem_stateobj *gmem = &ctx->gmem;
 111         struct pipe_scissor_state *scissor = &batch->max_scissor;
 112         struct pipe_framebuffer_state *pfb = &batch->framebuffer;
 113         const uint32_t gmem_alignment = ctx->screen->gmem_alignment;
 114         const uint32_t gmem_size = ctx->screen->gmemsize_bytes;
 115         uint32_t minx, miny, width, height;
 116         uint32_t nbins_x = 1, nbins_y = 1;
 117         uint32_t bin_w, bin_h;
 118         uint32_t max_width = bin_width(ctx->screen);
 119         uint8_t cbuf_cpp[MAX_RENDER_TARGETS] = {0}, zsbuf_cpp[2] = {0};
 120         uint32_t i, j, t, xoff, yoff;
 121         uint32_t tpp_x, tpp_y;
 122         bool has_zs = !!(batch->resolve & (FD_BUFFER_DEPTH | FD_BUFFER_STENCIL));
 123         int tile_n[ARRAY_SIZE(ctx->pipe)];
 124
 125         if (has_zs) {
 126                 struct fd_resource *rsc = fd_resource(pfb->zsbuf->texture);
 127                 zsbuf_cpp[0] = rsc->cpp;
 128                 if (rsc->stencil)
 129                         zsbuf_cpp[1] = rsc->stencil->cpp;
 130         }
 131         for (i = 0; i < pfb->nr_cbufs; i++) {
 132                 if (pfb->cbufs[i])
 133                         cbuf_cpp[i] = util_format_get_blocksize(pfb->cbufs[i]->format);
 134                 else
 135                         cbuf_cpp[i] = 4;
 136         }
 137
 138         if (!memcmp(gmem->zsbuf_cpp, zsbuf_cpp, sizeof(zsbuf_cpp)) &&
 139                 !memcmp(gmem->cbuf_cpp, cbuf_cpp, sizeof(cbuf_cpp)) &&
 140                 !memcmp(&gmem->scissor, scissor, sizeof(gmem->scissor))) {
 141                 /* everything is up-to-date */
 142                 return;
 143         }
 144
 145         if (fd_mesa_debug & FD_DBG_NOSCIS) {
 146                 minx = 0;
 147                 miny = 0;
 148                 width = pfb->width;
 149                 height = pfb->height;
 150         } else {
 151                 /* round down to multiple of alignment: */
 152                 minx = scissor->minx & ~(gmem_alignment - 1);
 153                 miny = scissor->miny & ~(gmem_alignment - 1);
 154                 width = scissor->maxx - minx;
 155                 height = scissor->maxy - miny;
 156         }
 157
 158         bin_w = align(width, gmem_alignment);
 159         bin_h = align(height, gmem_alignment);
 160
 161         /* first, find a bin width that satisfies the maximum width
 162          * restrictions:
 163          */
 164         while (bin_w > max_width) {
 165                 nbins_x++;
 166                 bin_w = align(width / nbins_x, gmem_alignment);
 167         }
 168
 169         if (fd_mesa_debug & FD_DBG_MSGS) {
 170                 debug_printf("binning input: cbuf cpp:");
 171                 for (i = 0; i < pfb->nr_cbufs; i++)
 172                         debug_printf(" %d", cbuf_cpp[i]);
 173                 debug_printf(", zsbuf cpp: %d; %dx%d\n",
 174                                 zsbuf_cpp[0], width, height);
 175         }
 176
 177         /* then find a bin width/height that satisfies the memory
 178          * constraints:
 179          */
 180         while (total_size(cbuf_cpp, zsbuf_cpp, bin_w, bin_h, gmem) > gmem_size) {
 181                 if (bin_w > bin_h) {
 182                         nbins_x++;
 183                         bin_w = align(width / nbins_x, gmem_alignment);
 184                 } else {
 185                         nbins_y++;
 186                         bin_h = align(height / nbins_y, gmem_alignment);
 187                 }
 188         }
 189
 190         DBG("using %d bins of size %dx%d", nbins_x*nbins_y, bin_w, bin_h);
 191
 192         gmem->scissor = *scissor;
 193         memcpy(gmem->cbuf_cpp, cbuf_cpp, sizeof(cbuf_cpp));
 194         memcpy(gmem->zsbuf_cpp, zsbuf_cpp, sizeof(zsbuf_cpp));
 195         gmem->bin_h = bin_h;
 196         gmem->bin_w = bin_w;
 197         gmem->nbins_x = nbins_x;
 198         gmem->nbins_y = nbins_y;
 199         gmem->minx = minx;
 200         gmem->miny = miny;
 201         gmem->width = width;
 202         gmem->height = height;
 203
 204         /*
 205          * Assign tiles and pipes:
 206          *
 207          * At some point it might be worth playing with different
 208          * strategies and seeing if that makes much impact on
 209          * performance.
 210          */
 211
 212 #define div_round_up(v, a)  (((v) + (a) - 1) / (a))
 213         /* figure out number of tiles per pipe: */
 214         tpp_x = tpp_y = 1;
 215         while (div_round_up(nbins_y, tpp_y) > 8)
 216                 tpp_y += 2;
 217         while ((div_round_up(nbins_y, tpp_y) *
 218                         div_round_up(nbins_x, tpp_x)) > 8)
 219                 tpp_x += 1;
 220
 221         /* configure pipes: */
 222         xoff = yoff = 0;
 223         for (i = 0; i < ARRAY_SIZE(ctx->pipe); i++) {
 224                 struct fd_vsc_pipe *pipe = &ctx->pipe[i];
 225
 226                 if (xoff >= nbins_x) {
 227                         xoff = 0;
 228                         yoff += tpp_y;
 229                 }
 230
 231                 if (yoff >= nbins_y) {
 232                         break;
 233                 }
 234
 235                 pipe->x = xoff;
 236                 pipe->y = yoff;
 237                 pipe->w = MIN2(tpp_x, nbins_x - xoff);
 238                 pipe->h = MIN2(tpp_y, nbins_y - yoff);
 239
 240                 xoff += tpp_x;
 241         }
 242
 243         for (; i < ARRAY_SIZE(ctx->pipe); i++) {
 244                 struct fd_vsc_pipe *pipe = &ctx->pipe[i];
 245                 pipe->x = pipe->y = pipe->w = pipe->h = 0;
 246         }
 247
 248 #if 0 /* debug */
 249         printf("%dx%d ... tpp=%dx%d\n", nbins_x, nbins_y, tpp_x, tpp_y);
 250         for (i = 0; i < 8; i++) {
 251                 struct fd_vsc_pipe *pipe = &ctx->pipe[i];
 252                 printf("pipe[%d]: %ux%u @ %u,%u\n", i,
 253                                 pipe->w, pipe->h, pipe->x, pipe->y);
 254         }
 255 #endif
 256
 257         /* configure tiles: */
 258         t = 0;
 259         yoff = miny;
 260         memset(tile_n, 0, sizeof(tile_n));
 261         for (i = 0; i < nbins_y; i++) {
 262                 uint32_t bw, bh;
 263
 264                 xoff = minx;
 265
 266                 /* clip bin height: */
 267                 bh = MIN2(bin_h, miny + height - yoff);
 268
 269                 for (j = 0; j < nbins_x; j++) {
 270                         struct fd_tile *tile = &ctx->tile[t];
 271                         uint32_t p;
 272
 273                         assert(t < ARRAY_SIZE(ctx->tile));
 274
 275                         /* pipe number: */
 276                         p = ((i / tpp_y) * div_round_up(nbins_x, tpp_x)) + (j / tpp_x);
 277
 278                         /* clip bin width: */
 279                         bw = MIN2(bin_w, minx + width - xoff);
 280
 281                         tile->n = tile_n[p]++;
 282                         tile->p = p;
 283                         tile->bin_w = bw;
 284                         tile->bin_h = bh;
 285                         tile->xoff = xoff;
 286                         tile->yoff = yoff;
 287
 288                         t++;
 289
 290                         xoff += bw;
 291                 }
 292
 293                 yoff += bh;
 294         }
 295
 296 #if 0 /* debug */
 297         t = 0;
 298         for (i = 0; i < nbins_y; i++) {
 299                 for (j = 0; j < nbins_x; j++) {
 300                         struct fd_tile *tile = &ctx->tile[t++];
 301                         printf("|p:%u n:%u|", tile->p, tile->n);
 302                 }
 303                 printf("\n");
 304         }
 305 #endif
 306 }
 307
 308 static void
 309 render_tiles(struct fd_batch *batch)
 310 {
 311         struct fd_context *ctx = batch->ctx;
 312         struct fd_gmem_stateobj *gmem = &ctx->gmem;
 313         int i;
 314
 315         ctx->emit_tile_init(batch);
 316
 317         if (batch->restore)
 318                 ctx->stats.batch_restore++;
 319
 320         for (i = 0; i < (gmem->nbins_x * gmem->nbins_y); i++) {
 321                 struct fd_tile *tile = &ctx->tile[i];
 322
 323                 DBG("bin_h=%d, yoff=%d, bin_w=%d, xoff=%d",
 324                         tile->bin_h, tile->yoff, tile->bin_w, tile->xoff);
 325
 326                 ctx->emit_tile_prep(batch, tile);
 327
 328                 if (batch->restore) {
 329                         ctx->emit_tile_mem2gmem(batch, tile);
 330                 }
 331
 332                 ctx->emit_tile_renderprep(batch, tile);
 333
 334                 fd_hw_query_prepare_tile(batch, i, batch->gmem);
 335
 336                 /* emit IB to drawcmds: */
 337                 ctx->emit_ib(batch->gmem, batch->draw);
 338                 fd_reset_wfi(batch);
 339
 340                 /* emit gmem2mem to transfer tile back to system memory: */
 341                 ctx->emit_tile_gmem2mem(batch, tile);
 342         }
 343
 344         if (ctx->emit_tile_fini)
 345                 ctx->emit_tile_fini(batch);
 346 }
 347
 348 static void
 349 render_sysmem(struct fd_batch *batch)
 350 {
 351         struct fd_context *ctx = batch->ctx;
 352
 353         ctx->emit_sysmem_prep(batch);
 354
 355         fd_hw_query_prepare_tile(batch, 0, batch->gmem);
 356
 357         /* emit IB to drawcmds: */
 358         ctx->emit_ib(batch->gmem, batch->draw);
 359         fd_reset_wfi(batch);
 360 }
 361
 362 void
 363 fd_gmem_render_tiles(struct fd_batch *batch)
 364 {
 365         struct fd_context *ctx = batch->ctx;
 366         struct pipe_framebuffer_state *pfb = &batch->framebuffer;
 367         bool sysmem = false;
 368
 369         if (ctx->emit_sysmem_prep) {
 370                 if (batch->cleared || batch->gmem_reason || (batch->num_draws > 5)) {
 371                         DBG("GMEM: cleared=%x, gmem_reason=%x, num_draws=%u",
 372                                 batch->cleared, batch->gmem_reason, batch->num_draws);
 373                 } else if (!(fd_mesa_debug & FD_DBG_NOBYPASS)) {
 374                         sysmem = true;
 375                 }
 376         }
 377
 378         fd_reset_wfi(batch);
 379
 380         ctx->stats.batch_total++;
 381
 382         if (sysmem) {
 383                 DBG("%p: rendering sysmem %ux%u (%s/%s)",
 384                         batch, pfb->width, pfb->height,
 385                         util_format_short_name(pipe_surface_format(pfb->cbufs[0])),
 386                         util_format_short_name(pipe_surface_format(pfb->zsbuf)));
 387                 fd_hw_query_prepare(batch, 1);
 388                 render_sysmem(batch);
 389                 ctx->stats.batch_sysmem++;
 390         } else {
 391                 struct fd_gmem_stateobj *gmem = &ctx->gmem;
 392                 calculate_tiles(batch);
 393                 DBG("%p: rendering %dx%d tiles %ux%u (%s/%s)",
 394                         batch, pfb->width, pfb->height, gmem->nbins_x, gmem->nbins_y,
 395                         util_format_short_name(pipe_surface_format(pfb->cbufs[0])),
 396                         util_format_short_name(pipe_surface_format(pfb->zsbuf)));
 397                 fd_hw_query_prepare(batch, gmem->nbins_x * gmem->nbins_y);
 398                 render_tiles(batch);
 399                 ctx->stats.batch_gmem++;
 400         }
 401
 402         int out_fence_fd = -1;
 403         fd_ringbuffer_flush2(batch->gmem, batch->in_fence_fd,
 404                         batch->needs_out_fence_fd ? &out_fence_fd : NULL);
 405
 406         fd_fence_ref(&ctx->screen->base, &ctx->last_fence, NULL);
 407         ctx->last_fence = fd_fence_create(ctx,
 408                         fd_ringbuffer_timestamp(batch->gmem), out_fence_fd);
 409 }
 410
 411 /* tile needs restore if it isn't completely contained within the
 412  * cleared scissor:
 413  */
 414 static bool
 415 skip_restore(struct pipe_scissor_state *scissor, struct fd_tile *tile)
 416 {
 417         unsigned minx = tile->xoff;
 418         unsigned maxx = tile->xoff + tile->bin_w;
 419         unsigned miny = tile->yoff;
 420         unsigned maxy = tile->yoff + tile->bin_h;
 421         return (minx >= scissor->minx) && (maxx <= scissor->maxx) &&
 422                         (miny >= scissor->miny) && (maxy <= scissor->maxy);
 423 }
 424
 425 /* When deciding whether a tile needs mem2gmem, we need to take into
 426  * account the scissor rect(s) that were cleared.  To simplify we only
 427  * consider the last scissor rect for each buffer, since the common
 428  * case would be a single clear.
 429  */
 430 bool
 431 fd_gmem_needs_restore(struct fd_batch *batch, struct fd_tile *tile,
 432                 uint32_t buffers)
 433 {
 434         if (!(batch->restore & buffers))
 435                 return false;
 436
 437         /* if buffers partially cleared, then slow-path to figure out
 438          * if this particular tile needs restoring:
 439          */
 440         if ((buffers & FD_BUFFER_COLOR) &&
 441                         (batch->partial_cleared & FD_BUFFER_COLOR) &&
 442                         skip_restore(&batch->cleared_scissor.color, tile))
 443                 return false;
 444         if ((buffers & FD_BUFFER_DEPTH) &&
 445                         (batch->partial_cleared & FD_BUFFER_DEPTH) &&
 446                         skip_restore(&batch->cleared_scissor.depth, tile))
 447                 return false;
 448         if ((buffers & FD_BUFFER_STENCIL) &&
 449                         (batch->partial_cleared & FD_BUFFER_STENCIL) &&
 450                         skip_restore(&batch->cleared_scissor.stencil, tile))
 451                 return false;
 452
 453         return true;
 454 }