freedreno: simplify pctx->clear()
[mesa.git] / src / gallium / drivers / freedreno / freedreno_gmem.c
1 /* -*- mode: C; c-file-style: "k&r"; tab-width 4; indent-tabs-mode: t; -*- */
2
3 /*
4 * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
15 * Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
23 * SOFTWARE.
24 *
25 * Authors:
26 * Rob Clark <robclark@freedesktop.org>
27 */
28
29 #include "pipe/p_state.h"
30 #include "util/u_string.h"
31 #include "util/u_memory.h"
32 #include "util/u_inlines.h"
33 #include "util/u_format.h"
34
35 #include "freedreno_gmem.h"
36 #include "freedreno_context.h"
37 #include "freedreno_fence.h"
38 #include "freedreno_resource.h"
39 #include "freedreno_query_hw.h"
40 #include "freedreno_util.h"
41
42 /*
43 * GMEM is the small (ie. 256KiB for a200, 512KiB for a220, etc) tile buffer
44 * inside the GPU. All rendering happens to GMEM. Larger render targets
45 * are split into tiles that are small enough for the color (and depth and/or
46 * stencil, if enabled) buffers to fit within GMEM. Before rendering a tile,
47 * if there was not a clear invalidating the previous tile contents, we need
48 * to restore the previous tiles contents (system mem -> GMEM), and after all
49 * the draw calls, before moving to the next tile, we need to save the tile
50 * contents (GMEM -> system mem).
51 *
52 * The code in this file handles dealing with GMEM and tiling.
53 *
54 * The structure of the ringbuffer ends up being:
55 *
56 * +--<---<-- IB ---<---+---<---+---<---<---<--+
57 * | | | |
58 * v ^ ^ ^
59 * ------------------------------------------------------
60 * | clear/draw cmds | Tile0 | Tile1 | .... | TileN |
61 * ------------------------------------------------------
62 * ^
63 * |
64 * address submitted in issueibcmds
65 *
66 * Where the per-tile section handles scissor setup, mem2gmem restore (if
67 * needed), IB to draw cmds earlier in the ringbuffer, and then gmem2mem
68 * resolve.
69 */
70
71 static uint32_t bin_width(struct fd_screen *screen)
72 {
73 if (is_a4xx(screen) || is_a5xx(screen) || is_a6xx(screen))
74 return 1024;
75 if (is_a3xx(screen))
76 return 992;
77 return 512;
78 }
79
80 static uint32_t
81 total_size(uint8_t cbuf_cpp[], uint8_t zsbuf_cpp[2],
82 uint32_t bin_w, uint32_t bin_h, struct fd_gmem_stateobj *gmem)
83 {
84 uint32_t total = 0, i;
85
86 for (i = 0; i < MAX_RENDER_TARGETS; i++) {
87 if (cbuf_cpp[i]) {
88 gmem->cbuf_base[i] = align(total, 0x4000);
89 total = gmem->cbuf_base[i] + cbuf_cpp[i] * bin_w * bin_h;
90 }
91 }
92
93 if (zsbuf_cpp[0]) {
94 gmem->zsbuf_base[0] = align(total, 0x4000);
95 total = gmem->zsbuf_base[0] + zsbuf_cpp[0] * bin_w * bin_h;
96 }
97
98 if (zsbuf_cpp[1]) {
99 gmem->zsbuf_base[1] = align(total, 0x4000);
100 total = gmem->zsbuf_base[1] + zsbuf_cpp[1] * bin_w * bin_h;
101 }
102
103 return total;
104 }
105
106 static void
107 calculate_tiles(struct fd_batch *batch)
108 {
109 struct fd_context *ctx = batch->ctx;
110 struct fd_gmem_stateobj *gmem = &ctx->gmem;
111 struct pipe_scissor_state *scissor = &batch->max_scissor;
112 struct pipe_framebuffer_state *pfb = &batch->framebuffer;
113 const uint32_t gmem_alignw = ctx->screen->gmem_alignw;
114 const uint32_t gmem_alignh = ctx->screen->gmem_alignh;
115 const unsigned npipes = ctx->screen->num_vsc_pipes;
116 const uint32_t gmem_size = ctx->screen->gmemsize_bytes;
117 uint32_t minx, miny, width, height;
118 uint32_t nbins_x = 1, nbins_y = 1;
119 uint32_t bin_w, bin_h;
120 uint32_t max_width = bin_width(ctx->screen);
121 uint8_t cbuf_cpp[MAX_RENDER_TARGETS] = {0}, zsbuf_cpp[2] = {0};
122 uint32_t i, j, t, xoff, yoff;
123 uint32_t tpp_x, tpp_y;
124 bool has_zs = !!(batch->resolve & (FD_BUFFER_DEPTH | FD_BUFFER_STENCIL));
125 int tile_n[npipes];
126
127 if (has_zs) {
128 struct fd_resource *rsc = fd_resource(pfb->zsbuf->texture);
129 zsbuf_cpp[0] = rsc->cpp;
130 if (rsc->stencil)
131 zsbuf_cpp[1] = rsc->stencil->cpp;
132 }
133 for (i = 0; i < pfb->nr_cbufs; i++) {
134 if (pfb->cbufs[i])
135 cbuf_cpp[i] = util_format_get_blocksize(pfb->cbufs[i]->format);
136 else
137 cbuf_cpp[i] = 4;
138 /* if MSAA, color buffers are super-sampled in GMEM: */
139 cbuf_cpp[i] *= pfb->samples;
140 }
141
142 if (!memcmp(gmem->zsbuf_cpp, zsbuf_cpp, sizeof(zsbuf_cpp)) &&
143 !memcmp(gmem->cbuf_cpp, cbuf_cpp, sizeof(cbuf_cpp)) &&
144 !memcmp(&gmem->scissor, scissor, sizeof(gmem->scissor))) {
145 /* everything is up-to-date */
146 return;
147 }
148
149 if (fd_mesa_debug & FD_DBG_NOSCIS) {
150 minx = 0;
151 miny = 0;
152 width = pfb->width;
153 height = pfb->height;
154 } else {
155 /* round down to multiple of alignment: */
156 minx = scissor->minx & ~(gmem_alignw - 1);
157 miny = scissor->miny & ~(gmem_alignh - 1);
158 width = scissor->maxx - minx;
159 height = scissor->maxy - miny;
160 }
161
162 bin_w = align(width, gmem_alignw);
163 bin_h = align(height, gmem_alignh);
164
165 /* first, find a bin width that satisfies the maximum width
166 * restrictions:
167 */
168 while (bin_w > max_width) {
169 nbins_x++;
170 bin_w = align(width / nbins_x, gmem_alignw);
171 }
172
173 if (fd_mesa_debug & FD_DBG_MSGS) {
174 debug_printf("binning input: cbuf cpp:");
175 for (i = 0; i < pfb->nr_cbufs; i++)
176 debug_printf(" %d", cbuf_cpp[i]);
177 debug_printf(", zsbuf cpp: %d; %dx%d\n",
178 zsbuf_cpp[0], width, height);
179 }
180
181 /* then find a bin width/height that satisfies the memory
182 * constraints:
183 */
184 while (total_size(cbuf_cpp, zsbuf_cpp, bin_w, bin_h, gmem) > gmem_size) {
185 if (bin_w > bin_h) {
186 nbins_x++;
187 bin_w = align(width / nbins_x, gmem_alignw);
188 } else {
189 nbins_y++;
190 bin_h = align(height / nbins_y, gmem_alignh);
191 }
192 }
193
194 DBG("using %d bins of size %dx%d", nbins_x*nbins_y, bin_w, bin_h);
195
196 gmem->scissor = *scissor;
197 memcpy(gmem->cbuf_cpp, cbuf_cpp, sizeof(cbuf_cpp));
198 memcpy(gmem->zsbuf_cpp, zsbuf_cpp, sizeof(zsbuf_cpp));
199 gmem->bin_h = bin_h;
200 gmem->bin_w = bin_w;
201 gmem->nbins_x = nbins_x;
202 gmem->nbins_y = nbins_y;
203 gmem->minx = minx;
204 gmem->miny = miny;
205 gmem->width = width;
206 gmem->height = height;
207
208 /*
209 * Assign tiles and pipes:
210 *
211 * At some point it might be worth playing with different
212 * strategies and seeing if that makes much impact on
213 * performance.
214 */
215
216 #define div_round_up(v, a) (((v) + (a) - 1) / (a))
217 /* figure out number of tiles per pipe: */
218 tpp_x = tpp_y = 1;
219 while (div_round_up(nbins_y, tpp_y) > 8)
220 tpp_y += 2;
221 while ((div_round_up(nbins_y, tpp_y) *
222 div_round_up(nbins_x, tpp_x)) > 8)
223 tpp_x += 1;
224
225 gmem->maxpw = tpp_x;
226 gmem->maxph = tpp_y;
227
228 /* configure pipes: */
229 xoff = yoff = 0;
230 for (i = 0; i < npipes; i++) {
231 struct fd_vsc_pipe *pipe = &ctx->vsc_pipe[i];
232
233 if (xoff >= nbins_x) {
234 xoff = 0;
235 yoff += tpp_y;
236 }
237
238 if (yoff >= nbins_y) {
239 break;
240 }
241
242 pipe->x = xoff;
243 pipe->y = yoff;
244 pipe->w = MIN2(tpp_x, nbins_x - xoff);
245 pipe->h = MIN2(tpp_y, nbins_y - yoff);
246
247 xoff += tpp_x;
248 }
249
250 for (; i < npipes; i++) {
251 struct fd_vsc_pipe *pipe = &ctx->vsc_pipe[i];
252 pipe->x = pipe->y = pipe->w = pipe->h = 0;
253 }
254
255 #if 0 /* debug */
256 printf("%dx%d ... tpp=%dx%d\n", nbins_x, nbins_y, tpp_x, tpp_y);
257 for (i = 0; i < 8; i++) {
258 struct fd_vsc_pipe *pipe = &ctx->pipe[i];
259 printf("pipe[%d]: %ux%u @ %u,%u\n", i,
260 pipe->w, pipe->h, pipe->x, pipe->y);
261 }
262 #endif
263
264 /* configure tiles: */
265 t = 0;
266 yoff = miny;
267 memset(tile_n, 0, sizeof(tile_n));
268 for (i = 0; i < nbins_y; i++) {
269 uint32_t bw, bh;
270
271 xoff = minx;
272
273 /* clip bin height: */
274 bh = MIN2(bin_h, miny + height - yoff);
275
276 for (j = 0; j < nbins_x; j++) {
277 struct fd_tile *tile = &ctx->tile[t];
278 uint32_t p;
279
280 assert(t < ARRAY_SIZE(ctx->tile));
281
282 /* pipe number: */
283 p = ((i / tpp_y) * div_round_up(nbins_x, tpp_x)) + (j / tpp_x);
284
285 /* clip bin width: */
286 bw = MIN2(bin_w, minx + width - xoff);
287
288 tile->n = tile_n[p]++;
289 tile->p = p;
290 tile->bin_w = bw;
291 tile->bin_h = bh;
292 tile->xoff = xoff;
293 tile->yoff = yoff;
294
295 t++;
296
297 xoff += bw;
298 }
299
300 yoff += bh;
301 }
302
303 #if 0 /* debug */
304 t = 0;
305 for (i = 0; i < nbins_y; i++) {
306 for (j = 0; j < nbins_x; j++) {
307 struct fd_tile *tile = &ctx->tile[t++];
308 printf("|p:%u n:%u|", tile->p, tile->n);
309 }
310 printf("\n");
311 }
312 #endif
313 }
314
315 static void
316 render_tiles(struct fd_batch *batch)
317 {
318 struct fd_context *ctx = batch->ctx;
319 struct fd_gmem_stateobj *gmem = &ctx->gmem;
320 int i;
321
322 ctx->emit_tile_init(batch);
323
324 if (batch->restore)
325 ctx->stats.batch_restore++;
326
327 for (i = 0; i < (gmem->nbins_x * gmem->nbins_y); i++) {
328 struct fd_tile *tile = &ctx->tile[i];
329
330 DBG("bin_h=%d, yoff=%d, bin_w=%d, xoff=%d",
331 tile->bin_h, tile->yoff, tile->bin_w, tile->xoff);
332
333 ctx->emit_tile_prep(batch, tile);
334
335 if (batch->restore) {
336 ctx->emit_tile_mem2gmem(batch, tile);
337 }
338
339 ctx->emit_tile_renderprep(batch, tile);
340
341 if (ctx->query_prepare_tile)
342 ctx->query_prepare_tile(batch, i, batch->gmem);
343
344 /* emit IB to drawcmds: */
345 ctx->emit_ib(batch->gmem, batch->draw);
346 fd_reset_wfi(batch);
347
348 /* emit gmem2mem to transfer tile back to system memory: */
349 ctx->emit_tile_gmem2mem(batch, tile);
350 }
351
352 if (ctx->emit_tile_fini)
353 ctx->emit_tile_fini(batch);
354 }
355
356 static void
357 render_sysmem(struct fd_batch *batch)
358 {
359 struct fd_context *ctx = batch->ctx;
360
361 ctx->emit_sysmem_prep(batch);
362
363 if (ctx->query_prepare_tile)
364 ctx->query_prepare_tile(batch, 0, batch->gmem);
365
366 /* emit IB to drawcmds: */
367 ctx->emit_ib(batch->gmem, batch->draw);
368 fd_reset_wfi(batch);
369
370 if (ctx->emit_sysmem_fini)
371 ctx->emit_sysmem_fini(batch);
372 }
373
374 static void
375 flush_ring(struct fd_batch *batch)
376 {
377 /* for compute/blit batch, there is no batch->gmem, only batch->draw: */
378 struct fd_ringbuffer *ring = batch->nondraw ? batch->draw : batch->gmem;
379 uint32_t timestamp;
380 int out_fence_fd = -1;
381
382 fd_ringbuffer_flush2(ring, batch->in_fence_fd,
383 batch->needs_out_fence_fd ? &out_fence_fd : NULL);
384
385 timestamp = fd_ringbuffer_timestamp(ring);
386 fd_fence_populate(batch->fence, timestamp, out_fence_fd);
387 }
388
389 void
390 fd_gmem_render_tiles(struct fd_batch *batch)
391 {
392 struct fd_context *ctx = batch->ctx;
393 struct pipe_framebuffer_state *pfb = &batch->framebuffer;
394 bool sysmem = false;
395
396 if (ctx->emit_sysmem_prep && !batch->nondraw) {
397 if (batch->cleared || batch->gmem_reason ||
398 ((batch->num_draws > 5) && !batch->blit) ||
399 (pfb->samples > 1)) {
400 DBG("GMEM: cleared=%x, gmem_reason=%x, num_draws=%u, samples=%u",
401 batch->cleared, batch->gmem_reason, batch->num_draws,
402 pfb->samples);
403 } else if (!(fd_mesa_debug & FD_DBG_NOBYPASS)) {
404 sysmem = true;
405 }
406
407 /* For ARB_framebuffer_no_attachments: */
408 if ((pfb->nr_cbufs == 0) && !pfb->zsbuf) {
409 sysmem = true;
410 }
411 }
412
413 fd_reset_wfi(batch);
414
415 ctx->stats.batch_total++;
416
417 if (batch->nondraw) {
418 DBG("%p: rendering non-draw", batch);
419 ctx->stats.batch_nondraw++;
420 } else if (sysmem) {
421 DBG("%p: rendering sysmem %ux%u (%s/%s)",
422 batch, pfb->width, pfb->height,
423 util_format_short_name(pipe_surface_format(pfb->cbufs[0])),
424 util_format_short_name(pipe_surface_format(pfb->zsbuf)));
425 if (ctx->query_prepare)
426 ctx->query_prepare(batch, 1);
427 render_sysmem(batch);
428 ctx->stats.batch_sysmem++;
429 } else {
430 struct fd_gmem_stateobj *gmem = &ctx->gmem;
431 calculate_tiles(batch);
432 DBG("%p: rendering %dx%d tiles %ux%u (%s/%s)",
433 batch, pfb->width, pfb->height, gmem->nbins_x, gmem->nbins_y,
434 util_format_short_name(pipe_surface_format(pfb->cbufs[0])),
435 util_format_short_name(pipe_surface_format(pfb->zsbuf)));
436 if (ctx->query_prepare)
437 ctx->query_prepare(batch, gmem->nbins_x * gmem->nbins_y);
438 render_tiles(batch);
439 ctx->stats.batch_gmem++;
440 }
441
442 flush_ring(batch);
443 }
444
445 /* When deciding whether a tile needs mem2gmem, we need to take into
446 * account the scissor rect(s) that were cleared. To simplify we only
447 * consider the last scissor rect for each buffer, since the common
448 * case would be a single clear.
449 */
450 bool
451 fd_gmem_needs_restore(struct fd_batch *batch, struct fd_tile *tile,
452 uint32_t buffers)
453 {
454 if (!(batch->restore & buffers))
455 return false;
456
457 return true;
458 }