freedreno: make gmem tile size alignment configurable
[mesa.git] / src / gallium / drivers / freedreno / freedreno_gmem.c
1 /* -*- mode: C; c-file-style: "k&r"; tab-width 4; indent-tabs-mode: t; -*- */
2
3 /*
4 * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
15 * Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
23 * SOFTWARE.
24 *
25 * Authors:
26 * Rob Clark <robclark@freedesktop.org>
27 */
28
29 #include "pipe/p_state.h"
30 #include "util/u_string.h"
31 #include "util/u_memory.h"
32 #include "util/u_inlines.h"
33 #include "util/u_format.h"
34
35 #include "freedreno_gmem.h"
36 #include "freedreno_context.h"
37 #include "freedreno_resource.h"
38 #include "freedreno_query_hw.h"
39 #include "freedreno_util.h"
40
41 /*
42 * GMEM is the small (ie. 256KiB for a200, 512KiB for a220, etc) tile buffer
43 * inside the GPU. All rendering happens to GMEM. Larger render targets
44 * are split into tiles that are small enough for the color (and depth and/or
45 * stencil, if enabled) buffers to fit within GMEM. Before rendering a tile,
46 * if there was not a clear invalidating the previous tile contents, we need
47 * to restore the previous tiles contents (system mem -> GMEM), and after all
48 * the draw calls, before moving to the next tile, we need to save the tile
49 * contents (GMEM -> system mem).
50 *
51 * The code in this file handles dealing with GMEM and tiling.
52 *
53 * The structure of the ringbuffer ends up being:
54 *
55 * +--<---<-- IB ---<---+---<---+---<---<---<--+
56 * | | | |
57 * v ^ ^ ^
58 * ------------------------------------------------------
59 * | clear/draw cmds | Tile0 | Tile1 | .... | TileN |
60 * ------------------------------------------------------
61 * ^
62 * |
63 * address submitted in issueibcmds
64 *
65 * Where the per-tile section handles scissor setup, mem2gmem restore (if
66 * needed), IB to draw cmds earlier in the ringbuffer, and then gmem2mem
67 * resolve.
68 */
69
70 static uint32_t bin_width(struct fd_screen *screen)
71 {
72 if (is_a4xx(screen))
73 return 1024;
74 if (is_a3xx(screen))
75 return 992;
76 return 512;
77 }
78
79 static uint32_t
80 total_size(uint8_t cbuf_cpp[], uint8_t zsbuf_cpp[2],
81 uint32_t bin_w, uint32_t bin_h, struct fd_gmem_stateobj *gmem)
82 {
83 uint32_t total = 0, i;
84
85 for (i = 0; i < MAX_RENDER_TARGETS; i++) {
86 if (cbuf_cpp[i]) {
87 gmem->cbuf_base[i] = align(total, 0x4000);
88 total = gmem->cbuf_base[i] + cbuf_cpp[i] * bin_w * bin_h;
89 }
90 }
91
92 if (zsbuf_cpp[0]) {
93 gmem->zsbuf_base[0] = align(total, 0x4000);
94 total = gmem->zsbuf_base[0] + zsbuf_cpp[0] * bin_w * bin_h;
95 }
96
97 if (zsbuf_cpp[1]) {
98 gmem->zsbuf_base[1] = align(total, 0x4000);
99 total = gmem->zsbuf_base[1] + zsbuf_cpp[1] * bin_w * bin_h;
100 }
101
102 return total;
103 }
104
105 static void
106 calculate_tiles(struct fd_batch *batch)
107 {
108 struct fd_context *ctx = batch->ctx;
109 struct fd_gmem_stateobj *gmem = &ctx->gmem;
110 struct pipe_scissor_state *scissor = &batch->max_scissor;
111 struct pipe_framebuffer_state *pfb = &batch->framebuffer;
112 const uint32_t gmem_alignment = ctx->screen->gmem_alignment;
113 const uint32_t gmem_size = ctx->screen->gmemsize_bytes;
114 uint32_t minx, miny, width, height;
115 uint32_t nbins_x = 1, nbins_y = 1;
116 uint32_t bin_w, bin_h;
117 uint32_t max_width = bin_width(ctx->screen);
118 uint8_t cbuf_cpp[MAX_RENDER_TARGETS] = {0}, zsbuf_cpp[2] = {0};
119 uint32_t i, j, t, xoff, yoff;
120 uint32_t tpp_x, tpp_y;
121 bool has_zs = !!(batch->resolve & (FD_BUFFER_DEPTH | FD_BUFFER_STENCIL));
122 int tile_n[ARRAY_SIZE(ctx->pipe)];
123
124 if (has_zs) {
125 struct fd_resource *rsc = fd_resource(pfb->zsbuf->texture);
126 zsbuf_cpp[0] = rsc->cpp;
127 if (rsc->stencil)
128 zsbuf_cpp[1] = rsc->stencil->cpp;
129 }
130 for (i = 0; i < pfb->nr_cbufs; i++) {
131 if (pfb->cbufs[i])
132 cbuf_cpp[i] = util_format_get_blocksize(pfb->cbufs[i]->format);
133 else
134 cbuf_cpp[i] = 4;
135 }
136
137 if (!memcmp(gmem->zsbuf_cpp, zsbuf_cpp, sizeof(zsbuf_cpp)) &&
138 !memcmp(gmem->cbuf_cpp, cbuf_cpp, sizeof(cbuf_cpp)) &&
139 !memcmp(&gmem->scissor, scissor, sizeof(gmem->scissor))) {
140 /* everything is up-to-date */
141 return;
142 }
143
144 if (fd_mesa_debug & FD_DBG_NOSCIS) {
145 minx = 0;
146 miny = 0;
147 width = pfb->width;
148 height = pfb->height;
149 } else {
150 /* round down to multiple of alignment: */
151 minx = scissor->minx & ~(gmem_alignment - 1);
152 miny = scissor->miny & ~(gmem_alignment - 1);
153 width = scissor->maxx - minx;
154 height = scissor->maxy - miny;
155 }
156
157 bin_w = align(width, gmem_alignment);
158 bin_h = align(height, gmem_alignment);
159
160 /* first, find a bin width that satisfies the maximum width
161 * restrictions:
162 */
163 while (bin_w > max_width) {
164 nbins_x++;
165 bin_w = align(width / nbins_x, gmem_alignment);
166 }
167
168 if (fd_mesa_debug & FD_DBG_MSGS) {
169 debug_printf("binning input: cbuf cpp:");
170 for (i = 0; i < pfb->nr_cbufs; i++)
171 debug_printf(" %d", cbuf_cpp[i]);
172 debug_printf(", zsbuf cpp: %d; %dx%d\n",
173 zsbuf_cpp[0], width, height);
174 }
175
176 /* then find a bin width/height that satisfies the memory
177 * constraints:
178 */
179 while (total_size(cbuf_cpp, zsbuf_cpp, bin_w, bin_h, gmem) > gmem_size) {
180 if (bin_w > bin_h) {
181 nbins_x++;
182 bin_w = align(width / nbins_x, gmem_alignment);
183 } else {
184 nbins_y++;
185 bin_h = align(height / nbins_y, gmem_alignment);
186 }
187 }
188
189 DBG("using %d bins of size %dx%d", nbins_x*nbins_y, bin_w, bin_h);
190
191 gmem->scissor = *scissor;
192 memcpy(gmem->cbuf_cpp, cbuf_cpp, sizeof(cbuf_cpp));
193 memcpy(gmem->zsbuf_cpp, zsbuf_cpp, sizeof(zsbuf_cpp));
194 gmem->bin_h = bin_h;
195 gmem->bin_w = bin_w;
196 gmem->nbins_x = nbins_x;
197 gmem->nbins_y = nbins_y;
198 gmem->minx = minx;
199 gmem->miny = miny;
200 gmem->width = width;
201 gmem->height = height;
202
203 /*
204 * Assign tiles and pipes:
205 *
206 * At some point it might be worth playing with different
207 * strategies and seeing if that makes much impact on
208 * performance.
209 */
210
211 #define div_round_up(v, a) (((v) + (a) - 1) / (a))
212 /* figure out number of tiles per pipe: */
213 tpp_x = tpp_y = 1;
214 while (div_round_up(nbins_y, tpp_y) > 8)
215 tpp_y += 2;
216 while ((div_round_up(nbins_y, tpp_y) *
217 div_round_up(nbins_x, tpp_x)) > 8)
218 tpp_x += 1;
219
220 /* configure pipes: */
221 xoff = yoff = 0;
222 for (i = 0; i < ARRAY_SIZE(ctx->pipe); i++) {
223 struct fd_vsc_pipe *pipe = &ctx->pipe[i];
224
225 if (xoff >= nbins_x) {
226 xoff = 0;
227 yoff += tpp_y;
228 }
229
230 if (yoff >= nbins_y) {
231 break;
232 }
233
234 pipe->x = xoff;
235 pipe->y = yoff;
236 pipe->w = MIN2(tpp_x, nbins_x - xoff);
237 pipe->h = MIN2(tpp_y, nbins_y - yoff);
238
239 xoff += tpp_x;
240 }
241
242 for (; i < ARRAY_SIZE(ctx->pipe); i++) {
243 struct fd_vsc_pipe *pipe = &ctx->pipe[i];
244 pipe->x = pipe->y = pipe->w = pipe->h = 0;
245 }
246
247 #if 0 /* debug */
248 printf("%dx%d ... tpp=%dx%d\n", nbins_x, nbins_y, tpp_x, tpp_y);
249 for (i = 0; i < 8; i++) {
250 struct fd_vsc_pipe *pipe = &ctx->pipe[i];
251 printf("pipe[%d]: %ux%u @ %u,%u\n", i,
252 pipe->w, pipe->h, pipe->x, pipe->y);
253 }
254 #endif
255
256 /* configure tiles: */
257 t = 0;
258 yoff = miny;
259 memset(tile_n, 0, sizeof(tile_n));
260 for (i = 0; i < nbins_y; i++) {
261 uint32_t bw, bh;
262
263 xoff = minx;
264
265 /* clip bin height: */
266 bh = MIN2(bin_h, miny + height - yoff);
267
268 for (j = 0; j < nbins_x; j++) {
269 struct fd_tile *tile = &ctx->tile[t];
270 uint32_t p;
271
272 assert(t < ARRAY_SIZE(ctx->tile));
273
274 /* pipe number: */
275 p = ((i / tpp_y) * div_round_up(nbins_x, tpp_x)) + (j / tpp_x);
276
277 /* clip bin width: */
278 bw = MIN2(bin_w, minx + width - xoff);
279
280 tile->n = tile_n[p]++;
281 tile->p = p;
282 tile->bin_w = bw;
283 tile->bin_h = bh;
284 tile->xoff = xoff;
285 tile->yoff = yoff;
286
287 t++;
288
289 xoff += bw;
290 }
291
292 yoff += bh;
293 }
294
295 #if 0 /* debug */
296 t = 0;
297 for (i = 0; i < nbins_y; i++) {
298 for (j = 0; j < nbins_x; j++) {
299 struct fd_tile *tile = &ctx->tile[t++];
300 printf("|p:%u n:%u|", tile->p, tile->n);
301 }
302 printf("\n");
303 }
304 #endif
305 }
306
307 static void
308 render_tiles(struct fd_batch *batch)
309 {
310 struct fd_context *ctx = batch->ctx;
311 struct fd_gmem_stateobj *gmem = &ctx->gmem;
312 int i;
313
314 ctx->emit_tile_init(batch);
315
316 if (batch->restore)
317 ctx->stats.batch_restore++;
318
319 for (i = 0; i < (gmem->nbins_x * gmem->nbins_y); i++) {
320 struct fd_tile *tile = &ctx->tile[i];
321
322 DBG("bin_h=%d, yoff=%d, bin_w=%d, xoff=%d",
323 tile->bin_h, tile->yoff, tile->bin_w, tile->xoff);
324
325 ctx->emit_tile_prep(batch, tile);
326
327 if (batch->restore) {
328 ctx->emit_tile_mem2gmem(batch, tile);
329 }
330
331 ctx->emit_tile_renderprep(batch, tile);
332
333 fd_hw_query_prepare_tile(batch, i, batch->gmem);
334
335 /* emit IB to drawcmds: */
336 ctx->emit_ib(batch->gmem, batch->draw);
337 fd_reset_wfi(batch);
338
339 /* emit gmem2mem to transfer tile back to system memory: */
340 ctx->emit_tile_gmem2mem(batch, tile);
341 }
342 }
343
344 static void
345 render_sysmem(struct fd_batch *batch)
346 {
347 struct fd_context *ctx = batch->ctx;
348
349 ctx->emit_sysmem_prep(batch);
350
351 fd_hw_query_prepare_tile(batch, 0, batch->gmem);
352
353 /* emit IB to drawcmds: */
354 ctx->emit_ib(batch->gmem, batch->draw);
355 fd_reset_wfi(batch);
356 }
357
358 void
359 fd_gmem_render_tiles(struct fd_batch *batch)
360 {
361 struct fd_context *ctx = batch->ctx;
362 struct pipe_framebuffer_state *pfb = &batch->framebuffer;
363 bool sysmem = false;
364
365 if (ctx->emit_sysmem_prep) {
366 if (batch->cleared || batch->gmem_reason || (batch->num_draws > 5)) {
367 DBG("GMEM: cleared=%x, gmem_reason=%x, num_draws=%u",
368 batch->cleared, batch->gmem_reason, batch->num_draws);
369 } else if (!(fd_mesa_debug & FD_DBG_NOBYPASS)) {
370 sysmem = true;
371 }
372 }
373
374 fd_reset_wfi(batch);
375
376 ctx->stats.batch_total++;
377
378 if (sysmem) {
379 DBG("%p: rendering sysmem %ux%u (%s/%s)",
380 batch, pfb->width, pfb->height,
381 util_format_short_name(pipe_surface_format(pfb->cbufs[0])),
382 util_format_short_name(pipe_surface_format(pfb->zsbuf)));
383 fd_hw_query_prepare(batch, 1);
384 render_sysmem(batch);
385 ctx->stats.batch_sysmem++;
386 } else {
387 struct fd_gmem_stateobj *gmem = &ctx->gmem;
388 calculate_tiles(batch);
389 DBG("%p: rendering %dx%d tiles %ux%u (%s/%s)",
390 batch, pfb->width, pfb->height, gmem->nbins_x, gmem->nbins_y,
391 util_format_short_name(pipe_surface_format(pfb->cbufs[0])),
392 util_format_short_name(pipe_surface_format(pfb->zsbuf)));
393 fd_hw_query_prepare(batch, gmem->nbins_x * gmem->nbins_y);
394 render_tiles(batch);
395 ctx->stats.batch_gmem++;
396 }
397
398 fd_ringbuffer_flush(batch->gmem);
399 }
400
401 /* tile needs restore if it isn't completely contained within the
402 * cleared scissor:
403 */
404 static bool
405 skip_restore(struct pipe_scissor_state *scissor, struct fd_tile *tile)
406 {
407 unsigned minx = tile->xoff;
408 unsigned maxx = tile->xoff + tile->bin_w;
409 unsigned miny = tile->yoff;
410 unsigned maxy = tile->yoff + tile->bin_h;
411 return (minx >= scissor->minx) && (maxx <= scissor->maxx) &&
412 (miny >= scissor->miny) && (maxy <= scissor->maxy);
413 }
414
415 /* When deciding whether a tile needs mem2gmem, we need to take into
416 * account the scissor rect(s) that were cleared. To simplify we only
417 * consider the last scissor rect for each buffer, since the common
418 * case would be a single clear.
419 */
420 bool
421 fd_gmem_needs_restore(struct fd_batch *batch, struct fd_tile *tile,
422 uint32_t buffers)
423 {
424 if (!(batch->restore & buffers))
425 return false;
426
427 /* if buffers partially cleared, then slow-path to figure out
428 * if this particular tile needs restoring:
429 */
430 if ((buffers & FD_BUFFER_COLOR) &&
431 (batch->partial_cleared & FD_BUFFER_COLOR) &&
432 skip_restore(&batch->cleared_scissor.color, tile))
433 return false;
434 if ((buffers & FD_BUFFER_DEPTH) &&
435 (batch->partial_cleared & FD_BUFFER_DEPTH) &&
436 skip_restore(&batch->cleared_scissor.depth, tile))
437 return false;
438 if ((buffers & FD_BUFFER_STENCIL) &&
439 (batch->partial_cleared & FD_BUFFER_STENCIL) &&
440 skip_restore(&batch->cleared_scissor.stencil, tile))
441 return false;
442
443 return true;
444 }