src/gallium/drivers/freedreno/freedreno_gmem.c

   1 /* -*- mode: C; c-file-style: "k&r"; tab-width 4; indent-tabs-mode: t; -*- */
   2
   3 /*
   4  * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the "Software"),
   8  * to deal in the Software without restriction, including without limitation
   9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10  * and/or sell copies of the Software, and to permit persons to whom the
  11  * Software is furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice (including the next
  14  * paragraph) shall be included in all copies or substantial portions of the
  15  * Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  22  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  23  * SOFTWARE.
  24  *
  25  * Authors:
  26  *    Rob Clark <robclark@freedesktop.org>
  27  */
  28
  29 #include "pipe/p_state.h"
  30 #include "util/u_string.h"
  31 #include "util/u_memory.h"
  32 #include "util/u_inlines.h"
  33 #include "util/u_format.h"
  34
  35 #include "freedreno_gmem.h"
  36 #include "freedreno_context.h"
  37 #include "freedreno_resource.h"
  38 #include "freedreno_util.h"
  39
  40 /*
  41  * GMEM is the small (ie. 256KiB for a200, 512KiB for a220, etc) tile buffer
  42  * inside the GPU.  All rendering happens to GMEM.  Larger render targets
  43  * are split into tiles that are small enough for the color (and depth and/or
  44  * stencil, if enabled) buffers to fit within GMEM.  Before rendering a tile,
  45  * if there was not a clear invalidating the previous tile contents, we need
  46  * to restore the previous tiles contents (system mem -> GMEM), and after all
  47  * the draw calls, before moving to the next tile, we need to save the tile
  48  * contents (GMEM -> system mem).
  49  *
  50  * The code in this file handles dealing with GMEM and tiling.
  51  *
  52  * The structure of the ringbuffer ends up being:
  53  *
  54  *     +--<---<-- IB ---<---+---<---+---<---<---<--+
  55  *     |                    |       |              |
  56  *     v                    ^       ^              ^
  57  *   ------------------------------------------------------
  58  *     | clear/draw cmds | Tile0 | Tile1 | .... | TileN |
  59  *   ------------------------------------------------------
  60  *                       ^
  61  *                       |
  62  *                       address submitted in issueibcmds
  63  *
  64  * Where the per-tile section handles scissor setup, mem2gmem restore (if
  65  * needed), IB to draw cmds earlier in the ringbuffer, and then gmem2mem
  66  * resolve.
  67  */
  68
  69 static uint32_t bin_width(struct fd_context *ctx)
  70 {
  71         if (ctx->screen->gpu_id >= 300)
  72                 return 992;
  73         return 512;
  74 }
  75
  76 static void
  77 calculate_tiles(struct fd_context *ctx)
  78 {
  79         struct fd_gmem_stateobj *gmem = &ctx->gmem;
  80         struct pipe_scissor_state *scissor = &ctx->max_scissor;
  81         struct pipe_framebuffer_state *pfb = &ctx->framebuffer;
  82         uint32_t gmem_size = ctx->screen->gmemsize_bytes;
  83         uint32_t minx, miny, width, height;
  84         uint32_t nbins_x = 1, nbins_y = 1;
  85         uint32_t bin_w, bin_h;
  86         uint32_t max_width = bin_width(ctx);
  87         uint32_t cpp = 4;
  88         uint32_t i, j, t, xoff, yoff;
  89         uint32_t tpp_x, tpp_y;
  90         bool has_zs = !!(ctx->resolve & (FD_BUFFER_DEPTH | FD_BUFFER_STENCIL));
  91
  92         if (pfb->cbufs[0])
  93                 cpp = util_format_get_blocksize(pfb->cbufs[0]->format);
  94
  95         if ((gmem->cpp == cpp) && (gmem->has_zs == has_zs) &&
  96                         !memcmp(&gmem->scissor, scissor, sizeof(gmem->scissor))) {
  97                 /* everything is up-to-date */
  98                 return;
  99         }
 100
 101         /* if have depth/stencil, we need to leave room: */
 102         if (has_zs) {
 103                 gmem_size /= 2;
 104                 max_width /= 2;
 105         }
 106
 107         if (fd_mesa_debug & FD_DBG_DSCIS) {
 108                 minx = 0;
 109                 miny = 0;
 110                 width = pfb->width;
 111                 height = pfb->height;
 112         } else {
 113                 minx = scissor->minx & ~31; /* round down to multiple of 32 */
 114                 miny = scissor->miny & ~31;
 115                 width = scissor->maxx - minx;
 116                 height = scissor->maxy - miny;
 117         }
 118
 119         bin_w = align(width, 32);
 120         bin_h = align(height, 32);
 121
 122         /* first, find a bin width that satisfies the maximum width
 123          * restrictions:
 124          */
 125         while (bin_w > max_width) {
 126                 nbins_x++;
 127                 bin_w = align(width / nbins_x, 32);
 128         }
 129
 130         /* then find a bin height that satisfies the memory constraints:
 131          */
 132         while ((bin_w * bin_h * cpp) > gmem_size) {
 133                 nbins_y++;
 134                 bin_h = align(height / nbins_y, 32);
 135         }
 136
 137         DBG("using %d bins of size %dx%d", nbins_x*nbins_y, bin_w, bin_h);
 138
 139         gmem->scissor = *scissor;
 140         gmem->cpp = cpp;
 141         gmem->has_zs = has_zs;
 142         gmem->bin_h = bin_h;
 143         gmem->bin_w = bin_w;
 144         gmem->nbins_x = nbins_x;
 145         gmem->nbins_y = nbins_y;
 146         gmem->width = width;
 147         gmem->height = height;
 148
 149         /*
 150          * Assign tiles and pipes:
 151          *
 152          * At some point it might be worth playing with different
 153          * strategies and seeing if that makes much impact on
 154          * performance.
 155          */
 156
 157 #define div_round_up(v, a)  (((v) + (a) - 1) / (a))
 158         /* figure out number of tiles per pipe: */
 159         tpp_x = tpp_y = 1;
 160         while (div_round_up(nbins_y, tpp_y) > 8)
 161                 tpp_y += 2;
 162         while ((div_round_up(nbins_y, tpp_y) *
 163                         div_round_up(nbins_x, tpp_x)) > 8)
 164                 tpp_x += 1;
 165
 166         /* configure pipes: */
 167         xoff = yoff = 0;
 168         for (i = 0; i < ARRAY_SIZE(ctx->pipe); i++) {
 169                 struct fd_vsc_pipe *pipe = &ctx->pipe[i];
 170
 171                 if (xoff >= nbins_x) {
 172                         xoff = 0;
 173                         yoff += tpp_y;
 174                 }
 175
 176                 if (yoff >= nbins_y) {
 177                         break;
 178                 }
 179
 180                 pipe->x = xoff;
 181                 pipe->y = yoff;
 182                 pipe->w = MIN2(tpp_x, nbins_x - xoff);
 183                 pipe->h = MIN2(tpp_y, nbins_y - yoff);
 184
 185                 xoff += tpp_x;
 186         }
 187
 188         for (; i < ARRAY_SIZE(ctx->pipe); i++) {
 189                 struct fd_vsc_pipe *pipe = &ctx->pipe[i];
 190                 pipe->x = pipe->y = pipe->w = pipe->h = 0;
 191         }
 192
 193 #if 0 /* debug */
 194         printf("%dx%d ... tpp=%dx%d\n", nbins_x, nbins_y, tpp_x, tpp_y);
 195         for (i = 0; i < 8; i++) {
 196                 struct fd_vsc_pipe *pipe = &ctx->pipe[i];
 197                 printf("pipe[%d]: %ux%u @ %u,%u\n", i,
 198                                 pipe->w, pipe->h, pipe->x, pipe->y);
 199         }
 200 #endif
 201
 202         /* configure tiles: */
 203         t = 0;
 204         yoff = miny;
 205         for (i = 0; i < nbins_y; i++) {
 206                 uint32_t bw, bh;
 207
 208                 xoff = minx;
 209
 210                 /* clip bin height: */
 211                 bh = MIN2(bin_h, miny + height - yoff);
 212
 213                 for (j = 0; j < nbins_x; j++) {
 214                         struct fd_tile *tile = &ctx->tile[t];
 215                         uint32_t n, p;
 216
 217                         assert(t < ARRAY_SIZE(ctx->tile));
 218
 219                         /* pipe number: */
 220                         p = ((i / tpp_y) * div_round_up(nbins_x, tpp_x)) + (j / tpp_x);
 221
 222                         /* slot number: */
 223                         n = ((i % tpp_y) * tpp_x) + (j % tpp_x);
 224
 225                         /* clip bin width: */
 226                         bw = MIN2(bin_w, minx + width - xoff);
 227
 228                         tile->n = n;
 229                         tile->p = p;
 230                         tile->bin_w = bw;
 231                         tile->bin_h = bh;
 232                         tile->xoff = xoff;
 233                         tile->yoff = yoff;
 234
 235                         t++;
 236
 237                         xoff += bw;
 238                 }
 239
 240                 yoff += bh;
 241         }
 242
 243 #if 0 /* debug */
 244         t = 0;
 245         for (i = 0; i < nbins_y; i++) {
 246                 for (j = 0; j < nbins_x; j++) {
 247                         struct fd_tile *tile = &ctx->tile[t++];
 248                         printf("|p:%u n:%u|", tile->p, tile->n);
 249                 }
 250                 printf("\n");
 251         }
 252 #endif
 253 }
 254
 255 static void
 256 render_tiles(struct fd_context *ctx)
 257 {
 258         struct fd_gmem_stateobj *gmem = &ctx->gmem;
 259         int i;
 260
 261         ctx->emit_tile_init(ctx);
 262
 263         if (ctx->restore)
 264                 ctx->stats.batch_restore++;
 265
 266         for (i = 0; i < (gmem->nbins_x * gmem->nbins_y); i++) {
 267                 struct fd_tile *tile = &ctx->tile[i];
 268
 269                 DBG("bin_h=%d, yoff=%d, bin_w=%d, xoff=%d",
 270                         tile->bin_h, tile->yoff, tile->bin_w, tile->xoff);
 271
 272                 ctx->emit_tile_prep(ctx, tile);
 273
 274                 if (ctx->restore)
 275                         ctx->emit_tile_mem2gmem(ctx, tile);
 276
 277                 ctx->emit_tile_renderprep(ctx, tile);
 278
 279                 /* emit IB to drawcmds: */
 280                 OUT_IB(ctx->ring, ctx->draw_start, ctx->draw_end);
 281                 fd_reset_wfi(ctx);
 282
 283                 /* emit gmem2mem to transfer tile back to system memory: */
 284                 ctx->emit_tile_gmem2mem(ctx, tile);
 285         }
 286 }
 287
 288 static void
 289 render_sysmem(struct fd_context *ctx)
 290 {
 291         ctx->emit_sysmem_prep(ctx);
 292
 293         /* emit IB to drawcmds: */
 294         OUT_IB(ctx->ring, ctx->draw_start, ctx->draw_end);
 295         fd_reset_wfi(ctx);
 296 }
 297
 298 void
 299 fd_gmem_render_tiles(struct pipe_context *pctx)
 300 {
 301         struct fd_context *ctx = fd_context(pctx);
 302         struct pipe_framebuffer_state *pfb = &ctx->framebuffer;
 303         uint32_t timestamp = 0;
 304         bool sysmem = false;
 305
 306         if (ctx->emit_sysmem_prep) {
 307                 if (ctx->cleared || ctx->gmem_reason || (ctx->num_draws > 5)) {
 308                         DBG("GMEM: cleared=%x, gmem_reason=%x, num_draws=%u",
 309                                 ctx->cleared, ctx->gmem_reason, ctx->num_draws);
 310                 } else if (!(fd_mesa_debug & FD_DBG_DBYPASS)) {
 311                         sysmem = true;
 312                 }
 313         }
 314
 315         /* mark the end of the clear/draw cmds before emitting per-tile cmds: */
 316         fd_ringmarker_mark(ctx->draw_end);
 317         fd_ringmarker_mark(ctx->binning_end);
 318
 319         fd_reset_wfi(ctx);
 320
 321         ctx->stats.batch_total++;
 322
 323         if (sysmem) {
 324                 DBG("rendering sysmem (%s/%s)",
 325                         util_format_short_name(pipe_surface_format(pfb->cbufs[0])),
 326                         util_format_short_name(pipe_surface_format(pfb->zsbuf)));
 327                 render_sysmem(ctx);
 328                 ctx->stats.batch_sysmem++;
 329         } else {
 330                 struct fd_gmem_stateobj *gmem = &ctx->gmem;
 331                 calculate_tiles(ctx);
 332                 DBG("rendering %dx%d tiles (%s/%s)", gmem->nbins_x, gmem->nbins_y,
 333                         util_format_short_name(pipe_surface_format(pfb->cbufs[0])),
 334                         util_format_short_name(pipe_surface_format(pfb->zsbuf)));
 335                 render_tiles(ctx);
 336                 ctx->stats.batch_gmem++;
 337         }
 338
 339         /* GPU executes starting from tile cmds, which IB back to draw cmds: */
 340         fd_ringmarker_flush(ctx->draw_end);
 341
 342         /* mark start for next draw/binning cmds: */
 343         fd_ringmarker_mark(ctx->draw_start);
 344         fd_ringmarker_mark(ctx->binning_start);
 345
 346         fd_reset_wfi(ctx);
 347
 348         /* update timestamps on render targets: */
 349         timestamp = fd_ringbuffer_timestamp(ctx->ring);
 350         if (pfb->cbufs[0])
 351                 fd_resource(pfb->cbufs[0]->texture)->timestamp = timestamp;
 352         if (pfb->zsbuf)
 353                 fd_resource(pfb->zsbuf->texture)->timestamp = timestamp;
 354
 355         /* reset maximal bounds: */
 356         ctx->max_scissor.minx = ctx->max_scissor.miny = ~0;
 357         ctx->max_scissor.maxx = ctx->max_scissor.maxy = 0;
 358
 359         /* Note that because the per-tile setup and mem2gmem/gmem2mem are emitted
 360          * after the draw/clear calls, but executed before, we need to preemptively
 361          * flag some state as dirty before the first draw/clear call.
 362          *
 363          * TODO maybe we need to mark all state as dirty to not worry about state
 364          * being clobbered by other contexts?
 365          */
 366         ctx->dirty |= FD_DIRTY_ZSA |
 367                         FD_DIRTY_RASTERIZER |
 368                         FD_DIRTY_FRAMEBUFFER |
 369                         FD_DIRTY_SAMPLE_MASK |
 370                         FD_DIRTY_VIEWPORT |
 371                         FD_DIRTY_CONSTBUF |
 372                         FD_DIRTY_PROG |
 373                         FD_DIRTY_SCISSOR |
 374                         /* probably only needed if we need to mem2gmem on the next
 375                          * draw..  but not sure if there is a good way to know?
 376                          */
 377                         FD_DIRTY_VERTTEX |
 378                         FD_DIRTY_FRAGTEX |
 379                         FD_DIRTY_BLEND;
 380
 381         if (fd_mesa_debug & FD_DBG_DGMEM)
 382                 ctx->dirty = 0xffffffff;
 383 }