src/gallium/drivers/freedreno/freedreno_gmem.c

   1 /*
   2  * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  20  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  21  * SOFTWARE.
  22  *
  23  * Authors:
  24  *    Rob Clark <robclark@freedesktop.org>
  25  */
  26
  27 #include "pipe/p_state.h"
  28 #include "util/u_string.h"
  29 #include "util/u_memory.h"
  30 #include "util/u_inlines.h"
  31 #include "util/u_format.h"
  32
  33 #include "freedreno_gmem.h"
  34 #include "freedreno_context.h"
  35 #include "freedreno_fence.h"
  36 #include "freedreno_resource.h"
  37 #include "freedreno_query_hw.h"
  38 #include "freedreno_util.h"
  39
  40 /*
  41  * GMEM is the small (ie. 256KiB for a200, 512KiB for a220, etc) tile buffer
  42  * inside the GPU.  All rendering happens to GMEM.  Larger render targets
  43  * are split into tiles that are small enough for the color (and depth and/or
  44  * stencil, if enabled) buffers to fit within GMEM.  Before rendering a tile,
  45  * if there was not a clear invalidating the previous tile contents, we need
  46  * to restore the previous tiles contents (system mem -> GMEM), and after all
  47  * the draw calls, before moving to the next tile, we need to save the tile
  48  * contents (GMEM -> system mem).
  49  *
  50  * The code in this file handles dealing with GMEM and tiling.
  51  *
  52  * The structure of the ringbuffer ends up being:
  53  *
  54  *     +--<---<-- IB ---<---+---<---+---<---<---<--+
  55  *     |                    |       |              |
  56  *     v                    ^       ^              ^
  57  *   ------------------------------------------------------
  58  *     | clear/draw cmds | Tile0 | Tile1 | .... | TileN |
  59  *   ------------------------------------------------------
  60  *                       ^
  61  *                       |
  62  *                       address submitted in issueibcmds
  63  *
  64  * Where the per-tile section handles scissor setup, mem2gmem restore (if
  65  * needed), IB to draw cmds earlier in the ringbuffer, and then gmem2mem
  66  * resolve.
  67  */
  68
  69 static uint32_t bin_width(struct fd_screen *screen)
  70 {
  71         if (is_a4xx(screen) || is_a5xx(screen) || is_a6xx(screen))
  72                 return 1024;
  73         if (is_a3xx(screen))
  74                 return 992;
  75         return 512;
  76 }
  77
  78 static uint32_t
  79 total_size(uint8_t cbuf_cpp[], uint8_t zsbuf_cpp[2],
  80                    uint32_t bin_w, uint32_t bin_h, struct fd_gmem_stateobj *gmem)
  81 {
  82         uint32_t total = 0, i;
  83
  84         for (i = 0; i < MAX_RENDER_TARGETS; i++) {
  85                 if (cbuf_cpp[i]) {
  86                         gmem->cbuf_base[i] = align(total, 0x4000);
  87                         total = gmem->cbuf_base[i] + cbuf_cpp[i] * bin_w * bin_h;
  88                 }
  89         }
  90
  91         if (zsbuf_cpp[0]) {
  92                 gmem->zsbuf_base[0] = align(total, 0x4000);
  93                 total = gmem->zsbuf_base[0] + zsbuf_cpp[0] * bin_w * bin_h;
  94         }
  95
  96         if (zsbuf_cpp[1]) {
  97                 gmem->zsbuf_base[1] = align(total, 0x4000);
  98                 total = gmem->zsbuf_base[1] + zsbuf_cpp[1] * bin_w * bin_h;
  99         }
 100
 101         return total;
 102 }
 103
 104 static void
 105 calculate_tiles(struct fd_batch *batch)
 106 {
 107         struct fd_context *ctx = batch->ctx;
 108         struct fd_screen *screen = ctx->screen;
 109         struct fd_gmem_stateobj *gmem = &ctx->gmem;
 110         struct pipe_scissor_state *scissor = &batch->max_scissor;
 111         struct pipe_framebuffer_state *pfb = &batch->framebuffer;
 112         const uint32_t gmem_alignw = screen->gmem_alignw;
 113         const uint32_t gmem_alignh = screen->gmem_alignh;
 114         const unsigned npipes = screen->num_vsc_pipes;
 115         const uint32_t gmem_size = screen->gmemsize_bytes;
 116         uint32_t minx, miny, width, height;
 117         uint32_t nbins_x = 1, nbins_y = 1;
 118         uint32_t bin_w, bin_h;
 119         uint32_t max_width = bin_width(screen);
 120         uint8_t cbuf_cpp[MAX_RENDER_TARGETS] = {0}, zsbuf_cpp[2] = {0};
 121         uint32_t i, j, t, xoff, yoff;
 122         uint32_t tpp_x, tpp_y;
 123         bool has_zs = !!(batch->resolve & (FD_BUFFER_DEPTH | FD_BUFFER_STENCIL));
 124         int tile_n[npipes];
 125
 126         if (has_zs) {
 127                 struct fd_resource *rsc = fd_resource(pfb->zsbuf->texture);
 128                 zsbuf_cpp[0] = rsc->cpp;
 129                 if (rsc->stencil)
 130                         zsbuf_cpp[1] = rsc->stencil->cpp;
 131         }
 132         for (i = 0; i < pfb->nr_cbufs; i++) {
 133                 if (pfb->cbufs[i])
 134                         cbuf_cpp[i] = util_format_get_blocksize(pfb->cbufs[i]->format);
 135                 else
 136                         cbuf_cpp[i] = 4;
 137                 /* if MSAA, color buffers are super-sampled in GMEM: */
 138                 cbuf_cpp[i] *= pfb->samples;
 139         }
 140
 141         if (!memcmp(gmem->zsbuf_cpp, zsbuf_cpp, sizeof(zsbuf_cpp)) &&
 142                 !memcmp(gmem->cbuf_cpp, cbuf_cpp, sizeof(cbuf_cpp)) &&
 143                 !memcmp(&gmem->scissor, scissor, sizeof(gmem->scissor))) {
 144                 /* everything is up-to-date */
 145                 return;
 146         }
 147
 148         if (fd_mesa_debug & FD_DBG_NOSCIS) {
 149                 minx = 0;
 150                 miny = 0;
 151                 width = pfb->width;
 152                 height = pfb->height;
 153         } else {
 154                 /* round down to multiple of alignment: */
 155                 minx = scissor->minx & ~(gmem_alignw - 1);
 156                 miny = scissor->miny & ~(gmem_alignh - 1);
 157                 width = scissor->maxx - minx;
 158                 height = scissor->maxy - miny;
 159         }
 160
 161         bin_w = align(width, gmem_alignw);
 162         bin_h = align(height, gmem_alignh);
 163
 164         /* first, find a bin width that satisfies the maximum width
 165          * restrictions:
 166          */
 167         while (bin_w > max_width) {
 168                 nbins_x++;
 169                 bin_w = align(width / nbins_x, gmem_alignw);
 170         }
 171
 172         if (fd_mesa_debug & FD_DBG_MSGS) {
 173                 debug_printf("binning input: cbuf cpp:");
 174                 for (i = 0; i < pfb->nr_cbufs; i++)
 175                         debug_printf(" %d", cbuf_cpp[i]);
 176                 debug_printf(", zsbuf cpp: %d; %dx%d\n",
 177                                 zsbuf_cpp[0], width, height);
 178         }
 179
 180         /* then find a bin width/height that satisfies the memory
 181          * constraints:
 182          */
 183         while (total_size(cbuf_cpp, zsbuf_cpp, bin_w, bin_h, gmem) > gmem_size) {
 184                 if (bin_w > bin_h) {
 185                         nbins_x++;
 186                         bin_w = align(width / nbins_x, gmem_alignw);
 187                 } else {
 188                         nbins_y++;
 189                         bin_h = align(height / nbins_y, gmem_alignh);
 190                 }
 191         }
 192
 193         DBG("using %d bins of size %dx%d", nbins_x*nbins_y, bin_w, bin_h);
 194
 195         gmem->scissor = *scissor;
 196         memcpy(gmem->cbuf_cpp, cbuf_cpp, sizeof(cbuf_cpp));
 197         memcpy(gmem->zsbuf_cpp, zsbuf_cpp, sizeof(zsbuf_cpp));
 198         gmem->bin_h = bin_h;
 199         gmem->bin_w = bin_w;
 200         gmem->nbins_x = nbins_x;
 201         gmem->nbins_y = nbins_y;
 202         gmem->minx = minx;
 203         gmem->miny = miny;
 204         gmem->width = width;
 205         gmem->height = height;
 206
 207         /*
 208          * Assign tiles and pipes:
 209          *
 210          * At some point it might be worth playing with different
 211          * strategies and seeing if that makes much impact on
 212          * performance.
 213          */
 214
 215 #define div_round_up(v, a)  (((v) + (a) - 1) / (a))
 216         /* figure out number of tiles per pipe: */
 217         tpp_x = tpp_y = 1;
 218         while (div_round_up(nbins_y, tpp_y) > screen->num_vsc_pipes)
 219                 tpp_y += 2;
 220         while ((div_round_up(nbins_y, tpp_y) *
 221                         div_round_up(nbins_x, tpp_x)) > screen->num_vsc_pipes)
 222                 tpp_x += 1;
 223
 224         gmem->maxpw = tpp_x;
 225         gmem->maxph = tpp_y;
 226
 227         /* configure pipes: */
 228         xoff = yoff = 0;
 229         for (i = 0; i < npipes; i++) {
 230                 struct fd_vsc_pipe *pipe = &ctx->vsc_pipe[i];
 231
 232                 if (xoff >= nbins_x) {
 233                         xoff = 0;
 234                         yoff += tpp_y;
 235                 }
 236
 237                 if (yoff >= nbins_y) {
 238                         break;
 239                 }
 240
 241                 pipe->x = xoff;
 242                 pipe->y = yoff;
 243                 pipe->w = MIN2(tpp_x, nbins_x - xoff);
 244                 pipe->h = MIN2(tpp_y, nbins_y - yoff);
 245
 246                 xoff += tpp_x;
 247         }
 248
 249         for (; i < npipes; i++) {
 250                 struct fd_vsc_pipe *pipe = &ctx->vsc_pipe[i];
 251                 pipe->x = pipe->y = pipe->w = pipe->h = 0;
 252         }
 253
 254 #if 0 /* debug */
 255         printf("%dx%d ... tpp=%dx%d\n", nbins_x, nbins_y, tpp_x, tpp_y);
 256         for (i = 0; i < 8; i++) {
 257                 struct fd_vsc_pipe *pipe = &ctx->pipe[i];
 258                 printf("pipe[%d]: %ux%u @ %u,%u\n", i,
 259                                 pipe->w, pipe->h, pipe->x, pipe->y);
 260         }
 261 #endif
 262
 263         /* configure tiles: */
 264         t = 0;
 265         yoff = miny;
 266         memset(tile_n, 0, sizeof(tile_n));
 267         for (i = 0; i < nbins_y; i++) {
 268                 uint32_t bw, bh;
 269
 270                 xoff = minx;
 271
 272                 /* clip bin height: */
 273                 bh = MIN2(bin_h, miny + height - yoff);
 274
 275                 for (j = 0; j < nbins_x; j++) {
 276                         struct fd_tile *tile = &ctx->tile[t];
 277                         uint32_t p;
 278
 279                         assert(t < ARRAY_SIZE(ctx->tile));
 280
 281                         /* pipe number: */
 282                         p = ((i / tpp_y) * div_round_up(nbins_x, tpp_x)) + (j / tpp_x);
 283
 284                         /* clip bin width: */
 285                         bw = MIN2(bin_w, minx + width - xoff);
 286
 287                         tile->n = tile_n[p]++;
 288                         tile->p = p;
 289                         tile->bin_w = bw;
 290                         tile->bin_h = bh;
 291                         tile->xoff = xoff;
 292                         tile->yoff = yoff;
 293
 294                         t++;
 295
 296                         xoff += bw;
 297                 }
 298
 299                 yoff += bh;
 300         }
 301
 302 #if 0 /* debug */
 303         t = 0;
 304         for (i = 0; i < nbins_y; i++) {
 305                 for (j = 0; j < nbins_x; j++) {
 306                         struct fd_tile *tile = &ctx->tile[t++];
 307                         printf("|p:%u n:%u|", tile->p, tile->n);
 308                 }
 309                 printf("\n");
 310         }
 311 #endif
 312 }
 313
 314 static void
 315 render_tiles(struct fd_batch *batch)
 316 {
 317         struct fd_context *ctx = batch->ctx;
 318         struct fd_gmem_stateobj *gmem = &ctx->gmem;
 319         int i;
 320
 321         ctx->emit_tile_init(batch);
 322
 323         if (batch->restore)
 324                 ctx->stats.batch_restore++;
 325
 326         for (i = 0; i < (gmem->nbins_x * gmem->nbins_y); i++) {
 327                 struct fd_tile *tile = &ctx->tile[i];
 328
 329                 DBG("bin_h=%d, yoff=%d, bin_w=%d, xoff=%d",
 330                         tile->bin_h, tile->yoff, tile->bin_w, tile->xoff);
 331
 332                 ctx->emit_tile_prep(batch, tile);
 333
 334                 if (batch->restore) {
 335                         ctx->emit_tile_mem2gmem(batch, tile);
 336                 }
 337
 338                 ctx->emit_tile_renderprep(batch, tile);
 339
 340                 if (ctx->query_prepare_tile)
 341                         ctx->query_prepare_tile(batch, i, batch->gmem);
 342
 343                 /* emit IB to drawcmds: */
 344                 ctx->emit_ib(batch->gmem, batch->draw);
 345                 fd_reset_wfi(batch);
 346
 347                 /* emit gmem2mem to transfer tile back to system memory: */
 348                 ctx->emit_tile_gmem2mem(batch, tile);
 349         }
 350
 351         if (ctx->emit_tile_fini)
 352                 ctx->emit_tile_fini(batch);
 353 }
 354
 355 static void
 356 render_sysmem(struct fd_batch *batch)
 357 {
 358         struct fd_context *ctx = batch->ctx;
 359
 360         ctx->emit_sysmem_prep(batch);
 361
 362         if (ctx->query_prepare_tile)
 363                 ctx->query_prepare_tile(batch, 0, batch->gmem);
 364
 365         /* emit IB to drawcmds: */
 366         ctx->emit_ib(batch->gmem, batch->draw);
 367         fd_reset_wfi(batch);
 368
 369         if (ctx->emit_sysmem_fini)
 370                 ctx->emit_sysmem_fini(batch);
 371 }
 372
 373 static void
 374 flush_ring(struct fd_batch *batch)
 375 {
 376         uint32_t timestamp;
 377         int out_fence_fd = -1;
 378
 379         fd_submit_flush(batch->submit, batch->in_fence_fd,
 380                         batch->needs_out_fence_fd ? &out_fence_fd : NULL,
 381                         &timestamp);
 382
 383         fd_fence_populate(batch->fence, timestamp, out_fence_fd);
 384 }
 385
 386 void
 387 fd_gmem_render_tiles(struct fd_batch *batch)
 388 {
 389         struct fd_context *ctx = batch->ctx;
 390         struct pipe_framebuffer_state *pfb = &batch->framebuffer;
 391         bool sysmem = false;
 392
 393         if (ctx->emit_sysmem_prep && !batch->nondraw) {
 394                 if (batch->cleared || batch->gmem_reason ||
 395                                 ((batch->num_draws > 5) && !batch->blit) ||
 396                                 (pfb->samples > 1)) {
 397                         DBG("GMEM: cleared=%x, gmem_reason=%x, num_draws=%u, samples=%u",
 398                                 batch->cleared, batch->gmem_reason, batch->num_draws,
 399                                 pfb->samples);
 400                 } else if (!(fd_mesa_debug & FD_DBG_NOBYPASS)) {
 401                         sysmem = true;
 402                 }
 403
 404                 /* For ARB_framebuffer_no_attachments: */
 405                 if ((pfb->nr_cbufs == 0) && !pfb->zsbuf) {
 406                         sysmem = true;
 407                 }
 408         }
 409
 410         fd_reset_wfi(batch);
 411
 412         ctx->stats.batch_total++;
 413
 414         if (batch->nondraw) {
 415                 DBG("%p: rendering non-draw", batch);
 416                 ctx->stats.batch_nondraw++;
 417         } else if (sysmem) {
 418                 DBG("%p: rendering sysmem %ux%u (%s/%s)",
 419                         batch, pfb->width, pfb->height,
 420                         util_format_short_name(pipe_surface_format(pfb->cbufs[0])),
 421                         util_format_short_name(pipe_surface_format(pfb->zsbuf)));
 422                 if (ctx->query_prepare)
 423                         ctx->query_prepare(batch, 1);
 424                 render_sysmem(batch);
 425                 ctx->stats.batch_sysmem++;
 426         } else {
 427                 struct fd_gmem_stateobj *gmem = &ctx->gmem;
 428                 calculate_tiles(batch);
 429                 DBG("%p: rendering %dx%d tiles %ux%u (%s/%s)",
 430                         batch, pfb->width, pfb->height, gmem->nbins_x, gmem->nbins_y,
 431                         util_format_short_name(pipe_surface_format(pfb->cbufs[0])),
 432                         util_format_short_name(pipe_surface_format(pfb->zsbuf)));
 433                 if (ctx->query_prepare)
 434                         ctx->query_prepare(batch, gmem->nbins_x * gmem->nbins_y);
 435                 render_tiles(batch);
 436                 ctx->stats.batch_gmem++;
 437         }
 438
 439         flush_ring(batch);
 440 }
 441
 442 /* When deciding whether a tile needs mem2gmem, we need to take into
 443  * account the scissor rect(s) that were cleared.  To simplify we only
 444  * consider the last scissor rect for each buffer, since the common
 445  * case would be a single clear.
 446  */
 447 bool
 448 fd_gmem_needs_restore(struct fd_batch *batch, struct fd_tile *tile,
 449                 uint32_t buffers)
 450 {
 451         if (!(batch->restore & buffers))
 452                 return false;
 453
 454         return true;
 455 }