src/gallium/drivers/freedreno/freedreno_program.c

   1 /*
   2  * Copyright (C) 2014 Rob Clark <robclark@freedesktop.org>
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  20  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  21  * SOFTWARE.
  22  *
  23  * Authors:
  24  *    Rob Clark <robclark@freedesktop.org>
  25  */
  26
  27 #include "tgsi/tgsi_text.h"
  28 #include "tgsi/tgsi_ureg.h"
  29
  30 #include "freedreno_program.h"
  31 #include "freedreno_context.h"
  32
  33 static void
  34 fd_vs_state_bind(struct pipe_context *pctx, void *hwcso)
  35 {
  36         struct fd_context *ctx = fd_context(pctx);
  37         ctx->prog.vs = hwcso;
  38         ctx->dirty_shader[PIPE_SHADER_VERTEX] |= FD_DIRTY_SHADER_PROG;
  39         ctx->dirty |= FD_DIRTY_PROG;
  40 }
  41
  42 static void
  43 fd_tcs_state_bind(struct pipe_context *pctx, void *hwcso)
  44 {
  45         struct fd_context *ctx = fd_context(pctx);
  46         ctx->prog.hs = hwcso;
  47         ctx->dirty_shader[PIPE_SHADER_TESS_CTRL] |= FD_DIRTY_SHADER_PROG;
  48         ctx->dirty |= FD_DIRTY_PROG;
  49 }
  50
  51 static void
  52 fd_tes_state_bind(struct pipe_context *pctx, void *hwcso)
  53 {
  54         struct fd_context *ctx = fd_context(pctx);
  55         ctx->prog.ds = hwcso;
  56         ctx->dirty_shader[PIPE_SHADER_TESS_EVAL] |= FD_DIRTY_SHADER_PROG;
  57         ctx->dirty |= FD_DIRTY_PROG;
  58 }
  59
  60 static void
  61 fd_gs_state_bind(struct pipe_context *pctx, void *hwcso)
  62 {
  63         struct fd_context *ctx = fd_context(pctx);
  64         ctx->prog.gs = hwcso;
  65         ctx->dirty_shader[PIPE_SHADER_GEOMETRY] |= FD_DIRTY_SHADER_PROG;
  66         ctx->dirty |= FD_DIRTY_PROG;
  67 }
  68
  69 static void
  70 fd_fs_state_bind(struct pipe_context *pctx, void *hwcso)
  71 {
  72         struct fd_context *ctx = fd_context(pctx);
  73         ctx->prog.fs = hwcso;
  74         ctx->dirty_shader[PIPE_SHADER_FRAGMENT] |= FD_DIRTY_SHADER_PROG;
  75         ctx->dirty |= FD_DIRTY_PROG;
  76 }
  77
  78 static const char *solid_fs =
  79         "FRAG                                        \n"
  80         "PROPERTY FS_COLOR0_WRITES_ALL_CBUFS 1       \n"
  81         "DCL CONST[0]                                \n"
  82         "DCL OUT[0], COLOR                           \n"
  83         "  0: MOV OUT[0], CONST[0]                   \n"
  84         "  1: END                                    \n";
  85
  86 static const char *solid_vs =
  87         "VERT                                        \n"
  88         "DCL IN[0]                                   \n"
  89         "DCL OUT[0], POSITION                        \n"
  90         "  0: MOV OUT[0], IN[0]                      \n"
  91         "  1: END                                    \n";
  92
  93 static const char *blit_vs =
  94         "VERT                                        \n"
  95         "DCL IN[0]                                   \n"
  96         "DCL IN[1]                                   \n"
  97         "DCL OUT[0], GENERIC[0]                      \n"
  98         "DCL OUT[1], POSITION                        \n"
  99         "  0: MOV OUT[0], IN[0]                      \n"
 100         "  0: MOV OUT[1], IN[1]                      \n"
 101         "  1: END                                    \n";
 102
 103 static void * assemble_tgsi(struct pipe_context *pctx,
 104                 const char *src, bool frag)
 105 {
 106         struct tgsi_token toks[32];
 107         struct pipe_shader_state cso = {
 108                         .tokens = toks,
 109         };
 110
 111         bool ret = tgsi_text_translate(src, toks, ARRAY_SIZE(toks));
 112         assume(ret);
 113
 114         if (frag)
 115                 return pctx->create_fs_state(pctx, &cso);
 116         else
 117                 return pctx->create_vs_state(pctx, &cso);
 118 }
 119
 120 static void *
 121 fd_prog_blit(struct pipe_context *pctx, int rts, bool depth)
 122 {
 123         int i;
 124         struct ureg_src tc;
 125         struct ureg_program *ureg;
 126
 127         debug_assert(rts <= MAX_RENDER_TARGETS);
 128
 129         ureg = ureg_create(PIPE_SHADER_FRAGMENT);
 130         if (!ureg)
 131                 return NULL;
 132
 133         tc = ureg_DECL_fs_input(
 134                         ureg, TGSI_SEMANTIC_GENERIC, 0, TGSI_INTERPOLATE_PERSPECTIVE);
 135         for (i = 0; i < rts; i++)
 136                 ureg_TEX(ureg, ureg_DECL_output(ureg, TGSI_SEMANTIC_COLOR, i),
 137                                  TGSI_TEXTURE_2D, tc, ureg_DECL_sampler(ureg, i));
 138         if (depth)
 139                 ureg_TEX(ureg,
 140                                  ureg_writemask(
 141                                                  ureg_DECL_output(ureg, TGSI_SEMANTIC_POSITION, 0),
 142                                                  TGSI_WRITEMASK_Z),
 143                                  TGSI_TEXTURE_2D, tc, ureg_DECL_sampler(ureg, rts));
 144
 145         ureg_END(ureg);
 146
 147         return ureg_create_shader_and_destroy(ureg, pctx);
 148 }
 149
 150
 151 void fd_prog_init(struct pipe_context *pctx)
 152 {
 153         struct fd_context *ctx = fd_context(pctx);
 154         int i;
 155
 156         pctx->bind_vs_state = fd_vs_state_bind;
 157         pctx->bind_tcs_state = fd_tcs_state_bind;
 158         pctx->bind_tes_state = fd_tes_state_bind;
 159         pctx->bind_gs_state = fd_gs_state_bind;
 160         pctx->bind_fs_state = fd_fs_state_bind;
 161
 162         ctx->solid_prog.fs = assemble_tgsi(pctx, solid_fs, true);
 163         ctx->solid_prog.vs = assemble_tgsi(pctx, solid_vs, false);
 164         ctx->blit_prog[0].vs = assemble_tgsi(pctx, blit_vs, false);
 165         ctx->blit_prog[0].fs = fd_prog_blit(pctx, 1, false);
 166
 167         if (ctx->screen->gpu_id < 300)
 168                 return;
 169
 170         for (i = 1; i < ctx->screen->max_rts; i++) {
 171                 ctx->blit_prog[i].vs = ctx->blit_prog[0].vs;
 172                 ctx->blit_prog[i].fs = fd_prog_blit(pctx, i + 1, false);
 173         }
 174
 175         ctx->blit_z.vs = ctx->blit_prog[0].vs;
 176         ctx->blit_z.fs = fd_prog_blit(pctx, 0, true);
 177         ctx->blit_zs.vs = ctx->blit_prog[0].vs;
 178         ctx->blit_zs.fs = fd_prog_blit(pctx, 1, true);
 179 }
 180
 181 void fd_prog_fini(struct pipe_context *pctx)
 182 {
 183         struct fd_context *ctx = fd_context(pctx);
 184         int i;
 185
 186         pctx->delete_vs_state(pctx, ctx->solid_prog.vs);
 187         pctx->delete_fs_state(pctx, ctx->solid_prog.fs);
 188         pctx->delete_vs_state(pctx, ctx->blit_prog[0].vs);
 189         for (i = 0; i < ctx->screen->max_rts; i++)
 190                 pctx->delete_fs_state(pctx, ctx->blit_prog[i].fs);
 191         pctx->delete_fs_state(pctx, ctx->blit_z.fs);
 192         pctx->delete_fs_state(pctx, ctx->blit_zs.fs);
 193 }