79eef5e1340dc5e42f9a08e82c7f2f9475c87df9
[mesa.git] / src / gallium / drivers / freedreno / freedreno_screen.c
1 /* -*- mode: C; c-file-style: "k&r"; tab-width 4; indent-tabs-mode: t; -*- */
2
3 /*
4 * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
15 * Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
23 * SOFTWARE.
24 *
25 * Authors:
26 * Rob Clark <robclark@freedesktop.org>
27 */
28
29
30 #include "pipe/p_defines.h"
31 #include "pipe/p_screen.h"
32 #include "pipe/p_state.h"
33
34 #include "util/u_memory.h"
35 #include "util/u_inlines.h"
36 #include "util/u_format.h"
37 #include "util/u_format_s3tc.h"
38 #include "util/u_string.h"
39 #include "util/u_debug.h"
40
41 #include "os/os_time.h"
42
43 #include <stdio.h>
44 #include <errno.h>
45 #include <stdlib.h>
46
47 #include "freedreno_context.h"
48 #include "freedreno_screen.h"
49 #include "freedreno_resource.h"
50 #include "freedreno_fence.h"
51 #include "freedreno_util.h"
52
53 /* XXX this should go away */
54 #include "state_tracker/drm_driver.h"
55
56 static const struct debug_named_value debug_options[] = {
57 {"msgs", FD_DBG_MSGS, "Print debug messages"},
58 {"disasm", FD_DBG_DISASM, "Dump TGSI and adreno shader disassembly"},
59 DEBUG_NAMED_VALUE_END
60 };
61
62 DEBUG_GET_ONCE_FLAGS_OPTION(fd_mesa_debug, "FD_MESA_DEBUG", debug_options, 0)
63
64 int fd_mesa_debug = 0;
65
66 static const char *
67 fd_screen_get_name(struct pipe_screen *pscreen)
68 {
69 static char buffer[128];
70 util_snprintf(buffer, sizeof(buffer), "FD%03d",
71 fd_screen(pscreen)->device_id);
72 return buffer;
73 }
74
75 static const char *
76 fd_screen_get_vendor(struct pipe_screen *pscreen)
77 {
78 return "freedreno";
79 }
80
81 static uint64_t
82 fd_screen_get_timestamp(struct pipe_screen *pscreen)
83 {
84 int64_t cpu_time = os_time_get() * 1000;
85 return cpu_time + fd_screen(pscreen)->cpu_gpu_time_delta;
86 }
87
88 static void
89 fd_screen_fence_ref(struct pipe_screen *pscreen,
90 struct pipe_fence_handle **ptr,
91 struct pipe_fence_handle *pfence)
92 {
93 fd_fence_ref(fd_fence(pfence), (struct fd_fence **)ptr);
94 }
95
96 static boolean
97 fd_screen_fence_signalled(struct pipe_screen *screen,
98 struct pipe_fence_handle *pfence)
99 {
100 return fd_fence_signalled(fd_fence(pfence));
101 }
102
103 static boolean
104 fd_screen_fence_finish(struct pipe_screen *screen,
105 struct pipe_fence_handle *pfence,
106 uint64_t timeout)
107 {
108 return fd_fence_wait(fd_fence(pfence));
109 }
110
111 static void
112 fd_screen_destroy(struct pipe_screen *pscreen)
113 {
114 // TODO
115 DBG("TODO");
116 }
117
118 /*
119 EGL Version 1.4
120 EGL Vendor Qualcomm, Inc
121 EGL Extensions EGL_QUALCOMM_shared_image EGL_KHR_image EGL_AMD_create_image EGL_KHR_lock_surface EGL_KHR_lock_surface2 EGL_KHR_fence_sync EGL_IMG_context_priorityEGL_ANDROID_image_native_buffer
122 GL extensions: GL_AMD_compressed_ATC_texture GL_AMD_performance_monitor GL_AMD_program_binary_Z400 GL_EXT_texture_filter_anisotropic GL_EXT_texture_format_BGRA8888 GL_EXT_texture_type_2_10_10_10_REV GL_NV_fence GL_OES_compressed_ETC1_RGB8_texture GL_OES_depth_texture GL_OES_depth24 GL_OES_EGL_image GL_OES_EGL_image_external GL_OES_element_index_uint GL_OES_fbo_render_mipmap GL_OES_fragment_precision_high GL_OES_get_program_binary GL_OES_packed_depth_stencil GL_OES_rgb8_rgba8 GL_OES_standard_derivatives GL_OES_texture_3D GL_OES_texture_float GL_OES_texture_half_float GL_OES_texture_half_float_linear GL_OES_texture_npot GL_OES_vertex_half_float GL_OES_vertex_type_10_10_10_2 GL_QCOM_alpha_test GL_QCOM_binning_control GL_QCOM_driver_control GL_QCOM_perfmon_global_mode GL_QCOM_extended_get GL_QCOM_extended_get2 GL_QCOM_tiled_rendering GL_QCOM_writeonly_rendering GL_AMD_compressed_3DC_texture
123 GL_MAX_3D_TEXTURE_SIZE_OES: 1024 0 0 0
124 no GL_MAX_SAMPLES_ANGLE: GL_INVALID_ENUM
125 no GL_MAX_SAMPLES_APPLE: GL_INVALID_ENUM
126 GL_MAX_TEXTURE_MAX_ANISOTROPY_EXT: 16 0 0 0
127 no GL_MAX_SAMPLES_IMG: GL_INVALID_ENUM
128 GL_MAX_TEXTURE_SIZE: 4096 0 0 0
129 GL_MAX_VIEWPORT_DIMS: 4096 4096 0 0
130 GL_MAX_VERTEX_ATTRIBS: 16 0 0 0
131 GL_MAX_VERTEX_UNIFORM_VECTORS: 251 0 0 0
132 GL_MAX_VARYING_VECTORS: 8 0 0 0
133 GL_MAX_COMBINED_TEXTURE_IMAGE_UNITS: 20 0 0 0
134 GL_MAX_VERTEX_TEXTURE_IMAGE_UNITS: 4 0 0 0
135 GL_MAX_TEXTURE_IMAGE_UNITS: 16 0 0 0
136 GL_MAX_FRAGMENT_UNIFORM_VECTORS: 221 0 0 0
137 GL_MAX_CUBE_MAP_TEXTURE_SIZE: 4096 0 0 0
138 GL_MAX_RENDERBUFFER_SIZE: 4096 0 0 0
139 no GL_TEXTURE_NUM_LEVELS_QCOM: GL_INVALID_ENUM
140 */
141 static int
142 fd_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
143 {
144 /* this is probably not totally correct.. but it's a start: */
145 switch (param) {
146 /* Supported features (boolean caps). */
147 case PIPE_CAP_NPOT_TEXTURES:
148 case PIPE_CAP_TWO_SIDED_STENCIL:
149 case PIPE_CAP_ANISOTROPIC_FILTER:
150 case PIPE_CAP_POINT_SPRITE:
151 case PIPE_CAP_TEXTURE_SHADOW_MAP:
152 case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
153 case PIPE_CAP_BLEND_EQUATION_SEPARATE:
154 case PIPE_CAP_TEXTURE_SWIZZLE:
155 case PIPE_CAP_SHADER_STENCIL_EXPORT:
156 case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
157 case PIPE_CAP_MIXED_COLORBUFFER_FORMATS:
158 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
159 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
160 case PIPE_CAP_SM3:
161 case PIPE_CAP_SEAMLESS_CUBE_MAP:
162 case PIPE_CAP_PRIMITIVE_RESTART:
163 case PIPE_CAP_CONDITIONAL_RENDER:
164 case PIPE_CAP_TEXTURE_BARRIER:
165 case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
166 case PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION:
167 case PIPE_CAP_TGSI_INSTANCEID:
168 case PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY:
169 case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
170 case PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY:
171 case PIPE_CAP_COMPUTE:
172 case PIPE_CAP_START_INSTANCE:
173 case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
174 case PIPE_CAP_TEXTURE_MULTISAMPLE:
175 case PIPE_CAP_USER_CONSTANT_BUFFERS:
176 return 1;
177
178 case PIPE_CAP_TGSI_TEXCOORD:
179 case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
180 return 0;
181
182 case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
183 return 256;
184
185 case PIPE_CAP_GLSL_FEATURE_LEVEL:
186 return 120;
187
188 /* Unsupported features. */
189 case PIPE_CAP_INDEP_BLEND_ENABLE:
190 case PIPE_CAP_INDEP_BLEND_FUNC:
191 case PIPE_CAP_DEPTH_CLIP_DISABLE:
192 case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
193 case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
194 case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
195 case PIPE_CAP_SCALED_RESOLVE:
196 case PIPE_CAP_TGSI_CAN_COMPACT_VARYINGS:
197 case PIPE_CAP_TGSI_CAN_COMPACT_CONSTANTS:
198 case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
199 case PIPE_CAP_VERTEX_COLOR_CLAMPED:
200 case PIPE_CAP_USER_VERTEX_BUFFERS:
201 case PIPE_CAP_USER_INDEX_BUFFERS:
202 return 0;
203
204 /* Stream output. */
205 case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
206 case PIPE_CAP_STREAM_OUTPUT_PAUSE_RESUME:
207 case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
208 case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
209 return 0;
210
211 /* Texturing. */
212 case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
213 case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
214 case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
215 return 14;
216 case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
217 return 9192;
218 case PIPE_CAP_MAX_COMBINED_SAMPLERS:
219 return 20;
220
221 /* Render targets. */
222 case PIPE_CAP_MAX_RENDER_TARGETS:
223 return 1;
224
225 /* Timer queries. */
226 case PIPE_CAP_QUERY_TIME_ELAPSED:
227 case PIPE_CAP_OCCLUSION_QUERY:
228 case PIPE_CAP_QUERY_TIMESTAMP:
229 return 0;
230
231 case PIPE_CAP_MIN_TEXEL_OFFSET:
232 return -8;
233
234 case PIPE_CAP_MAX_TEXEL_OFFSET:
235 return 7;
236
237 default:
238 DBG("unknown param %d", param);
239 return 0;
240 }
241 }
242
243 static float
244 fd_screen_get_paramf(struct pipe_screen *pscreen, enum pipe_capf param)
245 {
246 switch (param) {
247 case PIPE_CAPF_MAX_LINE_WIDTH:
248 case PIPE_CAPF_MAX_LINE_WIDTH_AA:
249 case PIPE_CAPF_MAX_POINT_WIDTH:
250 case PIPE_CAPF_MAX_POINT_WIDTH_AA:
251 return 8192.0f;
252 case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
253 return 16.0f;
254 case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
255 return 16.0f;
256 case PIPE_CAPF_GUARD_BAND_LEFT:
257 case PIPE_CAPF_GUARD_BAND_TOP:
258 case PIPE_CAPF_GUARD_BAND_RIGHT:
259 case PIPE_CAPF_GUARD_BAND_BOTTOM:
260 return 0.0f;
261 default:
262 DBG("unknown paramf %d", param);
263 return 0;
264 }
265 }
266
267 static int
268 fd_screen_get_shader_param(struct pipe_screen *pscreen, unsigned shader,
269 enum pipe_shader_cap param)
270 {
271 switch(shader)
272 {
273 case PIPE_SHADER_FRAGMENT:
274 case PIPE_SHADER_VERTEX:
275 break;
276 case PIPE_SHADER_COMPUTE:
277 case PIPE_SHADER_GEOMETRY:
278 /* maye we could emulate.. */
279 return 0;
280 default:
281 DBG("unknown shader type %d", shader);
282 return 0;
283 }
284
285 /* this is probably not totally correct.. but it's a start: */
286 switch (param) {
287 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
288 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
289 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
290 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
291 return 16384;
292 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
293 return 8; /* XXX */
294 case PIPE_SHADER_CAP_MAX_INPUTS:
295 return 32;
296 case PIPE_SHADER_CAP_MAX_TEMPS:
297 return 256; /* Max native temporaries. */
298 case PIPE_SHADER_CAP_MAX_ADDRS:
299 /* XXX Isn't this equal to TEMPS? */
300 return 1; /* Max native address registers */
301 case PIPE_SHADER_CAP_MAX_CONSTS:
302 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
303 return 64;
304 case PIPE_SHADER_CAP_MAX_PREDS:
305 return 0; /* nothing uses this */
306 case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
307 return 1;
308 case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
309 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
310 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
311 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
312 return 1;
313 case PIPE_SHADER_CAP_SUBROUTINES:
314 return 0;
315 case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
316 case PIPE_SHADER_CAP_INTEGERS:
317 return 0;
318 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
319 return 16;
320 case PIPE_SHADER_CAP_PREFERRED_IR:
321 return PIPE_SHADER_IR_TGSI;
322 default:
323 DBG("unknown shader param %d", param);
324 return 0;
325 }
326 return 0;
327 }
328
329 static boolean
330 fd_screen_is_format_supported(struct pipe_screen *pscreen,
331 enum pipe_format format,
332 enum pipe_texture_target target,
333 unsigned sample_count,
334 unsigned usage)
335 {
336 unsigned retval = 0;
337
338 if ((target >= PIPE_MAX_TEXTURE_TYPES) ||
339 (sample_count > 1) || /* TODO add MSAA */
340 !util_format_is_supported(format, usage)) {
341 DBG("not supported: format=%s, target=%d, sample_count=%d, usage=%x",
342 util_format_name(format), target, sample_count, usage);
343 return FALSE;
344 }
345
346 /* TODO figure out how to render to other formats.. */
347 if ((usage & PIPE_BIND_RENDER_TARGET) &&
348 ((format != PIPE_FORMAT_B8G8R8A8_UNORM) &&
349 (format != PIPE_FORMAT_B8G8R8X8_UNORM))) {
350 DBG("not supported render target: format=%s, target=%d, sample_count=%d, usage=%x",
351 util_format_name(format), target, sample_count, usage);
352 return FALSE;
353 }
354
355 if ((usage & (PIPE_BIND_SAMPLER_VIEW |
356 PIPE_BIND_VERTEX_BUFFER)) &&
357 (fd_pipe2surface(format) != FMT_INVALID)) {
358 retval |= usage & (PIPE_BIND_SAMPLER_VIEW |
359 PIPE_BIND_VERTEX_BUFFER);
360 }
361
362 if ((usage & (PIPE_BIND_RENDER_TARGET |
363 PIPE_BIND_DISPLAY_TARGET |
364 PIPE_BIND_SCANOUT |
365 PIPE_BIND_SHARED)) &&
366 (fd_pipe2color(format) != COLORX_INVALID)) {
367 retval |= usage & (PIPE_BIND_RENDER_TARGET |
368 PIPE_BIND_DISPLAY_TARGET |
369 PIPE_BIND_SCANOUT |
370 PIPE_BIND_SHARED);
371 }
372
373 if ((usage & PIPE_BIND_DEPTH_STENCIL) &&
374 (fd_pipe2depth(format) != DEPTHX_INVALID)) {
375 retval |= PIPE_BIND_DEPTH_STENCIL;
376 }
377
378 if ((usage & PIPE_BIND_INDEX_BUFFER) &&
379 (fd_pipe2index(format) != INDEX_SIZE_INVALID)) {
380 retval |= PIPE_BIND_INDEX_BUFFER;
381 }
382
383 if (usage & PIPE_BIND_TRANSFER_READ)
384 retval |= PIPE_BIND_TRANSFER_READ;
385 if (usage & PIPE_BIND_TRANSFER_WRITE)
386 retval |= PIPE_BIND_TRANSFER_WRITE;
387
388 if (retval != usage) {
389 DBG("not supported: format=%s, target=%d, sample_count=%d, "
390 "usage=%x, retval=%x", util_format_name(format),
391 target, sample_count, usage, retval);
392 }
393
394 return retval == usage;
395 }
396
397 boolean
398 fd_screen_bo_get_handle(struct pipe_screen *pscreen,
399 struct fd_bo *bo,
400 unsigned stride,
401 struct winsys_handle *whandle)
402 {
403 whandle->stride = stride;
404
405 if (whandle->type == DRM_API_HANDLE_TYPE_SHARED) {
406 return fd_bo_get_name(bo, &whandle->handle) == 0;
407 } else if (whandle->type == DRM_API_HANDLE_TYPE_KMS) {
408 whandle->handle = fd_bo_handle(bo);
409 return TRUE;
410 } else {
411 return FALSE;
412 }
413 }
414
415 struct fd_bo *
416 fd_screen_bo_from_handle(struct pipe_screen *pscreen,
417 struct winsys_handle *whandle,
418 unsigned *out_stride)
419 {
420 struct fd_screen *screen = fd_screen(pscreen);
421 struct fd_bo *bo;
422
423 bo = fd_bo_from_name(screen->dev, whandle->handle);
424 if (!bo) {
425 DBG("ref name 0x%08x failed", whandle->handle);
426 return NULL;
427 }
428
429 *out_stride = whandle->stride;
430
431 return bo;
432 }
433
434 struct pipe_screen *
435 fd_screen_create(struct fd_device *dev)
436 {
437 struct fd_screen *screen = CALLOC_STRUCT(fd_screen);
438 struct pipe_screen *pscreen;
439 uint64_t val;
440
441 fd_mesa_debug = debug_get_option_fd_mesa_debug();
442
443 if (!screen)
444 return NULL;
445
446 DBG("");
447
448 screen->dev = dev;
449
450 // maybe this should be in context?
451 screen->pipe = fd_pipe_new(screen->dev, FD_PIPE_3D);
452
453 fd_pipe_get_param(screen->pipe, FD_GMEM_SIZE, &val);
454 screen->gmemsize_bytes = val;
455
456 fd_pipe_get_param(screen->pipe, FD_DEVICE_ID, &val);
457 screen->device_id = val;
458
459 pscreen = &screen->base;
460
461 pscreen->destroy = fd_screen_destroy;
462 pscreen->get_param = fd_screen_get_param;
463 pscreen->get_paramf = fd_screen_get_paramf;
464 pscreen->get_shader_param = fd_screen_get_shader_param;
465 pscreen->context_create = fd_context_create;
466 pscreen->is_format_supported = fd_screen_is_format_supported;
467
468 fd_resource_screen_init(pscreen);
469
470 pscreen->get_name = fd_screen_get_name;
471 pscreen->get_vendor = fd_screen_get_vendor;
472
473 pscreen->get_timestamp = fd_screen_get_timestamp;
474
475 pscreen->fence_reference = fd_screen_fence_ref;
476 pscreen->fence_signalled = fd_screen_fence_signalled;
477 pscreen->fence_finish = fd_screen_fence_finish;
478
479 util_format_s3tc_init();
480
481 return pscreen;
482 }