nir: Rename convert_to_ssa lower_regs_to_ssa
[mesa.git] / src / gallium / drivers / freedreno / ir3 / ir3_nir.c
1 /* -*- mode: C; c-file-style: "k&r"; tab-width 4; indent-tabs-mode: t; -*- */
2
3 /*
4 * Copyright (C) 2015 Rob Clark <robclark@freedesktop.org>
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
15 * Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
23 * SOFTWARE.
24 *
25 * Authors:
26 * Rob Clark <robclark@freedesktop.org>
27 */
28
29
30 #include "freedreno_util.h"
31
32 #include "ir3_nir.h"
33 #include "ir3_compiler.h"
34 #include "ir3_shader.h"
35
36 #include "nir/tgsi_to_nir.h"
37
38 static const nir_shader_compiler_options options = {
39 .lower_fpow = true,
40 .lower_fsat = true,
41 .lower_scmp = true,
42 .lower_flrp32 = true,
43 .lower_flrp64 = true,
44 .lower_ffract = true,
45 .lower_fmod32 = true,
46 .lower_fmod64 = true,
47 .lower_fdiv = true,
48 .fuse_ffma = true,
49 .native_integers = true,
50 .vertex_id_zero_based = true,
51 .lower_extract_byte = true,
52 .lower_extract_word = true,
53 };
54
55 struct nir_shader *
56 ir3_tgsi_to_nir(const struct tgsi_token *tokens)
57 {
58 return tgsi_to_nir(tokens, &options);
59 }
60
61 const nir_shader_compiler_options *
62 ir3_get_compiler_options(void)
63 {
64 return &options;
65 }
66
67 /* for given shader key, are any steps handled in nir? */
68 bool
69 ir3_key_lowers_nir(const struct ir3_shader_key *key)
70 {
71 return key->fsaturate_s | key->fsaturate_t | key->fsaturate_r |
72 key->vsaturate_s | key->vsaturate_t | key->vsaturate_r |
73 key->ucp_enables | key->color_two_side |
74 key->fclamp_color | key->vclamp_color;
75 }
76
77 #define OPT(nir, pass, ...) ({ \
78 bool this_progress = false; \
79 NIR_PASS(this_progress, nir, pass, ##__VA_ARGS__); \
80 this_progress; \
81 })
82
83 #define OPT_V(nir, pass, ...) NIR_PASS_V(nir, pass, ##__VA_ARGS__)
84
85 static void
86 ir3_optimize_loop(nir_shader *s)
87 {
88 bool progress;
89 do {
90 progress = false;
91
92 OPT_V(s, nir_lower_vars_to_ssa);
93 progress |= OPT(s, nir_lower_alu_to_scalar);
94 progress |= OPT(s, nir_lower_phis_to_scalar);
95
96 progress |= OPT(s, nir_copy_prop);
97 progress |= OPT(s, nir_opt_dce);
98 progress |= OPT(s, nir_opt_cse);
99 progress |= OPT(s, ir3_nir_lower_if_else);
100 progress |= OPT(s, nir_opt_algebraic);
101 progress |= OPT(s, nir_opt_constant_folding);
102
103 } while (progress);
104 }
105
106 struct nir_shader *
107 ir3_optimize_nir(struct ir3_shader *shader, nir_shader *s,
108 const struct ir3_shader_key *key)
109 {
110 struct nir_lower_tex_options tex_options = {
111 .lower_rect = 0,
112 };
113
114 if (key) {
115 switch (shader->type) {
116 case SHADER_FRAGMENT:
117 case SHADER_COMPUTE:
118 tex_options.saturate_s = key->fsaturate_s;
119 tex_options.saturate_t = key->fsaturate_t;
120 tex_options.saturate_r = key->fsaturate_r;
121 break;
122 case SHADER_VERTEX:
123 tex_options.saturate_s = key->vsaturate_s;
124 tex_options.saturate_t = key->vsaturate_t;
125 tex_options.saturate_r = key->vsaturate_r;
126 break;
127 }
128 }
129
130 if (shader->compiler->gpu_id >= 400) {
131 /* a4xx seems to have *no* sam.p */
132 tex_options.lower_txp = ~0; /* lower all txp */
133 } else {
134 /* a3xx just needs to avoid sam.p for 3d tex */
135 tex_options.lower_txp = (1 << GLSL_SAMPLER_DIM_3D);
136 }
137
138 if (fd_mesa_debug & FD_DBG_DISASM) {
139 debug_printf("----------------------\n");
140 nir_print_shader(s, stdout);
141 debug_printf("----------------------\n");
142 }
143
144 OPT_V(s, nir_opt_global_to_local);
145 OPT_V(s, nir_lower_regs_to_ssa);
146
147 if (key) {
148 if (s->stage == MESA_SHADER_VERTEX) {
149 OPT_V(s, nir_lower_clip_vs, key->ucp_enables);
150 if (key->vclamp_color)
151 OPT_V(s, nir_lower_clamp_color_outputs);
152 } else if (s->stage == MESA_SHADER_FRAGMENT) {
153 OPT_V(s, nir_lower_clip_fs, key->ucp_enables);
154 if (key->fclamp_color)
155 OPT_V(s, nir_lower_clamp_color_outputs);
156 }
157 if (key->color_two_side) {
158 OPT_V(s, nir_lower_two_sided_color);
159 }
160 } else {
161 /* only want to do this the first time (when key is null)
162 * and not again on any potential 2nd variant lowering pass:
163 */
164 OPT_V(s, ir3_nir_apply_trig_workarounds);
165 }
166
167 OPT_V(s, nir_lower_tex, &tex_options);
168 OPT_V(s, nir_lower_load_const_to_scalar);
169
170 ir3_optimize_loop(s);
171
172 /* do idiv lowering after first opt loop to give a chance for
173 * divide by immed power-of-two to be caught first:
174 */
175 if (OPT(s, nir_lower_idiv))
176 ir3_optimize_loop(s);
177
178 OPT_V(s, nir_remove_dead_variables, nir_var_local);
179
180 if (fd_mesa_debug & FD_DBG_DISASM) {
181 debug_printf("----------------------\n");
182 nir_print_shader(s, stdout);
183 debug_printf("----------------------\n");
184 }
185
186 nir_sweep(s);
187
188 return s;
189 }