src/gallium/drivers/i965/brw_draw_upload.c

   1 /**************************************************************************
   2  *
   3  * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
   4  * All Rights Reserved.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the
   8  * "Software"), to deal in the Software without restriction, including
   9  * without limitation the rights to use, copy, modify, merge, publish,
  10  * distribute, sub license, and/or sell copies of the Software, and to
  11  * permit persons to whom the Software is furnished to do so, subject to
  12  * the following conditions:
  13  *
  14  * The above copyright notice and this permission notice (including the
  15  * next paragraph) shall be included in all copies or substantial portions
  16  * of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  19  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  21  * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
  22  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  23  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  24  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25  *
  26  **************************************************************************/
  27
  28 #include "pipe/p_context.h"
  29 #include "util/u_inlines.h"
  30
  31 #include "util/u_upload_mgr.h"
  32 #include "util/u_math.h"
  33 #include "util/u_format.h"
  34
  35 #include "brw_draw.h"
  36 #include "brw_defines.h"
  37 #include "brw_context.h"
  38 #include "brw_state.h"
  39 #include "brw_screen.h"
  40 #include "brw_batchbuffer.h"
  41 #include "brw_debug.h"
  42
  43
  44
  45
  46 static unsigned brw_translate_surface_format( unsigned id )
  47 {
  48    switch (id) {
  49    case PIPE_FORMAT_R64_FLOAT:
  50       return BRW_SURFACEFORMAT_R64_FLOAT;
  51    case PIPE_FORMAT_R64G64_FLOAT:
  52       return BRW_SURFACEFORMAT_R64G64_FLOAT;
  53    case PIPE_FORMAT_R64G64B64_FLOAT:
  54       return BRW_SURFACEFORMAT_R64G64B64_FLOAT;
  55    case PIPE_FORMAT_R64G64B64A64_FLOAT:
  56       return BRW_SURFACEFORMAT_R64G64B64A64_FLOAT;
  57
  58    case PIPE_FORMAT_R32_FLOAT:
  59       return BRW_SURFACEFORMAT_R32_FLOAT;
  60    case PIPE_FORMAT_R32G32_FLOAT:
  61       return BRW_SURFACEFORMAT_R32G32_FLOAT;
  62    case PIPE_FORMAT_R32G32B32_FLOAT:
  63       return BRW_SURFACEFORMAT_R32G32B32_FLOAT;
  64    case PIPE_FORMAT_R32G32B32A32_FLOAT:
  65       return BRW_SURFACEFORMAT_R32G32B32A32_FLOAT;
  66
  67    case PIPE_FORMAT_R32_UNORM:
  68       return BRW_SURFACEFORMAT_R32_UNORM;
  69    case PIPE_FORMAT_R32G32_UNORM:
  70       return BRW_SURFACEFORMAT_R32G32_UNORM;
  71    case PIPE_FORMAT_R32G32B32_UNORM:
  72       return BRW_SURFACEFORMAT_R32G32B32_UNORM;
  73    case PIPE_FORMAT_R32G32B32A32_UNORM:
  74       return BRW_SURFACEFORMAT_R32G32B32A32_UNORM;
  75
  76    case PIPE_FORMAT_R32_USCALED:
  77       return BRW_SURFACEFORMAT_R32_USCALED;
  78    case PIPE_FORMAT_R32G32_USCALED:
  79       return BRW_SURFACEFORMAT_R32G32_USCALED;
  80    case PIPE_FORMAT_R32G32B32_USCALED:
  81       return BRW_SURFACEFORMAT_R32G32B32_USCALED;
  82    case PIPE_FORMAT_R32G32B32A32_USCALED:
  83       return BRW_SURFACEFORMAT_R32G32B32A32_USCALED;
  84
  85    case PIPE_FORMAT_R32_SNORM:
  86       return BRW_SURFACEFORMAT_R32_SNORM;
  87    case PIPE_FORMAT_R32G32_SNORM:
  88       return BRW_SURFACEFORMAT_R32G32_SNORM;
  89    case PIPE_FORMAT_R32G32B32_SNORM:
  90       return BRW_SURFACEFORMAT_R32G32B32_SNORM;
  91    case PIPE_FORMAT_R32G32B32A32_SNORM:
  92       return BRW_SURFACEFORMAT_R32G32B32A32_SNORM;
  93
  94    case PIPE_FORMAT_R32_SSCALED:
  95       return BRW_SURFACEFORMAT_R32_SSCALED;
  96    case PIPE_FORMAT_R32G32_SSCALED:
  97       return BRW_SURFACEFORMAT_R32G32_SSCALED;
  98    case PIPE_FORMAT_R32G32B32_SSCALED:
  99       return BRW_SURFACEFORMAT_R32G32B32_SSCALED;
 100    case PIPE_FORMAT_R32G32B32A32_SSCALED:
 101       return BRW_SURFACEFORMAT_R32G32B32A32_SSCALED;
 102
 103    case PIPE_FORMAT_R16_UNORM:
 104       return BRW_SURFACEFORMAT_R16_UNORM;
 105    case PIPE_FORMAT_R16G16_UNORM:
 106       return BRW_SURFACEFORMAT_R16G16_UNORM;
 107    case PIPE_FORMAT_R16G16B16_UNORM:
 108       return BRW_SURFACEFORMAT_R16G16B16_UNORM;
 109    case PIPE_FORMAT_R16G16B16A16_UNORM:
 110       return BRW_SURFACEFORMAT_R16G16B16A16_UNORM;
 111
 112    case PIPE_FORMAT_R16_USCALED:
 113       return BRW_SURFACEFORMAT_R16_USCALED;
 114    case PIPE_FORMAT_R16G16_USCALED:
 115       return BRW_SURFACEFORMAT_R16G16_USCALED;
 116    case PIPE_FORMAT_R16G16B16_USCALED:
 117       return BRW_SURFACEFORMAT_R16G16B16_USCALED;
 118    case PIPE_FORMAT_R16G16B16A16_USCALED:
 119       return BRW_SURFACEFORMAT_R16G16B16A16_USCALED;
 120
 121    case PIPE_FORMAT_R16_SNORM:
 122       return BRW_SURFACEFORMAT_R16_SNORM;
 123    case PIPE_FORMAT_R16G16_SNORM:
 124       return BRW_SURFACEFORMAT_R16G16_SNORM;
 125    case PIPE_FORMAT_R16G16B16_SNORM:
 126       return BRW_SURFACEFORMAT_R16G16B16_SNORM;
 127    case PIPE_FORMAT_R16G16B16A16_SNORM:
 128       return BRW_SURFACEFORMAT_R16G16B16A16_SNORM;
 129
 130    case PIPE_FORMAT_R16_SSCALED:
 131       return BRW_SURFACEFORMAT_R16_SSCALED;
 132    case PIPE_FORMAT_R16G16_SSCALED:
 133       return BRW_SURFACEFORMAT_R16G16_SSCALED;
 134    case PIPE_FORMAT_R16G16B16_SSCALED:
 135       return BRW_SURFACEFORMAT_R16G16B16_SSCALED;
 136    case PIPE_FORMAT_R16G16B16A16_SSCALED:
 137       return BRW_SURFACEFORMAT_R16G16B16A16_SSCALED;
 138
 139    case PIPE_FORMAT_R8_UNORM:
 140       return BRW_SURFACEFORMAT_R8_UNORM;
 141    case PIPE_FORMAT_R8G8_UNORM:
 142       return BRW_SURFACEFORMAT_R8G8_UNORM;
 143    case PIPE_FORMAT_R8G8B8_UNORM:
 144       return BRW_SURFACEFORMAT_R8G8B8_UNORM;
 145    case PIPE_FORMAT_R8G8B8A8_UNORM:
 146       return BRW_SURFACEFORMAT_R8G8B8A8_UNORM;
 147
 148    case PIPE_FORMAT_R8_USCALED:
 149       return BRW_SURFACEFORMAT_R8_USCALED;
 150    case PIPE_FORMAT_R8G8_USCALED:
 151       return BRW_SURFACEFORMAT_R8G8_USCALED;
 152    case PIPE_FORMAT_R8G8B8_USCALED:
 153       return BRW_SURFACEFORMAT_R8G8B8_USCALED;
 154    case PIPE_FORMAT_R8G8B8A8_USCALED:
 155       return BRW_SURFACEFORMAT_R8G8B8A8_USCALED;
 156
 157    case PIPE_FORMAT_R8_SNORM:
 158       return BRW_SURFACEFORMAT_R8_SNORM;
 159    case PIPE_FORMAT_R8G8_SNORM:
 160       return BRW_SURFACEFORMAT_R8G8_SNORM;
 161    case PIPE_FORMAT_R8G8B8_SNORM:
 162       return BRW_SURFACEFORMAT_R8G8B8_SNORM;
 163    case PIPE_FORMAT_R8G8B8A8_SNORM:
 164       return BRW_SURFACEFORMAT_R8G8B8A8_SNORM;
 165
 166    case PIPE_FORMAT_R8_SSCALED:
 167       return BRW_SURFACEFORMAT_R8_SSCALED;
 168    case PIPE_FORMAT_R8G8_SSCALED:
 169       return BRW_SURFACEFORMAT_R8G8_SSCALED;
 170    case PIPE_FORMAT_R8G8B8_SSCALED:
 171       return BRW_SURFACEFORMAT_R8G8B8_SSCALED;
 172    case PIPE_FORMAT_R8G8B8A8_SSCALED:
 173       return BRW_SURFACEFORMAT_R8G8B8A8_SSCALED;
 174
 175    default:
 176       assert(0);
 177       return 0;
 178    }
 179 }
 180
 181 static unsigned get_index_type(int type)
 182 {
 183    switch (type) {
 184    case 1: return BRW_INDEX_BYTE;
 185    case 2: return BRW_INDEX_WORD;
 186    case 4: return BRW_INDEX_DWORD;
 187    default: assert(0); return 0;
 188    }
 189 }
 190
 191
 192 static int brw_prepare_vertices(struct brw_context *brw)
 193 {
 194    unsigned int min_index = brw->curr.min_index;
 195    unsigned int max_index = brw->curr.max_index;
 196    GLuint i;
 197    int ret;
 198
 199    if (BRW_DEBUG & DEBUG_VERTS)
 200       debug_printf("%s %d..%d\n", __FUNCTION__, min_index, max_index);
 201
 202
 203    for (i = 0; i < brw->curr.num_vertex_buffers; i++) {
 204       struct pipe_vertex_buffer *vb = &brw->curr.vertex_buffer[i];
 205       struct brw_winsys_buffer *bo;
 206       struct pipe_buffer *upload_buf = NULL;
 207       unsigned offset;
 208
 209       if (BRW_DEBUG & DEBUG_VERTS)
 210          debug_printf("%s vb[%d] user:%d offset:0x%x sz:0x%x stride:0x%x\n",
 211                       __FUNCTION__, i,
 212                       brw_buffer_is_user_buffer(vb->buffer),
 213                       vb->buffer_offset,
 214                       vb->buffer->size,
 215                       vb->stride);
 216
 217       if (brw_buffer_is_user_buffer(vb->buffer)) {
 218
 219          /* XXX: simplify this.  Stop the state trackers from generating
 220           * zero-stride buffers & have them use additional constants (or
 221           * add support for >1 constant buffer) instead.
 222           */
 223          unsigned size = (vb->stride == 0 ?
 224                           vb->buffer->size - vb->buffer_offset :
 225                           MAX2(vb->buffer->size - vb->buffer_offset,
 226                                vb->stride * (max_index + 1 - min_index)));
 227
 228          ret = u_upload_buffer( brw->vb.upload_vertex,
 229                                 vb->buffer_offset + min_index * vb->stride,
 230                                 size,
 231                                 vb->buffer,
 232                                 &offset,
 233                                 &upload_buf );
 234          if (ret)
 235             return ret;
 236
 237          bo = brw_buffer(upload_buf)->bo;
 238
 239          assert(offset + size <= bo->size);
 240       }
 241       else
 242       {
 243          offset = vb->buffer_offset;
 244          bo = brw_buffer(vb->buffer)->bo;
 245       }
 246
 247       assert(offset < bo->size);
 248
 249       /* Set up post-upload info about this vertex buffer:
 250        */
 251       brw->vb.vb[i].offset = offset;
 252       brw->vb.vb[i].stride = vb->stride;
 253       brw->vb.vb[i].vertex_count = (vb->stride == 0 ?
 254                                     1 :
 255                                     (bo->size - offset) / vb->stride);
 256
 257       bo_reference( &brw->vb.vb[i].bo,  bo );
 258
 259       /* Don't need to retain this reference.  We have a reference on
 260        * the underlying winsys buffer:
 261        */
 262       pipe_buffer_reference( &upload_buf, NULL );
 263    }
 264
 265    brw->vb.nr_vb = i;
 266    brw_prepare_query_begin(brw);
 267
 268    for (i = 0; i < brw->vb.nr_vb; i++) {
 269       brw_add_validated_bo(brw, brw->vb.vb[i].bo);
 270    }
 271
 272    return 0;
 273 }
 274
 275 static int brw_emit_vertex_buffers( struct brw_context *brw )
 276 {
 277    int i;
 278
 279    /* If the VS doesn't read any inputs (calculating vertex position from
 280     * a state variable for some reason, for example), just bail.
 281     *
 282     * The stale VB state stays in place, but they don't do anything unless
 283     * a VE loads from them.
 284     */
 285    if (brw->vb.nr_vb == 0) {
 286       if (BRW_DEBUG & DEBUG_VERTS)
 287          debug_printf("%s: no active vertex buffers\n", __FUNCTION__);
 288
 289       return 0;
 290    }
 291
 292    /* Emit VB state packets.
 293     */
 294    BEGIN_BATCH(1 + brw->vb.nr_vb * 4, IGNORE_CLIPRECTS);
 295    OUT_BATCH((CMD_VERTEX_BUFFER << 16) |
 296              ((1 + brw->vb.nr_vb * 4) - 2));
 297
 298    for (i = 0; i < brw->vb.nr_vb; i++) {
 299       OUT_BATCH((i << BRW_VB0_INDEX_SHIFT) |
 300                 BRW_VB0_ACCESS_VERTEXDATA |
 301                 (brw->vb.vb[i].stride << BRW_VB0_PITCH_SHIFT));
 302       OUT_RELOC(brw->vb.vb[i].bo,
 303                 BRW_USAGE_VERTEX,
 304                 brw->vb.vb[i].offset);
 305       if (BRW_IS_IGDNG(brw)) {
 306          OUT_RELOC(brw->vb.vb[i].bo,
 307                    BRW_USAGE_VERTEX,
 308                    brw->vb.vb[i].bo->size - 1);
 309       } else
 310          OUT_BATCH(brw->vb.vb[i].stride ? brw->vb.vb[i].vertex_count : 0);
 311       OUT_BATCH(0); /* Instance data step rate */
 312    }
 313    ADVANCE_BATCH();
 314    return 0;
 315 }
 316
 317
 318
 319
 320 static int brw_emit_vertex_elements(struct brw_context *brw)
 321 {
 322    GLuint nr = brw->curr.num_vertex_elements;
 323    GLuint i;
 324
 325    brw_emit_query_begin(brw);
 326
 327    /* If the VS doesn't read any inputs (calculating vertex position from
 328     * a state variable for some reason, for example), emit a single pad
 329     * VERTEX_ELEMENT struct and bail.
 330     *
 331     * The stale VB state stays in place, but they don't do anything unless
 332     * a VE loads from them.
 333     */
 334    if (nr == 0) {
 335       BEGIN_BATCH(3, IGNORE_CLIPRECTS);
 336       OUT_BATCH((CMD_VERTEX_ELEMENT << 16) | 1);
 337       OUT_BATCH((0 << BRW_VE0_INDEX_SHIFT) |
 338                 BRW_VE0_VALID |
 339                 (BRW_SURFACEFORMAT_R32G32B32A32_FLOAT << BRW_VE0_FORMAT_SHIFT) |
 340                 (0 << BRW_VE0_SRC_OFFSET_SHIFT));
 341       OUT_BATCH((BRW_VE1_COMPONENT_STORE_0 << BRW_VE1_COMPONENT_0_SHIFT) |
 342                 (BRW_VE1_COMPONENT_STORE_0 << BRW_VE1_COMPONENT_1_SHIFT) |
 343                 (BRW_VE1_COMPONENT_STORE_0 << BRW_VE1_COMPONENT_2_SHIFT) |
 344                 (BRW_VE1_COMPONENT_STORE_1_FLT << BRW_VE1_COMPONENT_3_SHIFT));
 345       ADVANCE_BATCH();
 346       return 0;
 347    }
 348
 349    /* Now emit vertex element (VEP) state packets.
 350     *
 351     */
 352    BEGIN_BATCH(1 + nr * 2, IGNORE_CLIPRECTS);
 353    OUT_BATCH((CMD_VERTEX_ELEMENT << 16) | ((1 + nr * 2) - 2));
 354    for (i = 0; i < nr; i++) {
 355       const struct pipe_vertex_element *input = &brw->curr.vertex_element[i];
 356       unsigned nr_components = util_format_get_nr_components(input->src_format);
 357
 358       uint32_t format = brw_translate_surface_format( input->src_format );
 359       uint32_t comp0 = BRW_VE1_COMPONENT_STORE_SRC;
 360       uint32_t comp1 = BRW_VE1_COMPONENT_STORE_SRC;
 361       uint32_t comp2 = BRW_VE1_COMPONENT_STORE_SRC;
 362       uint32_t comp3 = BRW_VE1_COMPONENT_STORE_SRC;
 363
 364       switch (nr_components) {
 365       case 0: comp0 = BRW_VE1_COMPONENT_STORE_0;
 366       case 1: comp1 = BRW_VE1_COMPONENT_STORE_0;
 367       case 2: comp2 = BRW_VE1_COMPONENT_STORE_0;
 368       case 3: comp3 = BRW_VE1_COMPONENT_STORE_1_FLT;
 369          break;
 370       }
 371
 372       OUT_BATCH((input->vertex_buffer_index << BRW_VE0_INDEX_SHIFT) |
 373                 BRW_VE0_VALID |
 374                 (format << BRW_VE0_FORMAT_SHIFT) |
 375                 (input->src_offset << BRW_VE0_SRC_OFFSET_SHIFT));
 376
 377       if (BRW_IS_IGDNG(brw))
 378           OUT_BATCH((comp0 << BRW_VE1_COMPONENT_0_SHIFT) |
 379                     (comp1 << BRW_VE1_COMPONENT_1_SHIFT) |
 380                     (comp2 << BRW_VE1_COMPONENT_2_SHIFT) |
 381                     (comp3 << BRW_VE1_COMPONENT_3_SHIFT));
 382       else
 383           OUT_BATCH((comp0 << BRW_VE1_COMPONENT_0_SHIFT) |
 384                     (comp1 << BRW_VE1_COMPONENT_1_SHIFT) |
 385                     (comp2 << BRW_VE1_COMPONENT_2_SHIFT) |
 386                     (comp3 << BRW_VE1_COMPONENT_3_SHIFT) |
 387                     ((i * 4) << BRW_VE1_DST_OFFSET_SHIFT));
 388    }
 389    ADVANCE_BATCH();
 390    return 0;
 391 }
 392
 393
 394 static int brw_emit_vertices( struct brw_context *brw )
 395 {
 396    int ret;
 397
 398    ret = brw_emit_vertex_buffers( brw );
 399    if (ret)
 400       return ret;
 401
 402    ret = brw_emit_vertex_elements( brw );
 403    if (ret)
 404       return ret;
 405
 406    return 0;
 407 }
 408
 409
 410 const struct brw_tracked_state brw_vertices = {
 411    .dirty = {
 412       .mesa = (PIPE_NEW_INDEX_RANGE |
 413                PIPE_NEW_VERTEX_BUFFER),
 414       .brw = BRW_NEW_BATCH,
 415       .cache = 0,
 416    },
 417    .prepare = brw_prepare_vertices,
 418    .emit = brw_emit_vertices,
 419 };
 420
 421
 422 static int brw_prepare_indices(struct brw_context *brw)
 423 {
 424    struct pipe_buffer *index_buffer = brw->curr.index_buffer;
 425    struct pipe_buffer *upload_buf = NULL;
 426    struct brw_winsys_buffer *bo = NULL;
 427    GLuint offset;
 428    GLuint index_size;
 429    GLuint ib_size;
 430    int ret;
 431
 432    if (index_buffer == NULL)
 433       return 0;
 434
 435    if (BRW_DEBUG & DEBUG_VERTS)
 436       debug_printf("%s: index_size:%d index_buffer->size:%d\n",
 437                    __FUNCTION__,
 438                    brw->curr.index_size,
 439                    brw->curr.index_buffer->size);
 440
 441    ib_size = index_buffer->size;
 442    index_size = brw->curr.index_size;
 443
 444    /* Turn userbuffer into a proper hardware buffer?
 445     */
 446    if (brw_buffer_is_user_buffer(index_buffer)) {
 447
 448       ret = u_upload_buffer( brw->vb.upload_index,
 449                              0,
 450                              ib_size,
 451                              index_buffer,
 452                              &offset,
 453                              &upload_buf );
 454       if (ret)
 455          return ret;
 456
 457       bo = brw_buffer(upload_buf)->bo;
 458
 459       /* XXX: annotate the userbuffer with the upload information so
 460        * that successive calls don't get re-uploaded.
 461        */
 462    }
 463    else {
 464       bo = brw_buffer(index_buffer)->bo;
 465       ib_size = bo->size;
 466       offset = 0;
 467    }
 468
 469    /* Use CMD_3D_PRIM's start_vertex_offset to avoid re-uploading the
 470     * index buffer state when we're just moving the start index of our
 471     * drawing.
 472     *
 473     * In gallium this will happen in the case where successive draw
 474     * calls are made with (distinct?) userbuffers, but the upload_mgr
 475     * places the data into a single winsys buffer.
 476     *
 477     * This statechange doesn't raise any state flags and is always
 478     * just merged into the final draw packet:
 479     */
 480    if (1) {
 481       assert((offset & (index_size - 1)) == 0);
 482       brw->ib.start_vertex_offset = offset / index_size;
 483    }
 484
 485    /* These statechanges trigger a new CMD_INDEX_BUFFER packet:
 486     */
 487    if (brw->ib.bo != bo ||
 488        brw->ib.size != ib_size)
 489    {
 490       bo_reference(&brw->ib.bo, bo);
 491       brw->ib.size = ib_size;
 492       brw->state.dirty.brw |= BRW_NEW_INDEX_BUFFER;
 493    }
 494
 495    pipe_buffer_reference( &upload_buf, NULL );
 496    brw_add_validated_bo(brw, brw->ib.bo);
 497    return 0;
 498 }
 499
 500 const struct brw_tracked_state brw_indices = {
 501    .dirty = {
 502       .mesa = PIPE_NEW_INDEX_BUFFER,
 503       .brw = 0,
 504       .cache = 0,
 505    },
 506    .prepare = brw_prepare_indices,
 507 };
 508
 509 static int brw_emit_index_buffer(struct brw_context *brw)
 510 {
 511    /* Emit the indexbuffer packet:
 512     */
 513    if (brw->ib.bo)
 514    {
 515       struct brw_indexbuffer ib;
 516
 517       memset(&ib, 0, sizeof(ib));
 518
 519       ib.header.bits.opcode = CMD_INDEX_BUFFER;
 520       ib.header.bits.length = sizeof(ib)/4 - 2;
 521       ib.header.bits.index_format = get_index_type(brw->ib.size);
 522       ib.header.bits.cut_index_enable = 0;
 523
 524       BEGIN_BATCH(4, IGNORE_CLIPRECTS);
 525       OUT_BATCH( ib.header.dword );
 526       OUT_RELOC(brw->ib.bo,
 527                 BRW_USAGE_VERTEX,
 528                 brw->ib.offset);
 529       OUT_RELOC(brw->ib.bo,
 530                 BRW_USAGE_VERTEX,
 531                 brw->ib.offset + brw->ib.size - 1);
 532       OUT_BATCH( 0 );
 533       ADVANCE_BATCH();
 534    }
 535
 536    return 0;
 537 }
 538
 539 const struct brw_tracked_state brw_index_buffer = {
 540    .dirty = {
 541       .mesa = 0,
 542       .brw = BRW_NEW_BATCH | BRW_NEW_INDEX_BUFFER,
 543       .cache = 0,
 544    },
 545    .emit = brw_emit_index_buffer,
 546 };