src/gallium/drivers/i965/brw_wm_sampler_state.c

   1 /*
   2  Copyright (C) Intel Corp.  2006.  All Rights Reserved.
   3  Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
   4  develop this 3D driver.
   5
   6  Permission is hereby granted, free of charge, to any person obtaining
   7  a copy of this software and associated documentation files (the
   8  "Software"), to deal in the Software without restriction, including
   9  without limitation the rights to use, copy, modify, merge, publish,
  10  distribute, sublicense, and/or sell copies of the Software, and to
  11  permit persons to whom the Software is furnished to do so, subject to
  12  the following conditions:
  13
  14  The above copyright notice and this permission notice (including the
  15  next paragraph) shall be included in all copies or substantial
  16  portions of the Software.
  17
  18  THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  19  EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
  21  IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
  22  LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
  23  OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
  24  WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25
  26  **********************************************************************/
  27  /*
  28   * Authors:
  29   *   Keith Whitwell <keith@tungstengraphics.com>
  30   */
  31
  32 #include "util/u_math.h"
  33
  34 #include "brw_context.h"
  35 #include "brw_state.h"
  36 #include "brw_defines.h"
  37 #include "brw_screen.h"
  38
  39
  40 /* Samplers aren't strictly wm state from the hardware's perspective,
  41  * but that is the only situation in which we use them in this driver.
  42  */
  43
  44
  45
  46 static struct brw_winsys_buffer *
  47 upload_default_color( struct brw_context *brw,
  48                       const GLfloat *color )
  49 {
  50    struct brw_sampler_default_color sdc;
  51
  52    COPY_4V(sdc.color, color);
  53
  54    return brw_cache_data( &brw->cache, BRW_SAMPLER_DEFAULT_COLOR, &sdc,
  55                           NULL, 0 );
  56 }
  57
  58
  59 struct wm_sampler_key {
  60    int sampler_count;
  61    struct brw_sampler_state sampler[BRW_MAX_TEX_UNIT];
  62 };
  63
  64
  65 /** Sets up the cache key for sampler state for all texture units */
  66 static void
  67 brw_wm_sampler_populate_key(struct brw_context *brw,
  68                             struct wm_sampler_key *key)
  69 {
  70    int i;
  71
  72    memset(key, 0, sizeof(*key));
  73
  74    key->sampler_count = MIN2(brw->curr.num_textures,
  75                             brw->curr.num_samplers);
  76
  77    for (i = 0; i < key->sampler_count; i++) {
  78       const struct brw_texture *tex = brw->curr.texture[i];
  79       const struct brw_sampler *sampler = brw->curr.sampler[i];
  80       struct brw_sampler_state *entry = &key->sampler[i];
  81
  82       entry->ss0 = sampler->ss0;
  83       entry->ss1 = sampler->ss1;
  84       entry->ss2.default_color_pointer = brw->wm.sdc_bo[i]->offset >> 5; /* reloc */
  85       entry->ss3 = sampler->ss3;
  86
  87       /* Cube-maps on 965 and later must use the same wrap mode for all 3
  88        * coordinate dimensions.  Futher, only CUBE and CLAMP are valid.
  89        */
  90       if (tex->base.target == PIPE_TEXTURE_CUBE) {
  91          if (FALSE &&
  92              (sampler->ss0.min_filter != BRW_MAPFILTER_NEAREST ||
  93               sampler->ss0.mag_filter != BRW_MAPFILTER_NEAREST)) {
  94             entry->ss1.r_wrap_mode = BRW_TEXCOORDMODE_CUBE;
  95             entry->ss1.s_wrap_mode = BRW_TEXCOORDMODE_CUBE;
  96             entry->ss1.t_wrap_mode = BRW_TEXCOORDMODE_CUBE;
  97          } else {
  98             entry->ss1.r_wrap_mode = BRW_TEXCOORDMODE_CLAMP;
  99             entry->ss1.s_wrap_mode = BRW_TEXCOORDMODE_CLAMP;
 100             entry->ss1.t_wrap_mode = BRW_TEXCOORDMODE_CLAMP;
 101          }
 102       } else if (tex->base.target == PIPE_TEXTURE_1D) {
 103          /* There's a bug in 1D texture sampling - it actually pays
 104           * attention to the wrap_t value, though it should not.
 105           * Override the wrap_t value here to GL_REPEAT to keep
 106           * any nonexistent border pixels from floating in.
 107           */
 108          entry->ss1.t_wrap_mode = BRW_TEXCOORDMODE_WRAP;
 109       }
 110    }
 111 }
 112
 113
 114 static void
 115 brw_wm_sampler_update_default_colors(struct brw_context *brw)
 116 {
 117    int nr = MIN2(brw->curr.num_textures,
 118                  brw->curr.num_samplers);
 119    int i;
 120
 121    for (i = 0; i < nr; i++) {
 122       const struct brw_texture *tex = brw->curr.texture[i];
 123       const struct brw_sampler *sampler = brw->curr.sampler[i];
 124
 125       brw->sws->bo_unreference(brw->wm.sdc_bo[i]);
 126
 127       if (pf_is_depth_or_stencil(tex->base.format)) {
 128          float bordercolor[4] = {
 129             sampler->border_color[0],
 130             sampler->border_color[0],
 131             sampler->border_color[0],
 132             sampler->border_color[0]
 133          };
 134          /* GL specs that border color for depth textures is taken from the
 135           * R channel, while the hardware uses A.  Spam R into all the
 136           * channels for safety.
 137           */
 138          brw->wm.sdc_bo[i] = upload_default_color(brw, bordercolor);
 139       } else {
 140          brw->wm.sdc_bo[i] = upload_default_color(brw, sampler->border_color);
 141       }
 142    }
 143 }
 144
 145
 146
 147 /* All samplers must be uploaded in a single contiguous array.
 148  */
 149 static int upload_wm_samplers( struct brw_context *brw )
 150 {
 151    struct wm_sampler_key key;
 152    int i;
 153
 154    brw_wm_sampler_update_default_colors(brw);
 155    brw_wm_sampler_populate_key(brw, &key);
 156
 157    if (brw->wm.sampler_count != key.sampler_count) {
 158       brw->wm.sampler_count = key.sampler_count;
 159       brw->state.dirty.cache |= CACHE_NEW_SAMPLER;
 160    }
 161
 162    brw->sws->bo_unreference(brw->wm.sampler_bo);
 163    brw->wm.sampler_bo = NULL;
 164    if (brw->wm.sampler_count == 0)
 165       return 0;
 166
 167    brw->wm.sampler_bo = brw_search_cache(&brw->cache, BRW_SAMPLER,
 168                                          &key, sizeof(key),
 169                                          brw->wm.sdc_bo, key.sampler_count,
 170                                          NULL);
 171
 172    /* If we didnt find it in the cache, compute the state and put it in the
 173     * cache.
 174     */
 175    if (brw->wm.sampler_bo == NULL) {
 176       brw->wm.sampler_bo = brw_upload_cache(&brw->cache, BRW_SAMPLER,
 177                                             &key, sizeof(key),
 178                                             brw->wm.sdc_bo, key.sampler_count,
 179                                             &key.sampler, sizeof(key.sampler),
 180                                             NULL, NULL);
 181
 182       /* Emit SDC relocations */
 183       for (i = 0; i < key.sampler_count; i++) {
 184          brw->sws->bo_emit_reloc(brw->wm.sampler_bo,
 185                                  I915_GEM_DOMAIN_SAMPLER, 0,
 186                                  0,
 187                                  i * sizeof(struct brw_sampler_state) +
 188                                  offsetof(struct brw_sampler_state, ss2),
 189                                  brw->wm.sdc_bo[i]);
 190       }
 191    }
 192
 193    return 0;
 194 }
 195
 196 const struct brw_tracked_state brw_wm_samplers = {
 197    .dirty = {
 198       .mesa = PIPE_NEW_BOUND_TEXTURES | PIPE_NEW_SAMPLERS,
 199       .brw = 0,
 200       .cache = 0
 201    },
 202    .prepare = upload_wm_samplers,
 203 };
 204
 205