Merge commit 'origin/gallium-master-merge'
[mesa.git] / src / gallium / drivers / i965simple / brw_state_upload.c
1 /*
2 Copyright (C) Intel Corp. 2006. All Rights Reserved.
3 Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
4 develop this 3D driver.
5
6 Permission is hereby granted, free of charge, to any person obtaining
7 a copy of this software and associated documentation files (the
8 "Software"), to deal in the Software without restriction, including
9 without limitation the rights to use, copy, modify, merge, publish,
10 distribute, sublicense, and/or sell copies of the Software, and to
11 permit persons to whom the Software is furnished to do so, subject to
12 the following conditions:
13
14 The above copyright notice and this permission notice (including the
15 next paragraph) shall be included in all copies or substantial
16 portions of the Software.
17
18 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25
26 **********************************************************************/
27 /*
28 * Authors:
29 * Keith Whitwell <keith@tungstengraphics.com>
30 */
31
32
33 #include "brw_context.h"
34 #include "brw_state.h"
35
36 #include "util/u_memory.h"
37
38 /* This is used to initialize brw->state.atoms[]. We could use this
39 * list directly except for a single atom, brw_constant_buffer, which
40 * has a .dirty value which changes according to the parameters of the
41 * current fragment and vertex programs, and so cannot be a static
42 * value.
43 */
44 const struct brw_tracked_state *atoms[] =
45 {
46 &brw_vs_prog,
47 &brw_gs_prog,
48 &brw_clip_prog,
49 &brw_sf_prog,
50 &brw_wm_prog,
51
52 /* Once all the programs are done, we know how large urb entry
53 * sizes need to be and can decide if we need to change the urb
54 * layout.
55 */
56 &brw_curbe_offsets,
57 &brw_recalculate_urb_fence,
58
59
60 &brw_cc_vp,
61 &brw_cc_unit,
62
63 &brw_wm_surfaces, /* must do before samplers */
64 &brw_wm_samplers,
65
66 &brw_wm_unit,
67 &brw_sf_vp,
68 &brw_sf_unit,
69 &brw_vs_unit, /* always required, enabled or not */
70 &brw_clip_unit,
71 &brw_gs_unit,
72
73 /* Command packets:
74 */
75 &brw_invarient_state,
76 &brw_state_base_address,
77 &brw_pipe_control,
78
79 &brw_binding_table_pointers,
80 &brw_blend_constant_color,
81
82 &brw_drawing_rect,
83 &brw_depthbuffer,
84
85 &brw_polygon_stipple,
86 &brw_line_stipple,
87
88 &brw_psp_urb_cbs,
89
90 &brw_constant_buffer
91 };
92
93
94 void brw_init_state( struct brw_context *brw )
95 {
96 brw_init_pools(brw);
97 brw_init_caches(brw);
98
99 brw->state.dirty.brw = ~0;
100 brw->emit_state_always = 0;
101 }
102
103
104 void brw_destroy_state( struct brw_context *brw )
105 {
106 brw_destroy_caches(brw);
107 brw_destroy_batch_cache(brw);
108 brw_destroy_pools(brw);
109 }
110
111 /***********************************************************************
112 */
113
114 static boolean check_state( const struct brw_state_flags *a,
115 const struct brw_state_flags *b )
116 {
117 return ((a->brw & b->brw) ||
118 (a->cache & b->cache));
119 }
120
121 static void accumulate_state( struct brw_state_flags *a,
122 const struct brw_state_flags *b )
123 {
124 a->brw |= b->brw;
125 a->cache |= b->cache;
126 }
127
128
129 static void xor_states( struct brw_state_flags *result,
130 const struct brw_state_flags *a,
131 const struct brw_state_flags *b )
132 {
133 result->brw = a->brw ^ b->brw;
134 result->cache = a->cache ^ b->cache;
135 }
136
137
138 /***********************************************************************
139 * Emit all state:
140 */
141 void brw_validate_state( struct brw_context *brw )
142 {
143 struct brw_state_flags *state = &brw->state.dirty;
144 unsigned i;
145
146 if (brw->emit_state_always)
147 state->brw |= ~0;
148
149 if (state->cache == 0 &&
150 state->brw == 0)
151 return;
152
153 if (brw->state.dirty.brw & BRW_NEW_SCENE)
154 brw_clear_batch_cache_flush(brw);
155
156 if (BRW_DEBUG) {
157 /* Debug version which enforces various sanity checks on the
158 * state flags which are generated and checked to help ensure
159 * state atoms are ordered correctly in the list.
160 */
161 struct brw_state_flags examined, prev;
162 memset(&examined, 0, sizeof(examined));
163 prev = *state;
164
165 for (i = 0; i < Elements(atoms); i++) {
166 const struct brw_tracked_state *atom = atoms[i];
167 struct brw_state_flags generated;
168
169 assert(atom->dirty.brw ||
170 atom->dirty.cache);
171 assert(atom->update);
172
173 if (check_state(state, &atom->dirty)) {
174 atom->update( brw );
175 }
176
177 accumulate_state(&examined, &atom->dirty);
178
179 /* generated = (prev ^ state)
180 * if (examined & generated)
181 * fail;
182 */
183 xor_states(&generated, &prev, state);
184 assert(!check_state(&examined, &generated));
185 prev = *state;
186 }
187 }
188 else {
189 for (i = 0; i < Elements(atoms); i++) {
190 const struct brw_tracked_state *atom = atoms[i];
191
192 assert(atom->dirty.brw ||
193 atom->dirty.cache);
194 assert(atom->update);
195
196 if (check_state(state, &atom->dirty))
197 atom->update( brw );
198 }
199 }
200
201 memset(state, 0, sizeof(*state));
202 }