Merge commit 'origin/gallium-master-merge'
[mesa.git] / src / gallium / drivers / i965simple / brw_wm.c
1 /*
2 Copyright (C) Intel Corp. 2006. All Rights Reserved.
3 Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to
4 develop this 3D driver.
5
6 Permission is hereby granted, free of charge, to any person obtaining
7 a copy of this software and associated documentation files (the
8 "Software"), to deal in the Software without restriction, including
9 without limitation the rights to use, copy, modify, merge, publish,
10 distribute, sublicense, and/or sell copies of the Software, and to
11 permit persons to whom the Software is furnished to do so, subject to
12 the following conditions:
13
14 The above copyright notice and this permission notice (including the
15 next paragraph) shall be included in all copies or substantial
16 portions of the Software.
17
18 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19 EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
21 IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
22 LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23 OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24 WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25
26 **********************************************************************/
27 /*
28 * Authors:
29 * Keith Whitwell <keith@tungstengraphics.com>
30 */
31
32
33 #include "brw_context.h"
34 #include "brw_util.h"
35 #include "brw_wm.h"
36 #include "brw_eu.h"
37 #include "brw_state.h"
38 #include "util/u_memory.h"
39
40
41
42 static void do_wm_prog( struct brw_context *brw,
43 struct brw_fragment_program *fp,
44 struct brw_wm_prog_key *key)
45 {
46 struct brw_wm_compile *c = CALLOC_STRUCT(brw_wm_compile);
47 const unsigned *program;
48 unsigned program_size;
49
50 c->key = *key;
51 c->fp = fp;
52
53 c->delta_xy[0] = brw_null_reg();
54 c->delta_xy[1] = brw_null_reg();
55 c->pixel_xy[0] = brw_null_reg();
56 c->pixel_xy[1] = brw_null_reg();
57 c->pixel_w = brw_null_reg();
58
59
60 debug_printf("XXXXXXXX FP\n");
61
62 brw_wm_glsl_emit(c);
63
64 /* get the program
65 */
66 program = brw_get_program(&c->func, &program_size);
67
68 /*
69 */
70 brw->wm.prog_gs_offset = brw_upload_cache( &brw->cache[BRW_WM_PROG],
71 &c->key,
72 sizeof(c->key),
73 program,
74 program_size,
75 &c->prog_data,
76 &brw->wm.prog_data );
77
78 FREE(c);
79 }
80
81
82
83 static void brw_wm_populate_key( struct brw_context *brw,
84 struct brw_wm_prog_key *key )
85 {
86 /* BRW_NEW_FRAGMENT_PROGRAM */
87 struct brw_fragment_program *fp =
88 (struct brw_fragment_program *)brw->attribs.FragmentProgram;
89 unsigned lookup = 0;
90 unsigned line_aa;
91
92 memset(key, 0, sizeof(*key));
93
94 /* Build the index for table lookup
95 */
96 /* BRW_NEW_DEPTH_STENCIL */
97 if (fp->info.uses_kill ||
98 brw->attribs.DepthStencil->alpha.enabled)
99 lookup |= IZ_PS_KILL_ALPHATEST_BIT;
100
101 if (fp->info.writes_z)
102 lookup |= IZ_PS_COMPUTES_DEPTH_BIT;
103
104 if (brw->attribs.DepthStencil->depth.enabled)
105 lookup |= IZ_DEPTH_TEST_ENABLE_BIT;
106
107 if (brw->attribs.DepthStencil->depth.enabled &&
108 brw->attribs.DepthStencil->depth.writemask) /* ?? */
109 lookup |= IZ_DEPTH_WRITE_ENABLE_BIT;
110
111 if (brw->attribs.DepthStencil->stencil[0].enabled) {
112 lookup |= IZ_STENCIL_TEST_ENABLE_BIT;
113
114 if (brw->attribs.DepthStencil->stencil[0].writemask ||
115 brw->attribs.DepthStencil->stencil[1].writemask)
116 lookup |= IZ_STENCIL_WRITE_ENABLE_BIT;
117 }
118
119 /* XXX: when should this be disabled?
120 */
121 if (1)
122 lookup |= IZ_EARLY_DEPTH_TEST_BIT;
123
124
125 line_aa = AA_NEVER;
126
127 /* _NEW_LINE, _NEW_POLYGON, BRW_NEW_REDUCED_PRIMITIVE */
128 if (brw->attribs.Raster->line_smooth) {
129 if (brw->reduced_primitive == PIPE_PRIM_LINES) {
130 line_aa = AA_ALWAYS;
131 }
132 else if (brw->reduced_primitive == PIPE_PRIM_TRIANGLES) {
133 if (brw->attribs.Raster->fill_ccw == PIPE_POLYGON_MODE_LINE) {
134 line_aa = AA_SOMETIMES;
135
136 if (brw->attribs.Raster->fill_cw == PIPE_POLYGON_MODE_LINE ||
137 (brw->attribs.Raster->cull_mode == PIPE_WINDING_CW))
138 line_aa = AA_ALWAYS;
139 }
140 else if (brw->attribs.Raster->fill_cw == PIPE_POLYGON_MODE_LINE) {
141 line_aa = AA_SOMETIMES;
142
143 if (brw->attribs.Raster->cull_mode == PIPE_WINDING_CCW)
144 line_aa = AA_ALWAYS;
145 }
146 }
147 }
148
149 brw_wm_lookup_iz(line_aa,
150 lookup,
151 key);
152
153
154 #if 0
155 /* BRW_NEW_SAMPLER
156 *
157 * Not doing any of this at the moment:
158 */
159 for (i = 0; i < BRW_MAX_TEX_UNIT; i++) {
160 const struct pipe_sampler_state *unit = brw->attribs.Samplers[i];
161
162 if (unit) {
163
164 if (unit->compare_mode == PIPE_TEX_COMPARE_R_TO_TEXTURE) {
165 key->shadowtex_mask |= 1<<i;
166 }
167 if (t->Image[0][t->BaseLevel]->InternalFormat == GL_YCBCR_MESA)
168 key->yuvtex_mask |= 1<<i;
169 }
170 }
171 #endif
172
173
174 /* Extra info:
175 */
176 key->program_string_id = fp->id;
177
178 }
179
180
181 static void brw_upload_wm_prog( struct brw_context *brw )
182 {
183 struct brw_wm_prog_key key;
184 struct brw_fragment_program *fp = (struct brw_fragment_program *)
185 brw->attribs.FragmentProgram;
186
187 brw_wm_populate_key(brw, &key);
188
189 /* Make an early check for the key.
190 */
191 if (brw_search_cache(&brw->cache[BRW_WM_PROG],
192 &key, sizeof(key),
193 &brw->wm.prog_data,
194 &brw->wm.prog_gs_offset))
195 return;
196
197 do_wm_prog(brw, fp, &key);
198 }
199
200
201 const struct brw_tracked_state brw_wm_prog = {
202 .dirty = {
203 .brw = (BRW_NEW_FS |
204 BRW_NEW_REDUCED_PRIMITIVE),
205 .cache = 0
206 },
207 .update = brw_upload_wm_prog
208 };
209