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iris: limit gen8 to 8 samples
[mesa.git] / src / gallium / drivers / iris / iris_formats.c
1 /*
2 * Copyright © 2017 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included
12 * in all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
19 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
20 * DEALINGS IN THE SOFTWARE.
21 */
22
23 /**
24 * @file iris_formats.c
25 *
26 * Converts Gallium formats (PIPE_FORMAT_*) to hardware ones (ISL_FORMAT_*).
27 * Provides information about which formats support what features.
28 */
29
30 #include "util/bitscan.h"
31 #include "util/macros.h"
32 #include "util/u_format.h"
33
34 #include "iris_resource.h"
35 #include "iris_screen.h"
36
37 static enum isl_format
38 iris_isl_format_for_pipe_format(enum pipe_format pf)
39 {
40 static const enum isl_format table[PIPE_FORMAT_COUNT] = {
41 [0 ... PIPE_FORMAT_COUNT-1] = ISL_FORMAT_UNSUPPORTED,
42
43 [PIPE_FORMAT_B8G8R8A8_UNORM] = ISL_FORMAT_B8G8R8A8_UNORM,
44 [PIPE_FORMAT_B8G8R8X8_UNORM] = ISL_FORMAT_B8G8R8X8_UNORM,
45 [PIPE_FORMAT_B5G5R5A1_UNORM] = ISL_FORMAT_B5G5R5A1_UNORM,
46 [PIPE_FORMAT_B4G4R4A4_UNORM] = ISL_FORMAT_B4G4R4A4_UNORM,
47 [PIPE_FORMAT_B5G6R5_UNORM] = ISL_FORMAT_B5G6R5_UNORM,
48 [PIPE_FORMAT_R10G10B10A2_UNORM] = ISL_FORMAT_R10G10B10A2_UNORM,
49
50 [PIPE_FORMAT_Z16_UNORM] = ISL_FORMAT_R16_UNORM,
51 [PIPE_FORMAT_Z32_UNORM] = ISL_FORMAT_R32_UNORM,
52 [PIPE_FORMAT_Z32_FLOAT] = ISL_FORMAT_R32_FLOAT,
53
54 /* We translate the combined depth/stencil formats to depth only here */
55 [PIPE_FORMAT_Z24_UNORM_S8_UINT] = ISL_FORMAT_R24_UNORM_X8_TYPELESS,
56 [PIPE_FORMAT_Z24X8_UNORM] = ISL_FORMAT_R24_UNORM_X8_TYPELESS,
57 [PIPE_FORMAT_Z32_FLOAT_S8X24_UINT] = ISL_FORMAT_R32_FLOAT,
58
59 [PIPE_FORMAT_S8_UINT] = ISL_FORMAT_R8_UINT,
60 [PIPE_FORMAT_X24S8_UINT] = ISL_FORMAT_R8_UINT,
61 [PIPE_FORMAT_X32_S8X24_UINT] = ISL_FORMAT_R8_UINT,
62
63 [PIPE_FORMAT_R64_FLOAT] = ISL_FORMAT_R64_FLOAT,
64 [PIPE_FORMAT_R64G64_FLOAT] = ISL_FORMAT_R64G64_FLOAT,
65 [PIPE_FORMAT_R64G64B64_FLOAT] = ISL_FORMAT_R64G64B64_FLOAT,
66 [PIPE_FORMAT_R64G64B64A64_FLOAT] = ISL_FORMAT_R64G64B64A64_FLOAT,
67 [PIPE_FORMAT_R32_FLOAT] = ISL_FORMAT_R32_FLOAT,
68 [PIPE_FORMAT_R32G32_FLOAT] = ISL_FORMAT_R32G32_FLOAT,
69 [PIPE_FORMAT_R32G32B32_FLOAT] = ISL_FORMAT_R32G32B32_FLOAT,
70 [PIPE_FORMAT_R32G32B32A32_FLOAT] = ISL_FORMAT_R32G32B32A32_FLOAT,
71 [PIPE_FORMAT_R32_UNORM] = ISL_FORMAT_R32_UNORM,
72 [PIPE_FORMAT_R32G32_UNORM] = ISL_FORMAT_R32G32_UNORM,
73 [PIPE_FORMAT_R32G32B32_UNORM] = ISL_FORMAT_R32G32B32_UNORM,
74 [PIPE_FORMAT_R32G32B32A32_UNORM] = ISL_FORMAT_R32G32B32A32_UNORM,
75 [PIPE_FORMAT_R32_USCALED] = ISL_FORMAT_R32_USCALED,
76 [PIPE_FORMAT_R32G32_USCALED] = ISL_FORMAT_R32G32_USCALED,
77 [PIPE_FORMAT_R32G32B32_USCALED] = ISL_FORMAT_R32G32B32_USCALED,
78 [PIPE_FORMAT_R32G32B32A32_USCALED] = ISL_FORMAT_R32G32B32A32_USCALED,
79 [PIPE_FORMAT_R32_SNORM] = ISL_FORMAT_R32_SNORM,
80 [PIPE_FORMAT_R32G32_SNORM] = ISL_FORMAT_R32G32_SNORM,
81 [PIPE_FORMAT_R32G32B32_SNORM] = ISL_FORMAT_R32G32B32_SNORM,
82 [PIPE_FORMAT_R32G32B32A32_SNORM] = ISL_FORMAT_R32G32B32A32_SNORM,
83 [PIPE_FORMAT_R32_SSCALED] = ISL_FORMAT_R32_SSCALED,
84 [PIPE_FORMAT_R32G32_SSCALED] = ISL_FORMAT_R32G32_SSCALED,
85 [PIPE_FORMAT_R32G32B32_SSCALED] = ISL_FORMAT_R32G32B32_SSCALED,
86 [PIPE_FORMAT_R32G32B32A32_SSCALED] = ISL_FORMAT_R32G32B32A32_SSCALED,
87 [PIPE_FORMAT_R16_UNORM] = ISL_FORMAT_R16_UNORM,
88 [PIPE_FORMAT_R16G16_UNORM] = ISL_FORMAT_R16G16_UNORM,
89 [PIPE_FORMAT_R16G16B16_UNORM] = ISL_FORMAT_R16G16B16_UNORM,
90 [PIPE_FORMAT_R16G16B16A16_UNORM] = ISL_FORMAT_R16G16B16A16_UNORM,
91 [PIPE_FORMAT_R16_USCALED] = ISL_FORMAT_R16_USCALED,
92 [PIPE_FORMAT_R16G16_USCALED] = ISL_FORMAT_R16G16_USCALED,
93 [PIPE_FORMAT_R16G16B16_USCALED] = ISL_FORMAT_R16G16B16_USCALED,
94 [PIPE_FORMAT_R16G16B16A16_USCALED] = ISL_FORMAT_R16G16B16A16_USCALED,
95 [PIPE_FORMAT_R16_SNORM] = ISL_FORMAT_R16_SNORM,
96 [PIPE_FORMAT_R16G16_SNORM] = ISL_FORMAT_R16G16_SNORM,
97 [PIPE_FORMAT_R16G16B16_SNORM] = ISL_FORMAT_R16G16B16_SNORM,
98 [PIPE_FORMAT_R16G16B16A16_SNORM] = ISL_FORMAT_R16G16B16A16_SNORM,
99 [PIPE_FORMAT_R16_SSCALED] = ISL_FORMAT_R16_SSCALED,
100 [PIPE_FORMAT_R16G16_SSCALED] = ISL_FORMAT_R16G16_SSCALED,
101 [PIPE_FORMAT_R16G16B16_SSCALED] = ISL_FORMAT_R16G16B16_SSCALED,
102 [PIPE_FORMAT_R16G16B16A16_SSCALED] = ISL_FORMAT_R16G16B16A16_SSCALED,
103 [PIPE_FORMAT_R8_UNORM] = ISL_FORMAT_R8_UNORM,
104 [PIPE_FORMAT_R8G8_UNORM] = ISL_FORMAT_R8G8_UNORM,
105 [PIPE_FORMAT_R8G8B8_UNORM] = ISL_FORMAT_R8G8B8_UNORM,
106 [PIPE_FORMAT_R8G8B8A8_UNORM] = ISL_FORMAT_R8G8B8A8_UNORM,
107 [PIPE_FORMAT_R8_USCALED] = ISL_FORMAT_R8_USCALED,
108 [PIPE_FORMAT_R8G8_USCALED] = ISL_FORMAT_R8G8_USCALED,
109 [PIPE_FORMAT_R8G8B8_USCALED] = ISL_FORMAT_R8G8B8_USCALED,
110 [PIPE_FORMAT_R8G8B8A8_USCALED] = ISL_FORMAT_R8G8B8A8_USCALED,
111 [PIPE_FORMAT_R8_SNORM] = ISL_FORMAT_R8_SNORM,
112 [PIPE_FORMAT_R8G8_SNORM] = ISL_FORMAT_R8G8_SNORM,
113 [PIPE_FORMAT_R8G8B8_SNORM] = ISL_FORMAT_R8G8B8_SNORM,
114 [PIPE_FORMAT_R8G8B8A8_SNORM] = ISL_FORMAT_R8G8B8A8_SNORM,
115 [PIPE_FORMAT_R8_SSCALED] = ISL_FORMAT_R8_SSCALED,
116 [PIPE_FORMAT_R8G8_SSCALED] = ISL_FORMAT_R8G8_SSCALED,
117 [PIPE_FORMAT_R8G8B8_SSCALED] = ISL_FORMAT_R8G8B8_SSCALED,
118 [PIPE_FORMAT_R8G8B8A8_SSCALED] = ISL_FORMAT_R8G8B8A8_SSCALED,
119 [PIPE_FORMAT_R32_FIXED] = ISL_FORMAT_R32_SFIXED,
120 [PIPE_FORMAT_R32G32_FIXED] = ISL_FORMAT_R32G32_SFIXED,
121 [PIPE_FORMAT_R32G32B32_FIXED] = ISL_FORMAT_R32G32B32_SFIXED,
122 [PIPE_FORMAT_R32G32B32A32_FIXED] = ISL_FORMAT_R32G32B32A32_SFIXED,
123 [PIPE_FORMAT_R16_FLOAT] = ISL_FORMAT_R16_FLOAT,
124 [PIPE_FORMAT_R16G16_FLOAT] = ISL_FORMAT_R16G16_FLOAT,
125 [PIPE_FORMAT_R16G16B16_FLOAT] = ISL_FORMAT_R16G16B16_FLOAT,
126 [PIPE_FORMAT_R16G16B16A16_FLOAT] = ISL_FORMAT_R16G16B16A16_FLOAT,
127
128 [PIPE_FORMAT_R8G8B8_SRGB] = ISL_FORMAT_R8G8B8_UNORM_SRGB,
129 [PIPE_FORMAT_B8G8R8A8_SRGB] = ISL_FORMAT_B8G8R8A8_UNORM_SRGB,
130 [PIPE_FORMAT_B8G8R8X8_SRGB] = ISL_FORMAT_B8G8R8X8_UNORM_SRGB,
131 [PIPE_FORMAT_R8G8B8A8_SRGB] = ISL_FORMAT_R8G8B8A8_UNORM_SRGB,
132
133 [PIPE_FORMAT_DXT1_RGB] = ISL_FORMAT_BC1_UNORM,
134 [PIPE_FORMAT_DXT1_RGBA] = ISL_FORMAT_BC1_UNORM,
135 [PIPE_FORMAT_DXT3_RGBA] = ISL_FORMAT_BC2_UNORM,
136 [PIPE_FORMAT_DXT5_RGBA] = ISL_FORMAT_BC3_UNORM,
137
138 [PIPE_FORMAT_DXT1_SRGB] = ISL_FORMAT_BC1_UNORM_SRGB,
139 [PIPE_FORMAT_DXT1_SRGBA] = ISL_FORMAT_BC1_UNORM_SRGB,
140 [PIPE_FORMAT_DXT3_SRGBA] = ISL_FORMAT_BC2_UNORM_SRGB,
141 [PIPE_FORMAT_DXT5_SRGBA] = ISL_FORMAT_BC3_UNORM_SRGB,
142
143 [PIPE_FORMAT_RGTC1_UNORM] = ISL_FORMAT_BC4_UNORM,
144 [PIPE_FORMAT_RGTC1_SNORM] = ISL_FORMAT_BC4_SNORM,
145 [PIPE_FORMAT_RGTC2_UNORM] = ISL_FORMAT_BC5_UNORM,
146 [PIPE_FORMAT_RGTC2_SNORM] = ISL_FORMAT_BC5_SNORM,
147
148 [PIPE_FORMAT_R10G10B10A2_USCALED] = ISL_FORMAT_R10G10B10A2_USCALED,
149 [PIPE_FORMAT_R11G11B10_FLOAT] = ISL_FORMAT_R11G11B10_FLOAT,
150 [PIPE_FORMAT_R9G9B9E5_FLOAT] = ISL_FORMAT_R9G9B9E5_SHAREDEXP,
151 [PIPE_FORMAT_R1_UNORM] = ISL_FORMAT_R1_UNORM,
152 [PIPE_FORMAT_R10G10B10X2_USCALED] = ISL_FORMAT_R10G10B10X2_USCALED,
153 [PIPE_FORMAT_B10G10R10A2_UNORM] = ISL_FORMAT_B10G10R10A2_UNORM,
154 [PIPE_FORMAT_R8G8B8X8_UNORM] = ISL_FORMAT_R8G8B8X8_UNORM,
155
156 #if 0
157 /* Leave these disabled for now, we'd need border color hacks and
158 * we don't currently have the surface format in that code...
159 */
160 //[PIPE_FORMAT_A8_UINT] = ISL_FORMAT_A8_UINT,
161 //[PIPE_FORMAT_A8_SINT] = ISL_FORMAT_A8_SINT,
162 //[PIPE_FORMAT_A8_SNORM] = ISL_FORMAT_A8_SNORM,
163 //[PIPE_FORMAT_A16_UINT] = ISL_FORMAT_A16_UINT,
164 //[PIPE_FORMAT_A16_SINT] = ISL_FORMAT_A16_SINT,
165 //[PIPE_FORMAT_A16_SNORM] = ISL_FORMAT_A16_SNORM,
166 [PIPE_FORMAT_A16_FLOAT] = ISL_FORMAT_A16_FLOAT,
167 //[PIPE_FORMAT_A32_UINT] = ISL_FORMAT_A32_UINT,
168 //[PIPE_FORMAT_A32_SINT] = ISL_FORMAT_A32_SINT,
169 [PIPE_FORMAT_A32_FLOAT] = ISL_FORMAT_A32_FLOAT,
170 #endif
171 [PIPE_FORMAT_A8_UNORM] = ISL_FORMAT_A8_UNORM,
172 [PIPE_FORMAT_A16_UNORM] = ISL_FORMAT_A16_UNORM,
173
174 /* Just use red formats for these - they're actually renderable,
175 * and faster to sample than the legacy L/I formats.
176 */
177 [PIPE_FORMAT_I8_UNORM] = ISL_FORMAT_R8_UNORM,
178 [PIPE_FORMAT_I8_UINT] = ISL_FORMAT_R8_UINT,
179 [PIPE_FORMAT_I8_SINT] = ISL_FORMAT_R8_SINT,
180 [PIPE_FORMAT_I8_SNORM] = ISL_FORMAT_R8_SNORM,
181 [PIPE_FORMAT_I16_UINT] = ISL_FORMAT_R16_UINT,
182 [PIPE_FORMAT_I16_UNORM] = ISL_FORMAT_R16_UNORM,
183 [PIPE_FORMAT_I16_SINT] = ISL_FORMAT_R16_SINT,
184 [PIPE_FORMAT_I16_SNORM] = ISL_FORMAT_R16_SNORM,
185 [PIPE_FORMAT_I16_FLOAT] = ISL_FORMAT_R16_FLOAT,
186 [PIPE_FORMAT_I32_UINT] = ISL_FORMAT_R32_UINT,
187 [PIPE_FORMAT_I32_SINT] = ISL_FORMAT_R32_SINT,
188 [PIPE_FORMAT_I32_FLOAT] = ISL_FORMAT_R32_FLOAT,
189
190 [PIPE_FORMAT_L8_UINT] = ISL_FORMAT_R8_UINT,
191 [PIPE_FORMAT_L8_UNORM] = ISL_FORMAT_R8_UNORM,
192 [PIPE_FORMAT_L8_SINT] = ISL_FORMAT_R8_SINT,
193 [PIPE_FORMAT_L8_SNORM] = ISL_FORMAT_R8_SNORM,
194 [PIPE_FORMAT_L16_UINT] = ISL_FORMAT_R16_UINT,
195 [PIPE_FORMAT_L16_UNORM] = ISL_FORMAT_R16_UNORM,
196 [PIPE_FORMAT_L16_SINT] = ISL_FORMAT_R16_SINT,
197 [PIPE_FORMAT_L16_SNORM] = ISL_FORMAT_R16_SNORM,
198 [PIPE_FORMAT_L16_FLOAT] = ISL_FORMAT_R16_FLOAT,
199 [PIPE_FORMAT_L32_UINT] = ISL_FORMAT_R32_UINT,
200 [PIPE_FORMAT_L32_SINT] = ISL_FORMAT_R32_SINT,
201 [PIPE_FORMAT_L32_FLOAT] = ISL_FORMAT_R32_FLOAT,
202
203 /* Sadly, there is no R8_SRGB format so we have to use luminance. */
204 [PIPE_FORMAT_L8_SRGB] = ISL_FORMAT_L8_UNORM_SRGB,
205
206 #if 0
207 /* Just fake these with RGBA at a higher level for now */
208 [PIPE_FORMAT_L8A8_UINT] = ISL_FORMAT_L8A8_UINT,
209 [PIPE_FORMAT_L8A8_UNORM] = ISL_FORMAT_L8A8_UNORM,
210 [PIPE_FORMAT_L8A8_SINT] = ISL_FORMAT_L8A8_SINT,
211 //[PIPE_FORMAT_L8A8_SNORM] = ISL_FORMAT_L8A8_SNORM,
212 //[PIPE_FORMAT_L16A16_UINT] = ISL_FORMAT_L16A16_UINT,
213 [PIPE_FORMAT_L16A16_UNORM] = ISL_FORMAT_L16A16_UNORM,
214 //[PIPE_FORMAT_L16A16_SINT] = ISL_FORMAT_L16A16_SINT,
215 //[PIPE_FORMAT_L16A16_SNORM] = ISL_FORMAT_L16A16_SNORM,
216 [PIPE_FORMAT_L16A16_FLOAT] = ISL_FORMAT_L16A16_FLOAT,
217 //[PIPE_FORMAT_L32A32_UINT] = ISL_FORMAT_L32A32_UINT,
218 //[PIPE_FORMAT_L32A32_SINT] = ISL_FORMAT_L32A32_SINT,
219 [PIPE_FORMAT_L32A32_FLOAT] = ISL_FORMAT_L32A32_FLOAT,
220
221 [PIPE_FORMAT_L8A8_SRGB] = ISL_FORMAT_L8A8_UNORM_SRGB,
222 #endif
223
224 [PIPE_FORMAT_R10G10B10A2_SSCALED] = ISL_FORMAT_R10G10B10A2_SSCALED,
225 [PIPE_FORMAT_R10G10B10A2_SNORM] = ISL_FORMAT_R10G10B10A2_SNORM,
226
227 [PIPE_FORMAT_B10G10R10A2_USCALED] = ISL_FORMAT_B10G10R10A2_USCALED,
228 [PIPE_FORMAT_B10G10R10A2_SSCALED] = ISL_FORMAT_B10G10R10A2_SSCALED,
229 [PIPE_FORMAT_B10G10R10A2_SNORM] = ISL_FORMAT_B10G10R10A2_SNORM,
230
231 [PIPE_FORMAT_R8_UINT] = ISL_FORMAT_R8_UINT,
232 [PIPE_FORMAT_R8G8_UINT] = ISL_FORMAT_R8G8_UINT,
233 [PIPE_FORMAT_R8G8B8_UINT] = ISL_FORMAT_R8G8B8_UINT,
234 [PIPE_FORMAT_R8G8B8A8_UINT] = ISL_FORMAT_R8G8B8A8_UINT,
235
236 [PIPE_FORMAT_R8_SINT] = ISL_FORMAT_R8_SINT,
237 [PIPE_FORMAT_R8G8_SINT] = ISL_FORMAT_R8G8_SINT,
238 [PIPE_FORMAT_R8G8B8_SINT] = ISL_FORMAT_R8G8B8_SINT,
239 [PIPE_FORMAT_R8G8B8A8_SINT] = ISL_FORMAT_R8G8B8A8_SINT,
240
241 [PIPE_FORMAT_R16_UINT] = ISL_FORMAT_R16_UINT,
242 [PIPE_FORMAT_R16G16_UINT] = ISL_FORMAT_R16G16_UINT,
243 [PIPE_FORMAT_R16G16B16_UINT] = ISL_FORMAT_R16G16B16_UINT,
244 [PIPE_FORMAT_R16G16B16A16_UINT] = ISL_FORMAT_R16G16B16A16_UINT,
245
246 [PIPE_FORMAT_R16_SINT] = ISL_FORMAT_R16_SINT,
247 [PIPE_FORMAT_R16G16_SINT] = ISL_FORMAT_R16G16_SINT,
248 [PIPE_FORMAT_R16G16B16_SINT] = ISL_FORMAT_R16G16B16_SINT,
249 [PIPE_FORMAT_R16G16B16A16_SINT] = ISL_FORMAT_R16G16B16A16_SINT,
250
251 [PIPE_FORMAT_R32_UINT] = ISL_FORMAT_R32_UINT,
252 [PIPE_FORMAT_R32G32_UINT] = ISL_FORMAT_R32G32_UINT,
253 [PIPE_FORMAT_R32G32B32_UINT] = ISL_FORMAT_R32G32B32_UINT,
254 [PIPE_FORMAT_R32G32B32A32_UINT] = ISL_FORMAT_R32G32B32A32_UINT,
255
256 [PIPE_FORMAT_R32_SINT] = ISL_FORMAT_R32_SINT,
257 [PIPE_FORMAT_R32G32_SINT] = ISL_FORMAT_R32G32_SINT,
258 [PIPE_FORMAT_R32G32B32_SINT] = ISL_FORMAT_R32G32B32_SINT,
259 [PIPE_FORMAT_R32G32B32A32_SINT] = ISL_FORMAT_R32G32B32A32_SINT,
260
261 [PIPE_FORMAT_B10G10R10A2_UINT] = ISL_FORMAT_B10G10R10A2_UINT,
262
263 [PIPE_FORMAT_ETC1_RGB8] = ISL_FORMAT_ETC1_RGB8,
264
265 [PIPE_FORMAT_R8G8B8X8_SRGB] = ISL_FORMAT_R8G8B8X8_UNORM_SRGB,
266 [PIPE_FORMAT_B10G10R10X2_UNORM] = ISL_FORMAT_B10G10R10X2_UNORM,
267 [PIPE_FORMAT_R16G16B16X16_UNORM] = ISL_FORMAT_R16G16B16X16_UNORM,
268 [PIPE_FORMAT_R16G16B16X16_FLOAT] = ISL_FORMAT_R16G16B16X16_FLOAT,
269 [PIPE_FORMAT_R32G32B32X32_FLOAT] = ISL_FORMAT_R32G32B32X32_FLOAT,
270
271 [PIPE_FORMAT_R10G10B10A2_UINT] = ISL_FORMAT_R10G10B10A2_UINT,
272
273 [PIPE_FORMAT_B5G6R5_SRGB] = ISL_FORMAT_B5G6R5_UNORM_SRGB,
274
275 [PIPE_FORMAT_BPTC_RGBA_UNORM] = ISL_FORMAT_BC7_UNORM,
276 [PIPE_FORMAT_BPTC_SRGBA] = ISL_FORMAT_BC7_UNORM_SRGB,
277 [PIPE_FORMAT_BPTC_RGB_FLOAT] = ISL_FORMAT_BC6H_SF16,
278 [PIPE_FORMAT_BPTC_RGB_UFLOAT] = ISL_FORMAT_BC6H_UF16,
279
280 [PIPE_FORMAT_ETC2_RGB8] = ISL_FORMAT_ETC2_RGB8,
281 [PIPE_FORMAT_ETC2_SRGB8] = ISL_FORMAT_ETC2_SRGB8,
282 [PIPE_FORMAT_ETC2_RGB8A1] = ISL_FORMAT_ETC2_RGB8_PTA,
283 [PIPE_FORMAT_ETC2_SRGB8A1] = ISL_FORMAT_ETC2_SRGB8_PTA,
284 [PIPE_FORMAT_ETC2_RGBA8] = ISL_FORMAT_ETC2_EAC_RGBA8,
285 [PIPE_FORMAT_ETC2_SRGBA8] = ISL_FORMAT_ETC2_EAC_SRGB8_A8,
286 [PIPE_FORMAT_ETC2_R11_UNORM] = ISL_FORMAT_EAC_R11,
287 [PIPE_FORMAT_ETC2_R11_SNORM] = ISL_FORMAT_EAC_SIGNED_R11,
288 [PIPE_FORMAT_ETC2_RG11_UNORM] = ISL_FORMAT_EAC_RG11,
289 [PIPE_FORMAT_ETC2_RG11_SNORM] = ISL_FORMAT_EAC_SIGNED_RG11,
290
291
292 [PIPE_FORMAT_ASTC_4x4] = ISL_FORMAT_ASTC_LDR_2D_4X4_FLT16,
293 [PIPE_FORMAT_ASTC_5x4] = ISL_FORMAT_ASTC_LDR_2D_5X4_FLT16,
294 [PIPE_FORMAT_ASTC_5x5] = ISL_FORMAT_ASTC_LDR_2D_5X5_FLT16,
295 [PIPE_FORMAT_ASTC_6x5] = ISL_FORMAT_ASTC_LDR_2D_6X5_FLT16,
296 [PIPE_FORMAT_ASTC_6x6] = ISL_FORMAT_ASTC_LDR_2D_6X6_FLT16,
297 [PIPE_FORMAT_ASTC_8x5] = ISL_FORMAT_ASTC_LDR_2D_8X5_FLT16,
298 [PIPE_FORMAT_ASTC_8x6] = ISL_FORMAT_ASTC_LDR_2D_8X6_FLT16,
299 [PIPE_FORMAT_ASTC_8x8] = ISL_FORMAT_ASTC_LDR_2D_8X8_FLT16,
300 [PIPE_FORMAT_ASTC_10x5] = ISL_FORMAT_ASTC_LDR_2D_10X5_FLT16,
301 [PIPE_FORMAT_ASTC_10x6] = ISL_FORMAT_ASTC_LDR_2D_10X6_FLT16,
302 [PIPE_FORMAT_ASTC_10x8] = ISL_FORMAT_ASTC_LDR_2D_10X8_FLT16,
303 [PIPE_FORMAT_ASTC_10x10] = ISL_FORMAT_ASTC_LDR_2D_10X10_FLT16,
304 [PIPE_FORMAT_ASTC_12x10] = ISL_FORMAT_ASTC_LDR_2D_12X10_FLT16,
305 [PIPE_FORMAT_ASTC_12x12] = ISL_FORMAT_ASTC_LDR_2D_12X12_FLT16,
306
307 [PIPE_FORMAT_ASTC_4x4_SRGB] = ISL_FORMAT_ASTC_LDR_2D_4X4_U8SRGB,
308 [PIPE_FORMAT_ASTC_5x4_SRGB] = ISL_FORMAT_ASTC_LDR_2D_5X4_U8SRGB,
309 [PIPE_FORMAT_ASTC_5x5_SRGB] = ISL_FORMAT_ASTC_LDR_2D_5X5_U8SRGB,
310 [PIPE_FORMAT_ASTC_6x5_SRGB] = ISL_FORMAT_ASTC_LDR_2D_6X5_U8SRGB,
311 [PIPE_FORMAT_ASTC_6x6_SRGB] = ISL_FORMAT_ASTC_LDR_2D_6X6_U8SRGB,
312 [PIPE_FORMAT_ASTC_8x5_SRGB] = ISL_FORMAT_ASTC_LDR_2D_8X5_U8SRGB,
313 [PIPE_FORMAT_ASTC_8x6_SRGB] = ISL_FORMAT_ASTC_LDR_2D_8X6_U8SRGB,
314 [PIPE_FORMAT_ASTC_8x8_SRGB] = ISL_FORMAT_ASTC_LDR_2D_8X8_U8SRGB,
315 [PIPE_FORMAT_ASTC_10x5_SRGB] = ISL_FORMAT_ASTC_LDR_2D_10X5_U8SRGB,
316 [PIPE_FORMAT_ASTC_10x6_SRGB] = ISL_FORMAT_ASTC_LDR_2D_10X6_U8SRGB,
317 [PIPE_FORMAT_ASTC_10x8_SRGB] = ISL_FORMAT_ASTC_LDR_2D_10X8_U8SRGB,
318 [PIPE_FORMAT_ASTC_10x10_SRGB] = ISL_FORMAT_ASTC_LDR_2D_10X10_U8SRGB,
319 [PIPE_FORMAT_ASTC_12x10_SRGB] = ISL_FORMAT_ASTC_LDR_2D_12X10_U8SRGB,
320 [PIPE_FORMAT_ASTC_12x12_SRGB] = ISL_FORMAT_ASTC_LDR_2D_12X12_U8SRGB,
321
322 [PIPE_FORMAT_A1B5G5R5_UNORM] = ISL_FORMAT_A1B5G5R5_UNORM,
323 };
324 assert(pf < PIPE_FORMAT_COUNT);
325 return table[pf];
326 }
327
328 // XXX: use RED for ALPHA textures
329 UNUSED static enum pipe_format
330 alpha_to_red(enum pipe_format pf)
331 {
332 switch (pf) {
333 case PIPE_FORMAT_A8_UNORM: return PIPE_FORMAT_R8_UNORM;
334 case PIPE_FORMAT_A16_UNORM: return PIPE_FORMAT_R16_UNORM;
335 case PIPE_FORMAT_A8_SNORM: return PIPE_FORMAT_R8_SNORM;
336 case PIPE_FORMAT_A16_SNORM: return PIPE_FORMAT_R16_SNORM;
337 case PIPE_FORMAT_A16_FLOAT: return PIPE_FORMAT_R16_FLOAT;
338 case PIPE_FORMAT_A32_FLOAT: return PIPE_FORMAT_R32_FLOAT;
339 case PIPE_FORMAT_A8_UINT: return PIPE_FORMAT_A8_UINT;
340 case PIPE_FORMAT_A8_SINT: return PIPE_FORMAT_A8_SINT;
341 case PIPE_FORMAT_A16_UINT: return PIPE_FORMAT_R16_UINT;
342 case PIPE_FORMAT_A16_SINT: return PIPE_FORMAT_R16_SINT;
343 case PIPE_FORMAT_A32_UINT: return PIPE_FORMAT_R32_UINT;
344 case PIPE_FORMAT_A32_SINT: return PIPE_FORMAT_R32_SINT;
345 default: return pf;
346 }
347 }
348
349 struct iris_format_info
350 iris_format_for_usage(const struct gen_device_info *devinfo,
351 enum pipe_format pformat,
352 isl_surf_usage_flags_t usage)
353 {
354 struct isl_swizzle swizzle = ISL_SWIZZLE_IDENTITY;
355
356 if (usage & ISL_SURF_USAGE_TEXTURE_BIT) {
357 if (!util_format_is_srgb(pformat)) {
358 if (util_format_is_intensity(pformat)) {
359 swizzle = ISL_SWIZZLE(RED, RED, RED, RED);
360 } else if (util_format_is_luminance(pformat)) {
361 swizzle = ISL_SWIZZLE(RED, RED, RED, ONE);
362 //} else if (util_format_is_alpha(pformat)) {
363 //pformat = alpha_to_red(pformat);
364 //swizzle = ISL_SWIZZLE(ZERO, ZERO, ZERO, RED);
365 }
366 }
367 if (pformat == PIPE_FORMAT_DXT1_RGB ||
368 pformat == PIPE_FORMAT_DXT1_SRGB)
369 swizzle = ISL_SWIZZLE(RED, GREEN, BLUE, ONE);
370 }
371
372 enum isl_format format = iris_isl_format_for_pipe_format(pformat);
373
374 /* Convert RGBX into RGBA for rendering or typed image access. */
375 if (isl_format_is_rgbx(format) &&
376 (((usage & ISL_SURF_USAGE_RENDER_TARGET_BIT) &&
377 !isl_format_supports_rendering(devinfo, format)) ||
378 ((usage & ISL_SURF_USAGE_STORAGE_BIT) &&
379 !(isl_format_supports_typed_writes(devinfo, format) &&
380 isl_format_supports_typed_reads(devinfo, format))))) {
381 format = isl_format_rgbx_to_rgba(format);
382 }
383
384 return (struct iris_format_info) { .fmt = format, .swizzle = swizzle };
385 }
386
387 /**
388 * The pscreen->is_format_supported() driver hook.
389 *
390 * Returns true if the given format is supported for the given usage
391 * (PIPE_BIND_*) and sample count.
392 */
393 boolean
394 iris_is_format_supported(struct pipe_screen *pscreen,
395 enum pipe_format pformat,
396 enum pipe_texture_target target,
397 unsigned sample_count,
398 unsigned storage_sample_count,
399 unsigned usage)
400 {
401 struct iris_screen *screen = (struct iris_screen *) pscreen;
402 const struct gen_device_info *devinfo = &screen->devinfo;
403 uint32_t max_samples = devinfo->gen == 8 ? 8 : 16;
404
405 // XXX: msaa max
406 if (sample_count > max_samples || !util_is_power_of_two_or_zero(sample_count))
407 return false;
408
409 if (pformat == PIPE_FORMAT_NONE)
410 return true;
411
412 enum isl_format format = iris_isl_format_for_pipe_format(pformat);
413
414 if (format == ISL_FORMAT_UNSUPPORTED)
415 return false;
416
417 const struct isl_format_layout *fmtl = isl_format_get_layout(format);
418 const bool is_integer = isl_format_has_int_channel(format);
419 bool supported = true;
420
421 if (sample_count > 1)
422 supported &= isl_format_supports_multisampling(devinfo, format);
423
424 if (usage & PIPE_BIND_DEPTH_STENCIL) {
425 supported &= format == ISL_FORMAT_R32_FLOAT_X8X24_TYPELESS ||
426 format == ISL_FORMAT_R32_FLOAT ||
427 format == ISL_FORMAT_R24_UNORM_X8_TYPELESS ||
428 format == ISL_FORMAT_R16_UNORM ||
429 format == ISL_FORMAT_R8_UINT;
430 }
431
432 if (usage & PIPE_BIND_RENDER_TARGET) {
433 supported &= isl_format_supports_rendering(devinfo, format);
434 if (!is_integer)
435 supported &= isl_format_supports_alpha_blending(devinfo, format);
436 }
437
438 if (usage & PIPE_BIND_SHADER_IMAGE) {
439 // XXX: allow untyped reads
440 supported &= isl_format_supports_typed_reads(devinfo, format) &&
441 isl_format_supports_typed_writes(devinfo, format);
442 }
443
444 if (usage & PIPE_BIND_SAMPLER_VIEW) {
445 supported &= isl_format_supports_sampling(devinfo, format);
446 if (!is_integer)
447 supported &= isl_format_supports_filtering(devinfo, format);
448
449 /* Don't advertise 3-component RGB formats. This ensures that they
450 * are renderable from an API perspective since the state tracker will
451 * fall back to RGBA or RGBX, which are renderable. We want to render
452 * internally for copies and blits, even if the application doesn't.
453 *
454 * We do need to advertise 32-bit RGB for texture buffers though.
455 */
456 supported &= fmtl->bpb != 24 && fmtl->bpb != 48 &&
457 (fmtl->bpb != 96 || target == PIPE_BUFFER);
458 }
459
460 if (usage & PIPE_BIND_VERTEX_BUFFER)
461 supported &= isl_format_supports_vertex_fetch(devinfo, format);
462
463 if (usage & PIPE_BIND_INDEX_BUFFER) {
464 supported &= format == ISL_FORMAT_R8_UINT ||
465 format == ISL_FORMAT_R16_UINT ||
466 format == ISL_FORMAT_R32_UINT;
467 }
468
469 if (usage & PIPE_BIND_CONSTANT_BUFFER) {
470 // XXX:
471 }
472
473 if (usage & PIPE_BIND_STREAM_OUTPUT) {
474 // XXX:
475 }
476
477 if (usage & PIPE_BIND_CURSOR) {
478 // XXX:
479 }
480
481 if (usage & PIPE_BIND_CUSTOM) {
482 // XXX:
483 }
484
485 if (usage & PIPE_BIND_SHADER_BUFFER) {
486 // XXX:
487 }
488
489 if (usage & PIPE_BIND_COMPUTE_RESOURCE) {
490 // XXX:
491 }
492
493 if (usage & PIPE_BIND_COMMAND_ARGS_BUFFER) {
494 // XXX:
495 }
496
497 if (usage & PIPE_BIND_QUERY_BUFFER) {
498 // XXX:
499 }
500
501 return supported;
502 }
503