lima/ppir: fix lod bias src
[mesa.git] / src / gallium / drivers / lima / ir / pp / ppir.h
1 /*
2 * Copyright (c) 2017 Lima Project
3 * Copyright (c) 2013 Connor Abbott
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a copy
6 * of this software and associated documentation files (the "Software"), to deal
7 * in the Software without restriction, including without limitation the rights
8 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
9 * copies of the Software, and to permit persons to whom the Software is
10 * furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be included in
13 * all copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
18 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
21 * THE SOFTWARE.
22 *
23 */
24
25 #ifndef LIMA_IR_PP_PPIR_H
26 #define LIMA_IR_PP_PPIR_H
27
28 #include "util/u_math.h"
29 #include "util/list.h"
30
31 #include "ir/lima_ir.h"
32
33 typedef enum {
34 ppir_op_mov,
35 ppir_op_abs,
36 ppir_op_neg,
37 ppir_op_sat,
38 ppir_op_add,
39
40 ppir_op_ddx,
41 ppir_op_ddy,
42
43 ppir_op_mul,
44 ppir_op_rcp,
45
46 ppir_op_sin_lut,
47 ppir_op_cos_lut,
48
49 ppir_op_sum3,
50 ppir_op_sum4,
51
52 ppir_op_normalize2,
53 ppir_op_normalize3,
54 ppir_op_normalize4,
55
56 ppir_op_sel_cond,
57 ppir_op_select,
58
59 ppir_op_sin,
60 ppir_op_cos,
61 ppir_op_tan,
62 ppir_op_asin,
63 ppir_op_acos,
64
65 ppir_op_atan,
66 ppir_op_atan2,
67 ppir_op_atan_pt1,
68 ppir_op_atan2_pt1,
69 ppir_op_atan_pt2,
70
71 ppir_op_exp,
72 ppir_op_log,
73 ppir_op_exp2,
74 ppir_op_log2,
75 ppir_op_sqrt,
76 ppir_op_rsqrt,
77
78 ppir_op_sign,
79 ppir_op_floor,
80 ppir_op_ceil,
81 ppir_op_fract,
82 ppir_op_mod,
83 ppir_op_min,
84 ppir_op_max,
85 ppir_op_trunc,
86
87 ppir_op_and,
88 ppir_op_or,
89 ppir_op_xor,
90
91 ppir_op_lt,
92 ppir_op_gt,
93 ppir_op_le,
94 ppir_op_ge,
95 ppir_op_eq,
96 ppir_op_ne,
97 ppir_op_not,
98
99 ppir_op_load_uniform,
100 ppir_op_load_varying,
101 ppir_op_load_coords,
102 ppir_op_load_coords_reg,
103 ppir_op_load_fragcoord,
104 ppir_op_load_pointcoord,
105 ppir_op_load_frontface,
106 ppir_op_load_texture,
107 ppir_op_load_temp,
108
109 ppir_op_store_temp,
110 ppir_op_store_color,
111
112 ppir_op_const,
113
114 ppir_op_discard,
115 ppir_op_branch,
116
117 ppir_op_undef,
118
119 ppir_op_num,
120 } ppir_op;
121
122 typedef enum {
123 ppir_node_type_alu,
124 ppir_node_type_const,
125 ppir_node_type_load,
126 ppir_node_type_store,
127 ppir_node_type_load_texture,
128 ppir_node_type_discard,
129 ppir_node_type_branch,
130 } ppir_node_type;
131
132 typedef struct {
133 char *name;
134 ppir_node_type type;
135 int *slots;
136 } ppir_op_info;
137
138 extern const ppir_op_info ppir_op_infos[];
139
140 typedef enum {
141 ppir_dep_src,
142 ppir_dep_write_after_read,
143 ppir_dep_sequence,
144 } ppir_dep_type;
145
146 typedef struct {
147 void *pred, *succ;
148 ppir_dep_type type;
149 struct list_head pred_link;
150 struct list_head succ_link;
151 } ppir_dep;
152
153 typedef struct ppir_node {
154 struct list_head list;
155 ppir_op op;
156 ppir_node_type type;
157 int index;
158 char name[16];
159 bool printed;
160 struct ppir_instr *instr;
161 int instr_pos;
162 struct ppir_block *block;
163
164 /* for scheduler */
165 struct list_head succ_list;
166 struct list_head pred_list;
167 } ppir_node;
168
169 typedef enum {
170 ppir_pipeline_reg_const0,
171 ppir_pipeline_reg_const1,
172 ppir_pipeline_reg_sampler,
173 ppir_pipeline_reg_uniform,
174 ppir_pipeline_reg_vmul,
175 ppir_pipeline_reg_fmul,
176 ppir_pipeline_reg_discard, /* varying load */
177 } ppir_pipeline;
178
179 typedef struct ppir_reg {
180 struct list_head list;
181 int index;
182 int regalloc_index;
183 int num_components;
184 /* whether this reg has to start from the x component
185 * of a full physical reg, this is true for reg used
186 * in load/store instr which has no swizzle field
187 */
188 bool is_head;
189 /* instr live range */
190 int live_in, live_out;
191 bool spilled;
192 bool undef;
193 } ppir_reg;
194
195 typedef enum {
196 ppir_target_ssa,
197 ppir_target_pipeline,
198 ppir_target_register,
199 } ppir_target;
200
201 typedef struct ppir_src {
202 ppir_target type;
203 ppir_node *node;
204
205 union {
206 ppir_reg *ssa;
207 ppir_reg *reg;
208 ppir_pipeline pipeline;
209 };
210
211 uint8_t swizzle[4];
212 bool absolute, negate;
213 } ppir_src;
214
215 typedef enum {
216 ppir_outmod_none,
217 ppir_outmod_clamp_fraction,
218 ppir_outmod_clamp_positive,
219 ppir_outmod_round,
220 } ppir_outmod;
221
222 typedef struct ppir_dest {
223 ppir_target type;
224
225 union {
226 ppir_reg ssa;
227 ppir_reg *reg;
228 ppir_pipeline pipeline;
229 };
230
231 ppir_outmod modifier;
232 unsigned write_mask : 4;
233 } ppir_dest;
234
235 typedef struct {
236 ppir_node node;
237 ppir_dest dest;
238 ppir_src src[3];
239 int num_src;
240 int shift : 3; /* Only used for ppir_op_mul */
241 } ppir_alu_node;
242
243 typedef struct ppir_const {
244 union fi value[4];
245 int num;
246 } ppir_const;
247
248 typedef struct {
249 ppir_node node;
250 ppir_const constant;
251 ppir_dest dest;
252 } ppir_const_node;
253
254 typedef struct {
255 ppir_node node;
256 int index;
257 int num_components;
258 ppir_dest dest;
259 ppir_src src;
260 int num_src;
261 } ppir_load_node;
262
263 typedef struct {
264 ppir_node node;
265 int index;
266 int num_components;
267 ppir_src src;
268 } ppir_store_node;
269
270 typedef struct {
271 ppir_node node;
272 ppir_dest dest;
273 ppir_src src[2]; /* src[0] temporarily stores src_coords,
274 not to be used after lowering */
275 int num_src;
276 int sampler;
277 int sampler_dim;
278 bool lod_bias_en;
279 bool explicit_lod;
280 } ppir_load_texture_node;
281
282 typedef struct {
283 ppir_node node;
284 } ppir_discard_node;
285
286 enum ppir_instr_slot {
287 PPIR_INSTR_SLOT_VARYING,
288 PPIR_INSTR_SLOT_TEXLD,
289 PPIR_INSTR_SLOT_UNIFORM,
290 PPIR_INSTR_SLOT_ALU_VEC_MUL,
291 PPIR_INSTR_SLOT_ALU_SCL_MUL,
292 PPIR_INSTR_SLOT_ALU_VEC_ADD,
293 PPIR_INSTR_SLOT_ALU_SCL_ADD,
294 PPIR_INSTR_SLOT_ALU_COMBINE,
295 PPIR_INSTR_SLOT_STORE_TEMP,
296 PPIR_INSTR_SLOT_BRANCH,
297 PPIR_INSTR_SLOT_NUM,
298 PPIR_INSTR_SLOT_END,
299 PPIR_INSTR_SLOT_ALU_START = PPIR_INSTR_SLOT_ALU_VEC_MUL,
300 PPIR_INSTR_SLOT_ALU_END = PPIR_INSTR_SLOT_ALU_COMBINE,
301 };
302
303 typedef struct ppir_instr {
304 struct list_head list;
305 int index;
306 bool printed;
307 int seq; /* command sequence after schedule */
308
309 ppir_node *slots[PPIR_INSTR_SLOT_NUM];
310 ppir_const constant[2];
311 bool is_end;
312
313 /* for scheduler */
314 struct list_head succ_list;
315 struct list_head pred_list;
316 float reg_pressure;
317 int est; /* earliest start time */
318 int parent_index;
319 bool scheduled;
320 int offset;
321 int encode_size;
322 } ppir_instr;
323
324 typedef struct ppir_block {
325 struct list_head list;
326 struct list_head node_list;
327 struct list_head instr_list;
328
329 struct ppir_block *successors[2];
330
331 struct ppir_compiler *comp;
332
333 /* for scheduler */
334 int sched_instr_index;
335 int sched_instr_base;
336 int index;
337
338 /* for liveness analysis */
339 BITSET_WORD *def;
340 BITSET_WORD *use;
341 BITSET_WORD *live_in;
342 BITSET_WORD *live_out;
343 } ppir_block;
344
345 typedef struct {
346 ppir_node node;
347 ppir_src src[2];
348 int num_src;
349 bool cond_gt;
350 bool cond_eq;
351 bool cond_lt;
352 bool negate;
353 ppir_block *target;
354 } ppir_branch_node;
355
356 struct ra_regs;
357 struct lima_fs_shader_state;
358
359 typedef struct ppir_compiler {
360 struct list_head block_list;
361 struct hash_table_u64 *blocks;
362 int cur_index;
363 int cur_instr_index;
364
365 struct list_head reg_list;
366
367 /* array for searching ssa/reg node */
368 ppir_node **var_nodes;
369 unsigned reg_base;
370
371 struct ra_regs *ra;
372 struct lima_fs_shader_state *prog;
373
374 /* for scheduler */
375 int sched_instr_base;
376
377 /* for regalloc spilling debug */
378 int force_spilling;
379
380 /* shaderdb */
381 int num_loops;
382 int num_spills;
383 int num_fills;
384
385 ppir_block *discard_block;
386 ppir_block *current_block;
387 ppir_block *loop_break_block;
388 ppir_block *loop_cont_block;
389 } ppir_compiler;
390
391 void *ppir_node_create(ppir_block *block, ppir_op op, int index, unsigned mask);
392 void ppir_node_add_dep(ppir_node *succ, ppir_node *pred, ppir_dep_type type);
393 void ppir_node_remove_dep(ppir_dep *dep);
394 void ppir_node_delete(ppir_node *node);
395 void ppir_node_print_prog(ppir_compiler *comp);
396 void ppir_node_replace_child(ppir_node *parent, ppir_node *old_child, ppir_node *new_child);
397 void ppir_node_replace_all_succ(ppir_node *dst, ppir_node *src);
398 void ppir_node_replace_pred(ppir_dep *dep, ppir_node *new_pred);
399 ppir_dep *ppir_dep_for_pred(ppir_node *node, ppir_node *pred);
400 ppir_node *ppir_node_clone(ppir_block *block, ppir_node *node);
401 /* Assumes that node successors are in the same block */
402 ppir_node *ppir_node_insert_mov(ppir_node *node);
403
404 static inline bool ppir_node_is_root(ppir_node *node)
405 {
406 return list_is_empty(&node->succ_list);
407 }
408
409 static inline bool ppir_node_is_leaf(ppir_node *node)
410 {
411 return list_is_empty(&node->pred_list);
412 }
413
414 static inline bool ppir_node_has_single_succ(ppir_node *node)
415 {
416 return list_is_singular(&node->succ_list);
417 }
418
419 bool ppir_node_has_single_src_succ(ppir_node *node);
420
421 static inline ppir_node *ppir_node_first_succ(ppir_node *node)
422 {
423 return list_first_entry(&node->succ_list, ppir_dep, succ_link)->succ;
424 }
425
426 static inline bool ppir_node_has_single_pred(ppir_node *node)
427 {
428 return list_is_singular(&node->pred_list);
429 }
430
431 static inline ppir_node *ppir_node_first_pred(ppir_node *node)
432 {
433 return list_first_entry(&node->pred_list, ppir_dep, pred_link)->pred;
434 }
435
436 #define ppir_node_foreach_succ(node, dep) \
437 list_for_each_entry(ppir_dep, dep, &node->succ_list, succ_link)
438 #define ppir_node_foreach_succ_safe(node, dep) \
439 list_for_each_entry_safe(ppir_dep, dep, &node->succ_list, succ_link)
440 #define ppir_node_foreach_pred(node, dep) \
441 list_for_each_entry(ppir_dep, dep, &node->pred_list, pred_link)
442 #define ppir_node_foreach_pred_safe(node, dep) \
443 list_for_each_entry_safe(ppir_dep, dep, &node->pred_list, pred_link)
444
445 #define ppir_node_to_alu(node) ((ppir_alu_node *)(node))
446 #define ppir_node_to_const(node) ((ppir_const_node *)(node))
447 #define ppir_node_to_load(node) ((ppir_load_node *)(node))
448 #define ppir_node_to_store(node) ((ppir_store_node *)(node))
449 #define ppir_node_to_load_texture(node) ((ppir_load_texture_node *)(node))
450 #define ppir_node_to_discard(node) ((ppir_discard_node *)(node))
451 #define ppir_node_to_branch(node) ((ppir_branch_node *)(node))
452
453 static inline ppir_dest *ppir_node_get_dest(ppir_node *node)
454 {
455 switch (node->type) {
456 case ppir_node_type_alu:
457 return &ppir_node_to_alu(node)->dest;
458 case ppir_node_type_load:
459 return &ppir_node_to_load(node)->dest;
460 case ppir_node_type_const:
461 return &ppir_node_to_const(node)->dest;
462 case ppir_node_type_load_texture:
463 return &ppir_node_to_load_texture(node)->dest;
464 default:
465 return NULL;
466 }
467 }
468
469 static inline int ppir_node_get_src_num(ppir_node *node)
470 {
471 switch (node->type) {
472 case ppir_node_type_alu:
473 return ppir_node_to_alu(node)->num_src;
474 case ppir_node_type_branch:
475 return ppir_node_to_branch(node)->num_src;
476 case ppir_node_type_load:
477 return ppir_node_to_load(node)->num_src;
478 case ppir_node_type_load_texture:
479 return ppir_node_to_load_texture(node)->num_src;
480 case ppir_node_type_store:
481 return 1;
482 default:
483 return 0;
484 }
485
486 return 0;
487 }
488
489 static inline ppir_src *ppir_node_get_src(ppir_node *node, int idx)
490 {
491 if (idx < 0 || idx >= ppir_node_get_src_num(node))
492 return NULL;
493
494 switch (node->type) {
495 case ppir_node_type_alu:
496 return &ppir_node_to_alu(node)->src[idx];
497 case ppir_node_type_branch:
498 return &ppir_node_to_branch(node)->src[idx];
499 case ppir_node_type_load_texture:
500 return &ppir_node_to_load_texture(node)->src[idx];
501 case ppir_node_type_load:
502 return &ppir_node_to_load(node)->src;
503 case ppir_node_type_store:
504 return &ppir_node_to_store(node)->src;
505 default:
506 break;
507 }
508
509 return NULL;
510 }
511
512 static inline ppir_reg *ppir_src_get_reg(ppir_src *src)
513 {
514 switch (src->type) {
515 case ppir_target_ssa:
516 return src->ssa;
517 case ppir_target_register:
518 return src->reg;
519 default:
520 return NULL;
521 }
522 }
523
524 static inline ppir_reg *ppir_dest_get_reg(ppir_dest *dest)
525 {
526 switch (dest->type) {
527 case ppir_target_ssa:
528 return &dest->ssa;
529 case ppir_target_register:
530 return dest->reg;
531 default:
532 return NULL;
533 }
534 }
535
536 static inline ppir_src *ppir_node_get_src_for_pred(ppir_node *node, ppir_node *pred)
537 {
538 for (int i = 0; i < ppir_node_get_src_num(node); i++) {
539 ppir_src *src = ppir_node_get_src(node, i);
540 if (src && src->node == pred)
541 return src;
542 }
543
544 return NULL;
545 }
546
547 static inline void ppir_node_target_assign(ppir_src *src, ppir_node *node)
548 {
549 ppir_dest *dest = ppir_node_get_dest(node);
550 src->type = dest->type;
551 switch (src->type) {
552 case ppir_target_ssa:
553 src->ssa = &dest->ssa;
554 src->node = node;
555 break;
556 case ppir_target_register:
557 src->reg = dest->reg;
558 /* Registers can be assigned from multiple nodes, so don't keep
559 * pointer to the node here
560 */
561 src->node = NULL;
562 break;
563 case ppir_target_pipeline:
564 src->pipeline = dest->pipeline;
565 src->node = node;
566 break;
567 }
568 }
569
570 static inline bool ppir_node_target_equal(ppir_src *src, ppir_dest *dest)
571 {
572 if (src->type != dest->type ||
573 (src->type == ppir_target_ssa && src->ssa != &dest->ssa) ||
574 (src->type == ppir_target_register && src->reg != dest->reg) ||
575 (src->type == ppir_target_pipeline && src->pipeline != dest->pipeline))
576 return false;
577
578 return true;
579 }
580
581 static inline int ppir_target_get_src_reg_index(ppir_src *src)
582 {
583 switch (src->type) {
584 case ppir_target_ssa:
585 if (src->ssa)
586 return src->ssa->index;
587 break;
588 case ppir_target_register:
589 if (src->reg)
590 return src->reg->index;
591 break;
592 case ppir_target_pipeline:
593 if (src->pipeline == ppir_pipeline_reg_discard)
594 return 15 * 4;
595 return (src->pipeline + 12) * 4;
596 }
597
598 return -1;
599 }
600
601 static inline int ppir_target_get_dest_reg_index(ppir_dest *dest)
602 {
603 switch (dest->type) {
604 case ppir_target_ssa:
605 return dest->ssa.index;
606 case ppir_target_register:
607 return dest->reg->index;
608 case ppir_target_pipeline:
609 if (dest->pipeline == ppir_pipeline_reg_discard)
610 return 15 * 4;
611 return (dest->pipeline + 12) * 4;
612 }
613
614 return -1;
615 }
616
617 static inline bool ppir_target_is_scaler(ppir_dest *dest)
618 {
619 switch (dest->type) {
620 case ppir_target_ssa:
621 return dest->ssa.num_components == 1;
622 case ppir_target_register:
623 /* only one bit in mask is set */
624 if ((dest->write_mask & 0x3) == 0x3 ||
625 (dest->write_mask & 0x5) == 0x5 ||
626 (dest->write_mask & 0x9) == 0x9 ||
627 (dest->write_mask & 0x6) == 0x6 ||
628 (dest->write_mask & 0xa) == 0xa ||
629 (dest->write_mask & 0xc) == 0xc)
630 return false;
631 else
632 return true;
633 case ppir_target_pipeline:
634 if (dest->pipeline == ppir_pipeline_reg_fmul)
635 return true;
636 else
637 return false;
638 default:
639 return false;
640 }
641 }
642
643 ppir_instr *ppir_instr_create(ppir_block *block);
644 bool ppir_instr_insert_node(ppir_instr *instr, ppir_node *node);
645 void ppir_instr_add_dep(ppir_instr *succ, ppir_instr *pred);
646 void ppir_instr_print_list(ppir_compiler *comp);
647 void ppir_instr_print_dep(ppir_compiler *comp);
648 void ppir_instr_insert_mul_node(ppir_node *add, ppir_node *mul);
649
650 #define ppir_instr_foreach_succ(instr, dep) \
651 list_for_each_entry(ppir_dep, dep, &instr->succ_list, succ_link)
652 #define ppir_instr_foreach_succ_safe(instr, dep) \
653 list_for_each_entry_safe(ppir_dep, dep, &instr->succ_list, succ_link)
654 #define ppir_instr_foreach_pred(instr, dep) \
655 list_for_each_entry(ppir_dep, dep, &instr->pred_list, pred_link)
656 #define ppir_instr_foreach_pred_safe(instr, dep) \
657 list_for_each_entry_safe(ppir_dep, dep, &instr->pred_list, pred_link)
658
659 static inline bool ppir_instr_is_root(ppir_instr *instr)
660 {
661 return list_is_empty(&instr->succ_list);
662 }
663
664 static inline bool ppir_instr_is_leaf(ppir_instr *instr)
665 {
666 return list_is_empty(&instr->pred_list);
667 }
668
669 bool ppir_lower_prog(ppir_compiler *comp);
670 bool ppir_node_to_instr(ppir_compiler *comp);
671 bool ppir_schedule_prog(ppir_compiler *comp);
672 bool ppir_regalloc_prog(ppir_compiler *comp);
673 bool ppir_codegen_prog(ppir_compiler *comp);
674 void ppir_liveness_analysis(ppir_compiler *comp);
675
676 #endif