lima/ppir: add lod-bias support
[mesa.git] / src / gallium / drivers / lima / ir / pp / ppir.h
1 /*
2 * Copyright (c) 2017 Lima Project
3 * Copyright (c) 2013 Connor Abbott
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a copy
6 * of this software and associated documentation files (the "Software"), to deal
7 * in the Software without restriction, including without limitation the rights
8 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
9 * copies of the Software, and to permit persons to whom the Software is
10 * furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice shall be included in
13 * all copies or substantial portions of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
18 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
21 * THE SOFTWARE.
22 *
23 */
24
25 #ifndef LIMA_IR_PP_PPIR_H
26 #define LIMA_IR_PP_PPIR_H
27
28 #include "util/u_math.h"
29 #include "util/list.h"
30
31 #include "ir/lima_ir.h"
32
33 typedef enum {
34 ppir_op_mov,
35 ppir_op_abs,
36 ppir_op_neg,
37 ppir_op_sat,
38 ppir_op_add,
39
40 ppir_op_ddx,
41 ppir_op_ddy,
42
43 ppir_op_mul,
44 ppir_op_rcp,
45
46 ppir_op_sin_lut,
47 ppir_op_cos_lut,
48
49 ppir_op_sum3,
50 ppir_op_sum4,
51
52 ppir_op_normalize2,
53 ppir_op_normalize3,
54 ppir_op_normalize4,
55
56 ppir_op_sel_cond,
57 ppir_op_select,
58
59 ppir_op_sin,
60 ppir_op_cos,
61 ppir_op_tan,
62 ppir_op_asin,
63 ppir_op_acos,
64
65 ppir_op_atan,
66 ppir_op_atan2,
67 ppir_op_atan_pt1,
68 ppir_op_atan2_pt1,
69 ppir_op_atan_pt2,
70
71 ppir_op_exp,
72 ppir_op_log,
73 ppir_op_exp2,
74 ppir_op_log2,
75 ppir_op_sqrt,
76 ppir_op_rsqrt,
77
78 ppir_op_sign,
79 ppir_op_floor,
80 ppir_op_ceil,
81 ppir_op_fract,
82 ppir_op_mod,
83 ppir_op_min,
84 ppir_op_max,
85 ppir_op_trunc,
86
87 ppir_op_and,
88 ppir_op_or,
89 ppir_op_xor,
90
91 ppir_op_lt,
92 ppir_op_gt,
93 ppir_op_le,
94 ppir_op_ge,
95 ppir_op_eq,
96 ppir_op_ne,
97 ppir_op_not,
98
99 ppir_op_load_uniform,
100 ppir_op_load_varying,
101 ppir_op_load_coords,
102 ppir_op_load_coords_reg,
103 ppir_op_load_fragcoord,
104 ppir_op_load_pointcoord,
105 ppir_op_load_frontface,
106 ppir_op_load_texture,
107 ppir_op_load_temp,
108
109 ppir_op_store_temp,
110 ppir_op_store_color,
111
112 ppir_op_const,
113
114 ppir_op_discard,
115 ppir_op_branch,
116
117 ppir_op_undef,
118
119 ppir_op_num,
120 } ppir_op;
121
122 typedef enum {
123 ppir_node_type_alu,
124 ppir_node_type_const,
125 ppir_node_type_load,
126 ppir_node_type_store,
127 ppir_node_type_load_texture,
128 ppir_node_type_discard,
129 ppir_node_type_branch,
130 } ppir_node_type;
131
132 typedef struct {
133 char *name;
134 ppir_node_type type;
135 int *slots;
136 } ppir_op_info;
137
138 extern const ppir_op_info ppir_op_infos[];
139
140 typedef enum {
141 ppir_dep_src,
142 ppir_dep_write_after_read,
143 ppir_dep_sequence,
144 } ppir_dep_type;
145
146 typedef struct {
147 void *pred, *succ;
148 ppir_dep_type type;
149 struct list_head pred_link;
150 struct list_head succ_link;
151 } ppir_dep;
152
153 typedef struct ppir_node {
154 struct list_head list;
155 ppir_op op;
156 ppir_node_type type;
157 int index;
158 char name[16];
159 bool printed;
160 struct ppir_instr *instr;
161 int instr_pos;
162 struct ppir_block *block;
163
164 /* for scheduler */
165 struct list_head succ_list;
166 struct list_head pred_list;
167 } ppir_node;
168
169 typedef enum {
170 ppir_pipeline_reg_const0,
171 ppir_pipeline_reg_const1,
172 ppir_pipeline_reg_sampler,
173 ppir_pipeline_reg_uniform,
174 ppir_pipeline_reg_vmul,
175 ppir_pipeline_reg_fmul,
176 ppir_pipeline_reg_discard, /* varying load */
177 } ppir_pipeline;
178
179 typedef struct ppir_reg {
180 struct list_head list;
181 int index;
182 int regalloc_index;
183 int num_components;
184 /* whether this reg has to start from the x component
185 * of a full physical reg, this is true for reg used
186 * in load/store instr which has no swizzle field
187 */
188 bool is_head;
189 /* instr live range */
190 int live_in, live_out;
191 bool spilled;
192 bool undef;
193 } ppir_reg;
194
195 typedef enum {
196 ppir_target_ssa,
197 ppir_target_pipeline,
198 ppir_target_register,
199 } ppir_target;
200
201 typedef struct ppir_src {
202 ppir_target type;
203 ppir_node *node;
204
205 union {
206 ppir_reg *ssa;
207 ppir_reg *reg;
208 ppir_pipeline pipeline;
209 };
210
211 uint8_t swizzle[4];
212 bool absolute, negate;
213 } ppir_src;
214
215 typedef enum {
216 ppir_outmod_none,
217 ppir_outmod_clamp_fraction,
218 ppir_outmod_clamp_positive,
219 ppir_outmod_round,
220 } ppir_outmod;
221
222 typedef struct ppir_dest {
223 ppir_target type;
224
225 union {
226 ppir_reg ssa;
227 ppir_reg *reg;
228 ppir_pipeline pipeline;
229 };
230
231 ppir_outmod modifier;
232 unsigned write_mask : 4;
233 } ppir_dest;
234
235 typedef struct {
236 ppir_node node;
237 ppir_dest dest;
238 ppir_src src[3];
239 int num_src;
240 int shift : 3; /* Only used for ppir_op_mul */
241 } ppir_alu_node;
242
243 typedef struct ppir_const {
244 union fi value[4];
245 int num;
246 } ppir_const;
247
248 typedef struct {
249 ppir_node node;
250 ppir_const constant;
251 ppir_dest dest;
252 } ppir_const_node;
253
254 typedef struct {
255 ppir_node node;
256 int index;
257 int num_components;
258 ppir_dest dest;
259 ppir_src src;
260 int num_src;
261 } ppir_load_node;
262
263 typedef struct {
264 ppir_node node;
265 int index;
266 int num_components;
267 ppir_src src;
268 } ppir_store_node;
269
270 typedef struct {
271 ppir_node node;
272 ppir_dest dest;
273 ppir_src src_coords; /* not to be used after lowering */
274 int sampler;
275 int sampler_dim;
276 bool lod_bias_en;
277 bool explicit_lod;
278 ppir_src lod_bias;
279 } ppir_load_texture_node;
280
281 typedef struct {
282 ppir_node node;
283 } ppir_discard_node;
284
285 enum ppir_instr_slot {
286 PPIR_INSTR_SLOT_VARYING,
287 PPIR_INSTR_SLOT_TEXLD,
288 PPIR_INSTR_SLOT_UNIFORM,
289 PPIR_INSTR_SLOT_ALU_VEC_MUL,
290 PPIR_INSTR_SLOT_ALU_SCL_MUL,
291 PPIR_INSTR_SLOT_ALU_VEC_ADD,
292 PPIR_INSTR_SLOT_ALU_SCL_ADD,
293 PPIR_INSTR_SLOT_ALU_COMBINE,
294 PPIR_INSTR_SLOT_STORE_TEMP,
295 PPIR_INSTR_SLOT_BRANCH,
296 PPIR_INSTR_SLOT_NUM,
297 PPIR_INSTR_SLOT_END,
298 PPIR_INSTR_SLOT_ALU_START = PPIR_INSTR_SLOT_ALU_VEC_MUL,
299 PPIR_INSTR_SLOT_ALU_END = PPIR_INSTR_SLOT_ALU_COMBINE,
300 };
301
302 typedef struct ppir_instr {
303 struct list_head list;
304 int index;
305 bool printed;
306 int seq; /* command sequence after schedule */
307
308 ppir_node *slots[PPIR_INSTR_SLOT_NUM];
309 ppir_const constant[2];
310 bool is_end;
311
312 /* for scheduler */
313 struct list_head succ_list;
314 struct list_head pred_list;
315 float reg_pressure;
316 int est; /* earliest start time */
317 int parent_index;
318 bool scheduled;
319 int offset;
320 int encode_size;
321 } ppir_instr;
322
323 typedef struct ppir_block {
324 struct list_head list;
325 struct list_head node_list;
326 struct list_head instr_list;
327
328 struct ppir_block *successors[2];
329
330 struct ppir_compiler *comp;
331
332 /* for scheduler */
333 int sched_instr_index;
334 int sched_instr_base;
335 int index;
336
337 /* for liveness analysis */
338 BITSET_WORD *def;
339 BITSET_WORD *use;
340 BITSET_WORD *live_in;
341 BITSET_WORD *live_out;
342 } ppir_block;
343
344 typedef struct {
345 ppir_node node;
346 ppir_src src[2];
347 int num_src;
348 bool cond_gt;
349 bool cond_eq;
350 bool cond_lt;
351 bool negate;
352 ppir_block *target;
353 } ppir_branch_node;
354
355 struct ra_regs;
356 struct lima_fs_shader_state;
357
358 typedef struct ppir_compiler {
359 struct list_head block_list;
360 struct hash_table_u64 *blocks;
361 int cur_index;
362 int cur_instr_index;
363
364 struct list_head reg_list;
365
366 /* array for searching ssa/reg node */
367 ppir_node **var_nodes;
368 unsigned reg_base;
369
370 struct ra_regs *ra;
371 struct lima_fs_shader_state *prog;
372
373 /* for scheduler */
374 int sched_instr_base;
375
376 /* for regalloc spilling debug */
377 int force_spilling;
378
379 /* shaderdb */
380 int num_loops;
381 int num_spills;
382 int num_fills;
383
384 ppir_block *discard_block;
385 ppir_block *current_block;
386 ppir_block *loop_break_block;
387 ppir_block *loop_cont_block;
388 } ppir_compiler;
389
390 void *ppir_node_create(ppir_block *block, ppir_op op, int index, unsigned mask);
391 void ppir_node_add_dep(ppir_node *succ, ppir_node *pred, ppir_dep_type type);
392 void ppir_node_remove_dep(ppir_dep *dep);
393 void ppir_node_delete(ppir_node *node);
394 void ppir_node_print_prog(ppir_compiler *comp);
395 void ppir_node_replace_child(ppir_node *parent, ppir_node *old_child, ppir_node *new_child);
396 void ppir_node_replace_all_succ(ppir_node *dst, ppir_node *src);
397 void ppir_node_replace_pred(ppir_dep *dep, ppir_node *new_pred);
398 ppir_dep *ppir_dep_for_pred(ppir_node *node, ppir_node *pred);
399 ppir_node *ppir_node_clone(ppir_block *block, ppir_node *node);
400 /* Assumes that node successors are in the same block */
401 ppir_node *ppir_node_insert_mov(ppir_node *node);
402
403 static inline bool ppir_node_is_root(ppir_node *node)
404 {
405 return list_is_empty(&node->succ_list);
406 }
407
408 static inline bool ppir_node_is_leaf(ppir_node *node)
409 {
410 return list_is_empty(&node->pred_list);
411 }
412
413 static inline bool ppir_node_has_single_succ(ppir_node *node)
414 {
415 return list_is_singular(&node->succ_list);
416 }
417
418 bool ppir_node_has_single_src_succ(ppir_node *node);
419
420 static inline ppir_node *ppir_node_first_succ(ppir_node *node)
421 {
422 return list_first_entry(&node->succ_list, ppir_dep, succ_link)->succ;
423 }
424
425 static inline bool ppir_node_has_single_pred(ppir_node *node)
426 {
427 return list_is_singular(&node->pred_list);
428 }
429
430 static inline ppir_node *ppir_node_first_pred(ppir_node *node)
431 {
432 return list_first_entry(&node->pred_list, ppir_dep, pred_link)->pred;
433 }
434
435 #define ppir_node_foreach_succ(node, dep) \
436 list_for_each_entry(ppir_dep, dep, &node->succ_list, succ_link)
437 #define ppir_node_foreach_succ_safe(node, dep) \
438 list_for_each_entry_safe(ppir_dep, dep, &node->succ_list, succ_link)
439 #define ppir_node_foreach_pred(node, dep) \
440 list_for_each_entry(ppir_dep, dep, &node->pred_list, pred_link)
441 #define ppir_node_foreach_pred_safe(node, dep) \
442 list_for_each_entry_safe(ppir_dep, dep, &node->pred_list, pred_link)
443
444 #define ppir_node_to_alu(node) ((ppir_alu_node *)(node))
445 #define ppir_node_to_const(node) ((ppir_const_node *)(node))
446 #define ppir_node_to_load(node) ((ppir_load_node *)(node))
447 #define ppir_node_to_store(node) ((ppir_store_node *)(node))
448 #define ppir_node_to_load_texture(node) ((ppir_load_texture_node *)(node))
449 #define ppir_node_to_discard(node) ((ppir_discard_node *)(node))
450 #define ppir_node_to_branch(node) ((ppir_branch_node *)(node))
451
452 static inline ppir_dest *ppir_node_get_dest(ppir_node *node)
453 {
454 switch (node->type) {
455 case ppir_node_type_alu:
456 return &ppir_node_to_alu(node)->dest;
457 case ppir_node_type_load:
458 return &ppir_node_to_load(node)->dest;
459 case ppir_node_type_const:
460 return &ppir_node_to_const(node)->dest;
461 case ppir_node_type_load_texture:
462 return &ppir_node_to_load_texture(node)->dest;
463 default:
464 return NULL;
465 }
466 }
467
468 static inline int ppir_node_get_src_num(ppir_node *node)
469 {
470 switch (node->type) {
471 case ppir_node_type_alu:
472 return ppir_node_to_alu(node)->num_src;
473 case ppir_node_type_branch:
474 return ppir_node_to_branch(node)->num_src;
475 case ppir_node_type_load:
476 return ppir_node_to_load(node)->num_src;
477 case ppir_node_type_load_texture:
478 case ppir_node_type_store:
479 return 1;
480 default:
481 return 0;
482 }
483
484 return 0;
485 }
486
487 static inline ppir_src *ppir_node_get_src(ppir_node *node, int idx)
488 {
489 if (idx < 0 || idx >= ppir_node_get_src_num(node))
490 return NULL;
491
492 switch (node->type) {
493 case ppir_node_type_alu:
494 return &ppir_node_to_alu(node)->src[idx];
495 case ppir_node_type_branch:
496 return &ppir_node_to_branch(node)->src[idx];
497 case ppir_node_type_load_texture:
498 return &ppir_node_to_load_texture(node)->src_coords;
499 case ppir_node_type_load:
500 return &ppir_node_to_load(node)->src;
501 case ppir_node_type_store:
502 return &ppir_node_to_store(node)->src;
503 default:
504 break;
505 }
506
507 return NULL;
508 }
509
510 static inline ppir_reg *ppir_src_get_reg(ppir_src *src)
511 {
512 switch (src->type) {
513 case ppir_target_ssa:
514 return src->ssa;
515 case ppir_target_register:
516 return src->reg;
517 default:
518 return NULL;
519 }
520 }
521
522 static inline ppir_reg *ppir_dest_get_reg(ppir_dest *dest)
523 {
524 switch (dest->type) {
525 case ppir_target_ssa:
526 return &dest->ssa;
527 case ppir_target_register:
528 return dest->reg;
529 default:
530 return NULL;
531 }
532 }
533
534 static inline ppir_src *ppir_node_get_src_for_pred(ppir_node *node, ppir_node *pred)
535 {
536 for (int i = 0; i < ppir_node_get_src_num(node); i++) {
537 ppir_src *src = ppir_node_get_src(node, i);
538 if (src && src->node == pred)
539 return src;
540 }
541
542 return NULL;
543 }
544
545 static inline void ppir_node_target_assign(ppir_src *src, ppir_node *node)
546 {
547 ppir_dest *dest = ppir_node_get_dest(node);
548 src->type = dest->type;
549 switch (src->type) {
550 case ppir_target_ssa:
551 src->ssa = &dest->ssa;
552 src->node = node;
553 break;
554 case ppir_target_register:
555 src->reg = dest->reg;
556 /* Registers can be assigned from multiple nodes, so don't keep
557 * pointer to the node here
558 */
559 src->node = NULL;
560 break;
561 case ppir_target_pipeline:
562 src->pipeline = dest->pipeline;
563 src->node = node;
564 break;
565 }
566 }
567
568 static inline bool ppir_node_target_equal(ppir_src *src, ppir_dest *dest)
569 {
570 if (src->type != dest->type ||
571 (src->type == ppir_target_ssa && src->ssa != &dest->ssa) ||
572 (src->type == ppir_target_register && src->reg != dest->reg) ||
573 (src->type == ppir_target_pipeline && src->pipeline != dest->pipeline))
574 return false;
575
576 return true;
577 }
578
579 static inline int ppir_target_get_src_reg_index(ppir_src *src)
580 {
581 switch (src->type) {
582 case ppir_target_ssa:
583 if (src->ssa)
584 return src->ssa->index;
585 break;
586 case ppir_target_register:
587 if (src->reg)
588 return src->reg->index;
589 break;
590 case ppir_target_pipeline:
591 if (src->pipeline == ppir_pipeline_reg_discard)
592 return 15 * 4;
593 return (src->pipeline + 12) * 4;
594 }
595
596 return -1;
597 }
598
599 static inline int ppir_target_get_dest_reg_index(ppir_dest *dest)
600 {
601 switch (dest->type) {
602 case ppir_target_ssa:
603 return dest->ssa.index;
604 case ppir_target_register:
605 return dest->reg->index;
606 case ppir_target_pipeline:
607 if (dest->pipeline == ppir_pipeline_reg_discard)
608 return 15 * 4;
609 return (dest->pipeline + 12) * 4;
610 }
611
612 return -1;
613 }
614
615 static inline bool ppir_target_is_scaler(ppir_dest *dest)
616 {
617 switch (dest->type) {
618 case ppir_target_ssa:
619 return dest->ssa.num_components == 1;
620 case ppir_target_register:
621 /* only one bit in mask is set */
622 if ((dest->write_mask & 0x3) == 0x3 ||
623 (dest->write_mask & 0x5) == 0x5 ||
624 (dest->write_mask & 0x9) == 0x9 ||
625 (dest->write_mask & 0x6) == 0x6 ||
626 (dest->write_mask & 0xa) == 0xa ||
627 (dest->write_mask & 0xc) == 0xc)
628 return false;
629 else
630 return true;
631 case ppir_target_pipeline:
632 if (dest->pipeline == ppir_pipeline_reg_fmul)
633 return true;
634 else
635 return false;
636 default:
637 return false;
638 }
639 }
640
641 ppir_instr *ppir_instr_create(ppir_block *block);
642 bool ppir_instr_insert_node(ppir_instr *instr, ppir_node *node);
643 void ppir_instr_add_dep(ppir_instr *succ, ppir_instr *pred);
644 void ppir_instr_print_list(ppir_compiler *comp);
645 void ppir_instr_print_dep(ppir_compiler *comp);
646 void ppir_instr_insert_mul_node(ppir_node *add, ppir_node *mul);
647
648 #define ppir_instr_foreach_succ(instr, dep) \
649 list_for_each_entry(ppir_dep, dep, &instr->succ_list, succ_link)
650 #define ppir_instr_foreach_succ_safe(instr, dep) \
651 list_for_each_entry_safe(ppir_dep, dep, &instr->succ_list, succ_link)
652 #define ppir_instr_foreach_pred(instr, dep) \
653 list_for_each_entry(ppir_dep, dep, &instr->pred_list, pred_link)
654 #define ppir_instr_foreach_pred_safe(instr, dep) \
655 list_for_each_entry_safe(ppir_dep, dep, &instr->pred_list, pred_link)
656
657 static inline bool ppir_instr_is_root(ppir_instr *instr)
658 {
659 return list_is_empty(&instr->succ_list);
660 }
661
662 static inline bool ppir_instr_is_leaf(ppir_instr *instr)
663 {
664 return list_is_empty(&instr->pred_list);
665 }
666
667 bool ppir_lower_prog(ppir_compiler *comp);
668 bool ppir_node_to_instr(ppir_compiler *comp);
669 bool ppir_schedule_prog(ppir_compiler *comp);
670 bool ppir_regalloc_prog(ppir_compiler *comp);
671 bool ppir_codegen_prog(ppir_compiler *comp);
672 void ppir_liveness_analysis(ppir_compiler *comp);
673
674 #endif