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lima: refactor indexed draw indices upload
[mesa.git] / src / gallium / drivers / lima / lima_draw.c
1 /*
2 * Copyright (c) 2011-2013 Luc Verhaegen <libv@skynet.be>
3 * Copyright (c) 2017-2019 Lima Project
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sub license,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the
13 * next paragraph) shall be included in all copies or substantial portions
14 * of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
23 *
24 */
25
26 #include "util/u_math.h"
27 #include "util/format/u_format.h"
28 #include "util/u_debug.h"
29 #include "util/u_half.h"
30 #include "util/u_helpers.h"
31 #include "util/u_inlines.h"
32 #include "util/u_pack_color.h"
33 #include "util/hash_table.h"
34 #include "util/u_upload_mgr.h"
35 #include "util/u_prim.h"
36 #include "util/u_vbuf.h"
37
38 #include "lima_context.h"
39 #include "lima_screen.h"
40 #include "lima_resource.h"
41 #include "lima_program.h"
42 #include "lima_bo.h"
43 #include "lima_submit.h"
44 #include "lima_texture.h"
45 #include "lima_util.h"
46 #include "lima_fence.h"
47 #include "lima_format.h"
48
49 #include <drm-uapi/lima_drm.h>
50
51 struct lima_gp_frame_reg {
52 uint32_t vs_cmd_start;
53 uint32_t vs_cmd_end;
54 uint32_t plbu_cmd_start;
55 uint32_t plbu_cmd_end;
56 uint32_t tile_heap_start;
57 uint32_t tile_heap_end;
58 };
59
60 struct lima_pp_frame_reg {
61 uint32_t plbu_array_address;
62 uint32_t render_address;
63 uint32_t unused_0;
64 uint32_t flags;
65 uint32_t clear_value_depth;
66 uint32_t clear_value_stencil;
67 uint32_t clear_value_color;
68 uint32_t clear_value_color_1;
69 uint32_t clear_value_color_2;
70 uint32_t clear_value_color_3;
71 uint32_t width;
72 uint32_t height;
73 uint32_t fragment_stack_address;
74 uint32_t fragment_stack_size;
75 uint32_t unused_1;
76 uint32_t unused_2;
77 uint32_t one;
78 uint32_t supersampled_height;
79 uint32_t dubya;
80 uint32_t onscreen;
81 uint32_t blocking;
82 uint32_t scale;
83 uint32_t foureight;
84 };
85
86 struct lima_pp_wb_reg {
87 uint32_t type;
88 uint32_t address;
89 uint32_t pixel_format;
90 uint32_t downsample_factor;
91 uint32_t pixel_layout;
92 uint32_t pitch;
93 uint32_t mrt_bits;
94 uint32_t mrt_pitch;
95 uint32_t zero;
96 uint32_t unused0;
97 uint32_t unused1;
98 uint32_t unused2;
99 };
100
101 struct lima_render_state {
102 uint32_t blend_color_bg;
103 uint32_t blend_color_ra;
104 uint32_t alpha_blend;
105 uint32_t depth_test;
106 uint32_t depth_range;
107 uint32_t stencil_front;
108 uint32_t stencil_back;
109 uint32_t stencil_test;
110 uint32_t multi_sample;
111 uint32_t shader_address;
112 uint32_t varying_types;
113 uint32_t uniforms_address;
114 uint32_t textures_address;
115 uint32_t aux0;
116 uint32_t aux1;
117 uint32_t varyings_address;
118 };
119
120
121 /* plbu commands */
122 #define PLBU_CMD_BEGIN(max) { \
123 int i = 0, max_n = max; \
124 uint32_t *plbu_cmd = util_dynarray_ensure_cap(&ctx->plbu_cmd_array, ctx->plbu_cmd_array.size + max_n * 4);
125
126 #define PLBU_CMD_END() \
127 assert(i <= max_n); \
128 ctx->plbu_cmd_array.size += i * 4; \
129 }
130
131 #define PLBU_CMD(v1, v2) \
132 do { \
133 plbu_cmd[i++] = v1; \
134 plbu_cmd[i++] = v2; \
135 } while (0)
136
137 #define PLBU_CMD_BLOCK_STEP(shift_min, shift_h, shift_w) \
138 PLBU_CMD(((shift_min) << 28) | ((shift_h) << 16) | (shift_w), 0x1000010C)
139 #define PLBU_CMD_TILED_DIMENSIONS(tiled_w, tiled_h) \
140 PLBU_CMD((((tiled_w) - 1) << 24) | (((tiled_h) - 1) << 8), 0x10000109)
141 #define PLBU_CMD_BLOCK_STRIDE(block_w) PLBU_CMD((block_w) & 0xff, 0x30000000)
142 #define PLBU_CMD_ARRAY_ADDRESS(gp_stream, block_num) \
143 PLBU_CMD(gp_stream, 0x28000000 | ((block_num) - 1) | 1)
144 #define PLBU_CMD_VIEWPORT_LEFT(v) PLBU_CMD(v, 0x10000107)
145 #define PLBU_CMD_VIEWPORT_RIGHT(v) PLBU_CMD(v, 0x10000108)
146 #define PLBU_CMD_VIEWPORT_BOTTOM(v) PLBU_CMD(v, 0x10000105)
147 #define PLBU_CMD_VIEWPORT_TOP(v) PLBU_CMD(v, 0x10000106)
148 #define PLBU_CMD_ARRAYS_SEMAPHORE_BEGIN() PLBU_CMD(0x00010002, 0x60000000)
149 #define PLBU_CMD_ARRAYS_SEMAPHORE_END() PLBU_CMD(0x00010001, 0x60000000)
150 #define PLBU_CMD_PRIMITIVE_SETUP(prim, cull, index_size) \
151 PLBU_CMD(0x200 | (prim) | (cull) | ((index_size) << 9), 0x1000010B)
152 #define PLBU_CMD_RSW_VERTEX_ARRAY(rsw, gl_pos) \
153 PLBU_CMD(rsw, 0x80000000 | ((gl_pos) >> 4))
154 #define PLBU_CMD_SCISSORS(minx, maxx, miny, maxy) \
155 PLBU_CMD(((minx) << 30) | ((maxy) - 1) << 15 | (miny), \
156 0x70000000 | ((maxx) - 1) << 13 | ((minx) >> 2))
157 #define PLBU_CMD_UNKNOWN1() PLBU_CMD(0x00000000, 0x1000010A)
158 #define PLBU_CMD_UNKNOWN2() PLBU_CMD(0x00000200, 0x1000010B)
159 #define PLBU_CMD_LOW_PRIM_SIZE(v) PLBU_CMD(v, 0x1000010D)
160 #define PLBU_CMD_DEPTH_RANGE_NEAR(v) PLBU_CMD(v, 0x1000010E)
161 #define PLBU_CMD_DEPTH_RANGE_FAR(v) PLBU_CMD(v, 0x1000010F)
162 #define PLBU_CMD_INDEXED_DEST(gl_pos) PLBU_CMD(gl_pos, 0x10000100)
163 #define PLBU_CMD_INDEXED_PT_SIZE(pt_size) PLBU_CMD(pt_size, 0x10000102)
164 #define PLBU_CMD_INDICES(va) PLBU_CMD(va, 0x10000101)
165 #define PLBU_CMD_DRAW_ARRAYS(mode, start, count) \
166 PLBU_CMD(((count) << 24) | (start), (((mode) & 0x1F) << 16) | ((count) >> 8))
167 #define PLBU_CMD_DRAW_ELEMENTS(mode, start, count) \
168 PLBU_CMD(((count) << 24) | (start), \
169 0x00200000 | (((mode) & 0x1F) << 16) | ((count) >> 8))
170
171 /* vs commands */
172 #define VS_CMD_BEGIN(max) { \
173 int i = 0, max_n = max; \
174 uint32_t *vs_cmd = util_dynarray_ensure_cap(&ctx->vs_cmd_array, ctx->vs_cmd_array.size + max_n * 4);
175
176 #define VS_CMD_END() \
177 assert(i <= max_n); \
178 ctx->vs_cmd_array.size += i * 4; \
179 }
180
181 #define VS_CMD(v1, v2) \
182 do { \
183 vs_cmd[i++] = v1; \
184 vs_cmd[i++] = v2; \
185 } while (0)
186
187 #define VS_CMD_ARRAYS_SEMAPHORE_BEGIN_1() VS_CMD(0x00028000, 0x50000000)
188 #define VS_CMD_ARRAYS_SEMAPHORE_BEGIN_2() VS_CMD(0x00000001, 0x50000000)
189 #define VS_CMD_ARRAYS_SEMAPHORE_END(index_draw) \
190 VS_CMD((index_draw) ? 0x00018000 : 0x00000000, 0x50000000)
191 #define VS_CMD_UNIFORMS_ADDRESS(addr, size) \
192 VS_CMD(addr, 0x30000000 | ((size) << 12))
193 #define VS_CMD_SHADER_ADDRESS(addr, size) \
194 VS_CMD(addr, 0x40000000 | ((size) << 12))
195 #define VS_CMD_SHADER_INFO(prefetch, size) \
196 VS_CMD(((prefetch) << 20) | ((((size) >> 4) - 1) << 10), 0x10000040)
197 #define VS_CMD_VARYING_ATTRIBUTE_COUNT(nv, na) \
198 VS_CMD((((nv) - 1) << 8) | (((na) - 1) << 24), 0x10000042)
199 #define VS_CMD_UNKNOWN1() VS_CMD(0x00000003, 0x10000041)
200 #define VS_CMD_UNKNOWN2() VS_CMD(0x00000000, 0x60000000)
201 #define VS_CMD_ATTRIBUTES_ADDRESS(addr, na) \
202 VS_CMD(addr, 0x20000000 | ((na) << 17))
203 #define VS_CMD_VARYINGS_ADDRESS(addr, nv) \
204 VS_CMD(addr, 0x20000008 | ((nv) << 17))
205 #define VS_CMD_DRAW(num, index_draw) \
206 VS_CMD(((num) << 24) | ((index_draw) ? 1 : 0), ((num) >> 8))
207
208 static inline bool
209 lima_ctx_dirty(struct lima_context *ctx)
210 {
211 return ctx->plbu_cmd_array.size;
212 }
213
214 static inline struct lima_damage_region *
215 lima_ctx_get_damage(struct lima_context *ctx)
216 {
217 if (!ctx->framebuffer.base.nr_cbufs)
218 return NULL;
219
220 struct lima_surface *surf = lima_surface(ctx->framebuffer.base.cbufs[0]);
221 struct lima_resource *res = lima_resource(surf->base.texture);
222 return &res->damage;
223 }
224
225 static bool
226 lima_fb_need_reload(struct lima_context *ctx)
227 {
228 /* Depth buffer is always discarded */
229 if (!ctx->framebuffer.base.nr_cbufs)
230 return false;
231
232 struct lima_surface *surf = lima_surface(ctx->framebuffer.base.cbufs[0]);
233 struct lima_resource *res = lima_resource(surf->base.texture);
234 if (res->damage.region) {
235 /* for EGL_KHR_partial_update, when EGL_EXT_buffer_age is enabled,
236 * we need to reload damage region, otherwise just want to reload
237 * the region not aligned to tile boundary */
238 //if (!res->damage.aligned)
239 // return true;
240 return true;
241 }
242 else if (surf->reload)
243 return true;
244
245 return false;
246 }
247
248 static void
249 lima_pack_reload_plbu_cmd(struct lima_context *ctx)
250 {
251 #define lima_reload_render_state_offset 0x0000
252 #define lima_reload_gl_pos_offset 0x0040
253 #define lima_reload_varying_offset 0x0080
254 #define lima_reload_tex_desc_offset 0x00c0
255 #define lima_reload_tex_array_offset 0x0100
256 #define lima_reload_buffer_size 0x0140
257
258 void *cpu;
259 unsigned offset;
260 struct pipe_resource *pres = NULL;
261 u_upload_alloc(ctx->uploader, 0, lima_reload_buffer_size,
262 0x40, &offset, &pres, &cpu);
263
264 struct lima_resource *res = lima_resource(pres);
265 uint32_t va = res->bo->va + offset;
266
267 struct lima_screen *screen = lima_screen(ctx->base.screen);
268
269 uint32_t reload_shader_first_instr_size =
270 ((uint32_t *)(screen->pp_buffer->map + pp_reload_program_offset))[0] & 0x1f;
271 uint32_t reload_shader_va = screen->pp_buffer->va + pp_reload_program_offset;
272
273 struct lima_render_state reload_render_state = {
274 .alpha_blend = 0xf03b1ad2,
275 .depth_test = 0x0000000e,
276 .depth_range = 0xffff0000,
277 .stencil_front = 0x00000007,
278 .stencil_back = 0x00000007,
279 .multi_sample = 0x0000f007,
280 .shader_address = reload_shader_va | reload_shader_first_instr_size,
281 .varying_types = 0x00000001,
282 .textures_address = va + lima_reload_tex_array_offset,
283 .aux0 = 0x00004021,
284 .varyings_address = va + lima_reload_varying_offset,
285 };
286 memcpy(cpu + lima_reload_render_state_offset, &reload_render_state,
287 sizeof(reload_render_state));
288
289 struct lima_context_framebuffer *fb = &ctx->framebuffer;
290 lima_tex_desc *td = cpu + lima_reload_tex_desc_offset;
291 memset(td, 0, lima_min_tex_desc_size);
292 lima_texture_desc_set_res(ctx, td, fb->base.cbufs[0]->texture, 0, 0);
293 td->unnorm_coords = 1;
294 td->texture_type = LIMA_TEXTURE_TYPE_2D;
295 td->min_img_filter_nearest = 1;
296 td->mag_img_filter_nearest = 1;
297 td->wrap_s_clamp_to_edge = 1;
298 td->wrap_t_clamp_to_edge = 1;
299 td->unknown_2_2 = 0x1;
300
301 uint32_t *ta = cpu + lima_reload_tex_array_offset;
302 ta[0] = va + lima_reload_tex_desc_offset;
303
304 float reload_gl_pos[] = {
305 fb->base.width, 0, 0, 1,
306 0, 0, 0, 1,
307 0, fb->base.height, 0, 1,
308 };
309 memcpy(cpu + lima_reload_gl_pos_offset, reload_gl_pos,
310 sizeof(reload_gl_pos));
311
312 float reload_varying[] = {
313 fb->base.width, 0, 0, 0,
314 0, fb->base.height, 0, 0,
315 };
316 memcpy(cpu + lima_reload_varying_offset, reload_varying,
317 sizeof(reload_varying));
318
319 lima_submit_add_bo(ctx->pp_submit, res->bo, LIMA_SUBMIT_BO_READ);
320 pipe_resource_reference(&pres, NULL);
321
322 PLBU_CMD_BEGIN(20);
323
324 PLBU_CMD_VIEWPORT_LEFT(0);
325 PLBU_CMD_VIEWPORT_RIGHT(fui(fb->base.width));
326 PLBU_CMD_VIEWPORT_BOTTOM(0);
327 PLBU_CMD_VIEWPORT_TOP(fui(fb->base.height));
328
329 PLBU_CMD_RSW_VERTEX_ARRAY(
330 va + lima_reload_render_state_offset,
331 va + lima_reload_gl_pos_offset);
332
333 PLBU_CMD_UNKNOWN2();
334 PLBU_CMD_UNKNOWN1();
335
336 PLBU_CMD_INDICES(screen->pp_buffer->va + pp_shared_index_offset);
337 PLBU_CMD_INDEXED_DEST(va + lima_reload_gl_pos_offset);
338 PLBU_CMD_DRAW_ELEMENTS(0xf, 0, 3);
339
340 PLBU_CMD_END();
341 }
342
343 static void
344 lima_pack_head_plbu_cmd(struct lima_context *ctx)
345 {
346 /* first draw need create a PLBU command header */
347 if (lima_ctx_dirty(ctx))
348 return;
349
350 struct lima_context_framebuffer *fb = &ctx->framebuffer;
351
352 PLBU_CMD_BEGIN(10);
353
354 PLBU_CMD_UNKNOWN2();
355 PLBU_CMD_BLOCK_STEP(fb->shift_min, fb->shift_h, fb->shift_w);
356 PLBU_CMD_TILED_DIMENSIONS(fb->tiled_w, fb->tiled_h);
357 PLBU_CMD_BLOCK_STRIDE(fb->block_w);
358
359 PLBU_CMD_ARRAY_ADDRESS(
360 ctx->plb_gp_stream->va + ctx->plb_index * ctx->plb_gp_size,
361 fb->block_w * fb->block_h);
362
363 PLBU_CMD_END();
364
365 if (lima_fb_need_reload(ctx))
366 lima_pack_reload_plbu_cmd(ctx);
367 }
368
369 static bool
370 lima_is_scissor_zero(struct lima_context *ctx)
371 {
372 if (!ctx->rasterizer || !ctx->rasterizer->base.scissor)
373 return false;
374
375 struct pipe_scissor_state *scissor = &ctx->scissor;
376 return
377 scissor->minx == scissor->maxx
378 && scissor->miny == scissor->maxy;
379 }
380
381 static void
382 hilbert_rotate(int n, int *x, int *y, int rx, int ry)
383 {
384 if (ry == 0) {
385 if (rx == 1) {
386 *x = n-1 - *x;
387 *y = n-1 - *y;
388 }
389
390 /* Swap x and y */
391 int t = *x;
392 *x = *y;
393 *y = t;
394 }
395 }
396
397 static void
398 hilbert_coords(int n, int d, int *x, int *y)
399 {
400 int rx, ry, i, t=d;
401
402 *x = *y = 0;
403
404 for (i = 0; (1 << i) < n; i++) {
405
406 rx = 1 & (t / 2);
407 ry = 1 & (t ^ rx);
408
409 hilbert_rotate(1 << i, x, y, rx, ry);
410
411 *x += rx << i;
412 *y += ry << i;
413
414 t /= 4;
415 }
416 }
417
418 static int
419 lima_get_pp_stream_size(int num_pp, int tiled_w, int tiled_h, uint32_t *off)
420 {
421 /* carefully calculate each stream start address:
422 * 1. overflow: each stream size may be different due to
423 * fb->tiled_w * fb->tiled_h can't be divided by num_pp,
424 * extra size should be added to the preceeding stream
425 * 2. alignment: each stream address should be 0x20 aligned
426 */
427 int delta = tiled_w * tiled_h / num_pp * 16 + 8;
428 int remain = tiled_w * tiled_h % num_pp;
429 int offset = 0;
430
431 for (int i = 0; i < num_pp; i++) {
432 off[i] = offset;
433
434 offset += delta;
435 if (remain) {
436 offset += 16;
437 remain--;
438 }
439 offset = align(offset, 0x20);
440 }
441
442 return offset;
443 }
444
445 static bool
446 inside_damage_region(int x, int y, struct lima_damage_region *ds)
447 {
448 if (!ds || !ds->region)
449 return true;
450
451 for (int i = 0; i < ds->num_region; i++) {
452 struct pipe_scissor_state *ss = ds->region + i;
453 if (x >= ss->minx && x < ss->maxx &&
454 y >= ss->miny && y < ss->maxy)
455 return true;
456 }
457
458 return false;
459 }
460
461 static void
462 lima_update_pp_stream(struct lima_context *ctx, int off_x, int off_y,
463 int tiled_w, int tiled_h)
464 {
465 struct lima_pp_stream_state *ps = &ctx->pp_stream;
466 struct lima_context_framebuffer *fb = &ctx->framebuffer;
467 struct lima_damage_region *damage = lima_ctx_get_damage(ctx);
468 struct lima_screen *screen = lima_screen(ctx->base.screen);
469 int i, num_pp = screen->num_pp;
470
471 /* use hilbert_coords to generates 1D to 2D relationship.
472 * 1D for pp stream index and 2D for plb block x/y on framebuffer.
473 * if multi pp, interleave the 1D index to make each pp's render target
474 * close enough which should result close workload
475 */
476 int max = MAX2(tiled_w, tiled_h);
477 int dim = util_logbase2_ceil(max);
478 int count = 1 << (dim + dim);
479 int index = 0;
480 uint32_t *stream[4];
481 int si[4] = {0};
482
483 for (i = 0; i < num_pp; i++)
484 stream[i] = ps->bo->map + ps->bo_offset + ps->offset[i];
485
486 for (i = 0; i < count; i++) {
487 int x, y;
488 hilbert_coords(max, i, &x, &y);
489 if (x < tiled_w && y < tiled_h) {
490 x += off_x;
491 y += off_y;
492
493 if (!inside_damage_region(x, y, damage))
494 continue;
495
496 int pp = index % num_pp;
497 int offset = ((y >> fb->shift_h) * fb->block_w +
498 (x >> fb->shift_w)) * LIMA_CTX_PLB_BLK_SIZE;
499 int plb_va = ctx->plb[ctx->plb_index]->va + offset;
500
501 stream[pp][si[pp]++] = 0;
502 stream[pp][si[pp]++] = 0xB8000000 | x | (y << 8);
503 stream[pp][si[pp]++] = 0xE0000002 | ((plb_va >> 3) & ~0xE0000003);
504 stream[pp][si[pp]++] = 0xB0000000;
505
506 index++;
507 }
508 }
509
510 for (i = 0; i < num_pp; i++) {
511 stream[i][si[i]++] = 0;
512 stream[i][si[i]++] = 0xBC000000;
513
514 lima_dump_command_stream_print(
515 stream[i], si[i] * 4, false, "pp plb stream %d at va %x\n",
516 i, ps->bo->va + ps->bo_offset + ps->offset[i]);
517 }
518 }
519
520 static void
521 lima_update_damage_pp_stream(struct lima_context *ctx)
522 {
523 struct lima_damage_region *ds = lima_ctx_get_damage(ctx);
524 struct pipe_scissor_state *bound = &ds->bound;
525
526 int tiled_w = bound->maxx - bound->minx;
527 int tiled_h = bound->maxy - bound->miny;
528 struct lima_screen *screen = lima_screen(ctx->base.screen);
529 int size = lima_get_pp_stream_size(
530 screen->num_pp, tiled_w, tiled_h, ctx->pp_stream.offset);
531
532 void *cpu;
533 unsigned offset;
534 struct pipe_resource *pres = NULL;
535 u_upload_alloc(ctx->uploader, 0, size, 0x40, &offset, &pres, &cpu);
536
537 struct lima_resource *res = lima_resource(pres);
538 ctx->pp_stream.bo = res->bo;
539 ctx->pp_stream.bo_offset = offset;
540
541 lima_update_pp_stream(ctx, bound->minx, bound->miny, tiled_w, tiled_h);
542
543 lima_submit_add_bo(ctx->pp_submit, res->bo, LIMA_SUBMIT_BO_READ);
544 pipe_resource_reference(&pres, NULL);
545 }
546
547 static void
548 lima_update_full_pp_stream(struct lima_context *ctx)
549 {
550 struct lima_context_framebuffer *fb = &ctx->framebuffer;
551 struct lima_ctx_plb_pp_stream_key key = {
552 .plb_index = ctx->plb_index,
553 .tiled_w = fb->tiled_w,
554 .tiled_h = fb->tiled_h,
555 };
556
557 struct hash_entry *entry =
558 _mesa_hash_table_search(ctx->plb_pp_stream, &key);
559 struct lima_ctx_plb_pp_stream *s = entry->data;
560
561 if (s->bo) {
562 ctx->pp_stream.bo = s->bo;
563 ctx->pp_stream.bo_offset = 0;
564 memcpy(ctx->pp_stream.offset, s->offset, sizeof(s->offset));
565 }
566 else {
567 struct lima_screen *screen = lima_screen(ctx->base.screen);
568 int size = lima_get_pp_stream_size(
569 screen->num_pp, fb->tiled_w, fb->tiled_h, s->offset);
570 s->bo = lima_bo_create(screen, size, 0);
571 lima_bo_map(s->bo);
572
573 ctx->pp_stream.bo = s->bo;
574 ctx->pp_stream.bo_offset = 0;
575 memcpy(ctx->pp_stream.offset, s->offset, sizeof(s->offset));
576
577 lima_update_pp_stream(ctx, 0, 0, fb->tiled_w, fb->tiled_h);
578 }
579
580 lima_submit_add_bo(ctx->pp_submit, s->bo, LIMA_SUBMIT_BO_READ);
581 }
582
583 static void
584 lima_update_submit_bo(struct lima_context *ctx)
585 {
586 if (lima_ctx_dirty(ctx))
587 return;
588
589 struct lima_screen *screen = lima_screen(ctx->base.screen);
590 lima_submit_add_bo(ctx->gp_submit, ctx->plb_gp_stream, LIMA_SUBMIT_BO_READ);
591 lima_submit_add_bo(ctx->gp_submit, ctx->plb[ctx->plb_index], LIMA_SUBMIT_BO_WRITE);
592 lima_submit_add_bo(ctx->gp_submit, ctx->gp_tile_heap[ctx->plb_index], LIMA_SUBMIT_BO_WRITE);
593
594 lima_dump_command_stream_print(
595 ctx->plb_gp_stream->map + ctx->plb_index * ctx->plb_gp_size,
596 ctx->plb_gp_size, false, "gp plb stream at va %x\n",
597 ctx->plb_gp_stream->va + ctx->plb_index * ctx->plb_gp_size);
598
599 struct lima_damage_region *damage = lima_ctx_get_damage(ctx);
600 if (damage && damage->region)
601 lima_update_damage_pp_stream(ctx);
602 else if (ctx->plb_pp_stream)
603 lima_update_full_pp_stream(ctx);
604 else
605 ctx->pp_stream.bo = NULL;
606
607 if (ctx->framebuffer.base.nr_cbufs) {
608 struct lima_resource *res = lima_resource(ctx->framebuffer.base.cbufs[0]->texture);
609 lima_submit_add_bo(ctx->pp_submit, res->bo, LIMA_SUBMIT_BO_WRITE);
610 }
611 if (ctx->framebuffer.base.zsbuf) {
612 struct lima_resource *res = lima_resource(ctx->framebuffer.base.zsbuf->texture);
613 lima_submit_add_bo(ctx->pp_submit, res->bo, LIMA_SUBMIT_BO_WRITE);
614 }
615 lima_submit_add_bo(ctx->pp_submit, ctx->plb[ctx->plb_index], LIMA_SUBMIT_BO_READ);
616 lima_submit_add_bo(ctx->pp_submit, ctx->gp_tile_heap[ctx->plb_index], LIMA_SUBMIT_BO_READ);
617 lima_submit_add_bo(ctx->pp_submit, screen->pp_buffer, LIMA_SUBMIT_BO_READ);
618 }
619
620 static void
621 lima_clear(struct pipe_context *pctx, unsigned buffers,
622 const union pipe_color_union *color, double depth, unsigned stencil)
623 {
624 struct lima_context *ctx = lima_context(pctx);
625
626 lima_flush(ctx);
627
628 /* no need to reload if cleared */
629 if (ctx->framebuffer.base.nr_cbufs && (buffers & PIPE_CLEAR_COLOR0)) {
630 struct lima_surface *surf = lima_surface(ctx->framebuffer.base.cbufs[0]);
631 surf->reload = false;
632 }
633
634 struct lima_context_clear *clear = &ctx->clear;
635 clear->buffers = buffers;
636
637 if (buffers & PIPE_CLEAR_COLOR0) {
638 clear->color_8pc =
639 ((uint32_t)float_to_ubyte(color->f[3]) << 24) |
640 ((uint32_t)float_to_ubyte(color->f[2]) << 16) |
641 ((uint32_t)float_to_ubyte(color->f[1]) << 8) |
642 float_to_ubyte(color->f[0]);
643
644 clear->color_16pc =
645 ((uint64_t)float_to_ushort(color->f[3]) << 48) |
646 ((uint64_t)float_to_ushort(color->f[2]) << 32) |
647 ((uint64_t)float_to_ushort(color->f[1]) << 16) |
648 float_to_ushort(color->f[0]);
649 }
650
651 if (buffers & PIPE_CLEAR_DEPTH)
652 clear->depth = util_pack_z(PIPE_FORMAT_Z24X8_UNORM, depth);
653
654 if (buffers & PIPE_CLEAR_STENCIL)
655 clear->stencil = stencil;
656
657 lima_update_submit_bo(ctx);
658
659 lima_pack_head_plbu_cmd(ctx);
660
661 ctx->dirty |= LIMA_CONTEXT_DIRTY_CLEAR;
662 }
663
664 enum lima_attrib_type {
665 LIMA_ATTRIB_FLOAT = 0x000,
666 /* todo: find out what lives here. */
667 LIMA_ATTRIB_I16 = 0x004,
668 LIMA_ATTRIB_U16 = 0x005,
669 LIMA_ATTRIB_I8 = 0x006,
670 LIMA_ATTRIB_U8 = 0x007,
671 LIMA_ATTRIB_I8N = 0x008,
672 LIMA_ATTRIB_U8N = 0x009,
673 LIMA_ATTRIB_I16N = 0x00A,
674 LIMA_ATTRIB_U16N = 0x00B,
675 /* todo: where is the 32 int */
676 /* todo: find out what lives here. */
677 LIMA_ATTRIB_FIXED = 0x101
678 };
679
680 static enum lima_attrib_type
681 lima_pipe_format_to_attrib_type(enum pipe_format format)
682 {
683 const struct util_format_description *desc = util_format_description(format);
684 int i = util_format_get_first_non_void_channel(format);
685 const struct util_format_channel_description *c = desc->channel + i;
686
687 switch (c->type) {
688 case UTIL_FORMAT_TYPE_FLOAT:
689 return LIMA_ATTRIB_FLOAT;
690 case UTIL_FORMAT_TYPE_FIXED:
691 return LIMA_ATTRIB_FIXED;
692 case UTIL_FORMAT_TYPE_SIGNED:
693 if (c->size == 8) {
694 if (c->normalized)
695 return LIMA_ATTRIB_I8N;
696 else
697 return LIMA_ATTRIB_I8;
698 }
699 else if (c->size == 16) {
700 if (c->normalized)
701 return LIMA_ATTRIB_I16N;
702 else
703 return LIMA_ATTRIB_I16;
704 }
705 break;
706 case UTIL_FORMAT_TYPE_UNSIGNED:
707 if (c->size == 8) {
708 if (c->normalized)
709 return LIMA_ATTRIB_U8N;
710 else
711 return LIMA_ATTRIB_U8;
712 }
713 else if (c->size == 16) {
714 if (c->normalized)
715 return LIMA_ATTRIB_U16N;
716 else
717 return LIMA_ATTRIB_U16;
718 }
719 break;
720 }
721
722 return LIMA_ATTRIB_FLOAT;
723 }
724
725 static void
726 lima_pack_vs_cmd(struct lima_context *ctx, const struct pipe_draw_info *info)
727 {
728 VS_CMD_BEGIN(24);
729
730 if (!info->index_size) {
731 VS_CMD_ARRAYS_SEMAPHORE_BEGIN_1();
732 VS_CMD_ARRAYS_SEMAPHORE_BEGIN_2();
733 }
734
735 int uniform_size = ctx->vs->uniform_pending_offset + ctx->vs->constant_size + 32;
736 VS_CMD_UNIFORMS_ADDRESS(
737 lima_ctx_buff_va(ctx, lima_ctx_buff_gp_uniform, LIMA_CTX_BUFF_SUBMIT_GP),
738 align(uniform_size, 16));
739
740 VS_CMD_SHADER_ADDRESS(ctx->vs->bo->va, ctx->vs->shader_size);
741 VS_CMD_SHADER_INFO(ctx->vs->prefetch, ctx->vs->shader_size);
742
743 int num_outputs = ctx->vs->num_outputs;
744 int num_attributes = ctx->vertex_elements->num_elements;
745 VS_CMD_VARYING_ATTRIBUTE_COUNT(num_outputs, MAX2(1, num_attributes));
746
747 VS_CMD_UNKNOWN1();
748
749 VS_CMD_ATTRIBUTES_ADDRESS(
750 lima_ctx_buff_va(ctx, lima_ctx_buff_gp_attribute_info, LIMA_CTX_BUFF_SUBMIT_GP),
751 MAX2(1, num_attributes));
752
753 VS_CMD_VARYINGS_ADDRESS(
754 lima_ctx_buff_va(ctx, lima_ctx_buff_gp_varying_info, LIMA_CTX_BUFF_SUBMIT_GP),
755 num_outputs);
756
757 unsigned num = info->index_size ? (ctx->max_index - ctx->min_index + 1) : info->count;
758 VS_CMD_DRAW(num, info->index_size);
759
760 VS_CMD_UNKNOWN2();
761
762 VS_CMD_ARRAYS_SEMAPHORE_END(info->index_size);
763
764 VS_CMD_END();
765 }
766
767 static void
768 lima_pack_plbu_cmd(struct lima_context *ctx, const struct pipe_draw_info *info)
769 {
770 struct lima_context_framebuffer *fb = &ctx->framebuffer;
771 struct lima_vs_shader_state *vs = ctx->vs;
772
773 lima_pack_head_plbu_cmd(ctx);
774
775 /* If it's zero scissor, we skip adding all other commands */
776 if (lima_is_scissor_zero(ctx))
777 return;
778
779 PLBU_CMD_BEGIN(32);
780
781 PLBU_CMD_VIEWPORT_LEFT(fui(ctx->viewport.left));
782 PLBU_CMD_VIEWPORT_RIGHT(fui(ctx->viewport.right));
783 PLBU_CMD_VIEWPORT_BOTTOM(fui(ctx->viewport.bottom));
784 PLBU_CMD_VIEWPORT_TOP(fui(ctx->viewport.top));
785
786 if (!info->index_size)
787 PLBU_CMD_ARRAYS_SEMAPHORE_BEGIN();
788
789 int cf = ctx->rasterizer->base.cull_face;
790 int ccw = ctx->rasterizer->base.front_ccw;
791 uint32_t cull = 0;
792 if (cf != PIPE_FACE_NONE) {
793 if (cf & PIPE_FACE_FRONT)
794 cull |= ccw ? 0x00040000 : 0x00020000;
795 if (cf & PIPE_FACE_BACK)
796 cull |= ccw ? 0x00020000 : 0x00040000;
797 }
798
799 if (info->mode == PIPE_PRIM_POINTS && ctx->vs->point_size_idx != -1)
800 PLBU_CMD_PRIMITIVE_SETUP(0x0000, cull, info->index_size);
801 else if (info->mode < PIPE_PRIM_TRIANGLES)
802 PLBU_CMD_PRIMITIVE_SETUP(0x3000, cull, info->index_size);
803 else
804 PLBU_CMD_PRIMITIVE_SETUP(0x2000, cull, info->index_size);
805
806 uint32_t gl_position_va =
807 lima_ctx_buff_va(ctx, lima_ctx_buff_sh_gl_pos,
808 LIMA_CTX_BUFF_SUBMIT_GP | LIMA_CTX_BUFF_SUBMIT_PP);
809 PLBU_CMD_RSW_VERTEX_ARRAY(
810 lima_ctx_buff_va(ctx, lima_ctx_buff_pp_plb_rsw, LIMA_CTX_BUFF_SUBMIT_PP),
811 gl_position_va);
812
813 /* TODO
814 * - we should set it only for the first draw that enabled the scissor and for
815 * latter draw only if scissor is dirty
816 */
817 if (ctx->rasterizer->base.scissor) {
818 struct pipe_scissor_state *scissor = &ctx->scissor;
819 PLBU_CMD_SCISSORS(scissor->minx, scissor->maxx, scissor->miny, scissor->maxy);
820 } else {
821 PLBU_CMD_SCISSORS(0, fb->base.width, 0, fb->base.height);
822 }
823
824 PLBU_CMD_UNKNOWN1();
825
826 PLBU_CMD_DEPTH_RANGE_NEAR(fui(ctx->viewport.near));
827 PLBU_CMD_DEPTH_RANGE_FAR(fui(ctx->viewport.far));
828
829 if ((info->mode == PIPE_PRIM_POINTS && ctx->vs->point_size_idx == -1) ||
830 ((info->mode >= PIPE_PRIM_LINES) && (info->mode < PIPE_PRIM_TRIANGLES)))
831 {
832 uint32_t v = info->mode == PIPE_PRIM_POINTS ?
833 fui(ctx->rasterizer->base.point_size) : fui(ctx->rasterizer->base.line_width);
834 PLBU_CMD_LOW_PRIM_SIZE(v);
835 }
836
837 if (info->index_size) {
838 PLBU_CMD_INDEXED_DEST(gl_position_va);
839 if (vs->point_size_idx != -1) {
840 uint32_t gl_point_size_va =
841 lima_ctx_buff_va(ctx, lima_ctx_buff_sh_gl_point_size,
842 LIMA_CTX_BUFF_SUBMIT_GP |
843 LIMA_CTX_BUFF_SUBMIT_PP);
844 PLBU_CMD_INDEXED_PT_SIZE(gl_point_size_va);
845 }
846
847 PLBU_CMD_INDICES(ctx->index_res->bo->va + info->start * info->index_size + ctx->index_offset);
848 }
849 else {
850 /* can this make the attribute info static? */
851 PLBU_CMD_DRAW_ARRAYS(info->mode, info->start, info->count);
852 }
853
854 PLBU_CMD_ARRAYS_SEMAPHORE_END();
855
856 if (info->index_size)
857 PLBU_CMD_DRAW_ELEMENTS(info->mode, ctx->min_index, info->count);
858
859 PLBU_CMD_END();
860 }
861
862 static int
863 lima_blend_func(enum pipe_blend_func pipe)
864 {
865 switch (pipe) {
866 case PIPE_BLEND_ADD:
867 return 2;
868 case PIPE_BLEND_SUBTRACT:
869 return 0;
870 case PIPE_BLEND_REVERSE_SUBTRACT:
871 return 1;
872 case PIPE_BLEND_MIN:
873 return 4;
874 case PIPE_BLEND_MAX:
875 return 5;
876 }
877 return -1;
878 }
879
880 static int
881 lima_blend_factor(enum pipe_blendfactor pipe)
882 {
883 switch (pipe) {
884 case PIPE_BLENDFACTOR_ONE:
885 return 11;
886 case PIPE_BLENDFACTOR_SRC_COLOR:
887 return 0;
888 case PIPE_BLENDFACTOR_SRC_ALPHA:
889 return 16;
890 case PIPE_BLENDFACTOR_DST_ALPHA:
891 return 17;
892 case PIPE_BLENDFACTOR_DST_COLOR:
893 return 1;
894 case PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE:
895 return 7;
896 case PIPE_BLENDFACTOR_CONST_COLOR:
897 return 2;
898 case PIPE_BLENDFACTOR_CONST_ALPHA:
899 return 18;
900 case PIPE_BLENDFACTOR_ZERO:
901 return 3;
902 case PIPE_BLENDFACTOR_INV_SRC_COLOR:
903 return 8;
904 case PIPE_BLENDFACTOR_INV_SRC_ALPHA:
905 return 24;
906 case PIPE_BLENDFACTOR_INV_DST_ALPHA:
907 return 25;
908 case PIPE_BLENDFACTOR_INV_DST_COLOR:
909 return 9;
910 case PIPE_BLENDFACTOR_INV_CONST_COLOR:
911 return 10;
912 case PIPE_BLENDFACTOR_INV_CONST_ALPHA:
913 return 26;
914 case PIPE_BLENDFACTOR_SRC1_COLOR:
915 case PIPE_BLENDFACTOR_SRC1_ALPHA:
916 case PIPE_BLENDFACTOR_INV_SRC1_COLOR:
917 case PIPE_BLENDFACTOR_INV_SRC1_ALPHA:
918 return -1; /* not support */
919 }
920 return -1;
921 }
922
923 static int
924 lima_calculate_alpha_blend(enum pipe_blend_func rgb_func, enum pipe_blend_func alpha_func,
925 enum pipe_blendfactor rgb_src_factor, enum pipe_blendfactor rgb_dst_factor,
926 enum pipe_blendfactor alpha_src_factor, enum pipe_blendfactor alpha_dst_factor)
927 {
928 return lima_blend_func(rgb_func) |
929 (lima_blend_func(alpha_func) << 3) |
930 (lima_blend_factor(rgb_src_factor) << 6) |
931 (lima_blend_factor(rgb_dst_factor) << 11) |
932 ((lima_blend_factor(alpha_src_factor) & 0xF) << 16) |
933 ((lima_blend_factor(alpha_dst_factor) & 0xF) << 20) |
934 0x0C000000; /* need check if this GLESv1 glAlphaFunc */
935 }
936
937 #if 0
938 static int
939 lima_stencil_op(enum pipe_stencil_op pipe)
940 {
941 switch (pipe) {
942 case PIPE_STENCIL_OP_KEEP:
943 return 0;
944 case PIPE_STENCIL_OP_ZERO:
945 return 2;
946 case PIPE_STENCIL_OP_REPLACE:
947 return 1;
948 case PIPE_STENCIL_OP_INCR:
949 return 6;
950 case PIPE_STENCIL_OP_DECR:
951 return 7;
952 case PIPE_STENCIL_OP_INCR_WRAP:
953 return 4;
954 case PIPE_STENCIL_OP_DECR_WRAP:
955 return 5;
956 case PIPE_STENCIL_OP_INVERT:
957 return 3;
958 }
959 return -1;
960 }
961 #endif
962
963 static int
964 lima_calculate_depth_test(struct pipe_depth_state *depth, struct pipe_rasterizer_state *rst)
965 {
966 enum pipe_compare_func func = (depth->enabled ? depth->func : PIPE_FUNC_ALWAYS);
967
968 int offset_scale = 0;
969
970 //TODO: implement polygon offset
971 #if 0
972 if (rst->offset_scale < -32)
973 offset_scale = -32;
974 else if (rst->offset_scale > 31)
975 offset_scale = 31;
976 else
977 offset_scale = rst->offset_scale * 4;
978
979 if (offset_scale < 0)
980 offset_scale = 0x100 + offset_scale;
981 #endif
982
983 return (depth->enabled && depth->writemask) |
984 ((int)func << 1) |
985 (offset_scale << 16) |
986 0x30; /* find out what is this */
987 }
988
989 static void
990 lima_pack_render_state(struct lima_context *ctx, const struct pipe_draw_info *info)
991 {
992 struct lima_render_state *render =
993 lima_ctx_buff_alloc(ctx, lima_ctx_buff_pp_plb_rsw,
994 sizeof(*render), true);
995
996 /* do hw support RGBA independ blend?
997 * PIPE_CAP_INDEP_BLEND_ENABLE
998 *
999 * how to handle the no cbuf only zbuf case?
1000 */
1001 struct pipe_rt_blend_state *rt = ctx->blend->base.rt;
1002 render->blend_color_bg = float_to_ubyte(ctx->blend_color.color[2]) |
1003 (float_to_ubyte(ctx->blend_color.color[1]) << 16);
1004 render->blend_color_ra = float_to_ubyte(ctx->blend_color.color[0]) |
1005 (float_to_ubyte(ctx->blend_color.color[3]) << 16);
1006
1007 if (rt->blend_enable) {
1008 render->alpha_blend = lima_calculate_alpha_blend(rt->rgb_func, rt->alpha_func,
1009 rt->rgb_src_factor, rt->rgb_dst_factor,
1010 rt->alpha_src_factor, rt->alpha_dst_factor);
1011 }
1012 else {
1013 /*
1014 * Special handling for blending disabled.
1015 * Binary driver is generating the same alpha_value,
1016 * as when we would just enable blending, without changing/setting any blend equation/params.
1017 * Normaly in this case mesa would set all rt fields (func/factor) to zero.
1018 */
1019 render->alpha_blend = lima_calculate_alpha_blend(PIPE_BLEND_ADD, PIPE_BLEND_ADD,
1020 PIPE_BLENDFACTOR_ONE, PIPE_BLENDFACTOR_ZERO,
1021 PIPE_BLENDFACTOR_ONE, PIPE_BLENDFACTOR_ZERO);
1022 }
1023
1024 render->alpha_blend |= (rt->colormask & PIPE_MASK_RGBA) << 28;
1025
1026 struct pipe_rasterizer_state *rst = &ctx->rasterizer->base;
1027 struct pipe_depth_state *depth = &ctx->zsa->base.depth;
1028 render->depth_test = lima_calculate_depth_test(depth, rst);
1029
1030 /* overlap with plbu? any place can remove one? */
1031 render->depth_range = float_to_ushort(ctx->viewport.near) |
1032 (float_to_ushort(ctx->viewport.far) << 16);
1033
1034 #if 0
1035 struct pipe_stencil_state *stencil = ctx->zsa->base.stencil;
1036 struct pipe_stencil_ref *ref = &ctx->stencil_ref;
1037 render->stencil_front = stencil[0].func |
1038 (lima_stencil_op(stencil[0].fail_op) << 3) |
1039 (lima_stencil_op(stencil[0].zfail_op) << 6) |
1040 (lima_stencil_op(stencil[0].zpass_op) << 9) |
1041 (ref->ref_value[0] << 16) |
1042 (stencil[0].valuemask << 24);
1043 render->stencil_back = stencil[1].func |
1044 (lima_stencil_op(stencil[1].fail_op) << 3) |
1045 (lima_stencil_op(stencil[1].zfail_op) << 6) |
1046 (lima_stencil_op(stencil[1].zpass_op) << 9) |
1047 (ref->ref_value[1] << 16) |
1048 (stencil[1].valuemask << 24);
1049 #else
1050 render->stencil_front = 0xff000007;
1051 render->stencil_back = 0xff000007;
1052 #endif
1053
1054 /* seems not correct? */
1055 //struct pipe_alpha_state *alpha = &ctx->zsa->base.alpha;
1056 render->stencil_test = 0;
1057 //(stencil->enabled ? 0xFF : 0x00) | (float_to_ubyte(alpha->ref_value) << 16)
1058
1059 /* need more investigation */
1060 if (info->mode == PIPE_PRIM_POINTS)
1061 render->multi_sample = 0x0000F007;
1062 else if (info->mode < PIPE_PRIM_TRIANGLES)
1063 render->multi_sample = 0x0000F407;
1064 else
1065 render->multi_sample = 0x0000F807;
1066 if (ctx->framebuffer.base.samples)
1067 render->multi_sample |= 0x68;
1068
1069 render->shader_address =
1070 ctx->fs->bo->va | (((uint32_t *)ctx->fs->bo->map)[0] & 0x1F);
1071
1072 /* seems not needed */
1073 render->uniforms_address = 0x00000000;
1074
1075 render->textures_address = 0x00000000;
1076
1077 /* more investigation */
1078 render->aux0 = 0x00000300 | (ctx->vs->varying_stride >> 3);
1079 render->aux1 = 0x00001000;
1080 if (ctx->blend->base.dither)
1081 render->aux1 |= 0x00002000;
1082
1083 if (ctx->tex_stateobj.num_samplers) {
1084 render->textures_address =
1085 lima_ctx_buff_va(ctx, lima_ctx_buff_pp_tex_desc, LIMA_CTX_BUFF_SUBMIT_PP);
1086 render->aux0 |= ctx->tex_stateobj.num_samplers << 14;
1087 render->aux0 |= 0x20;
1088 }
1089
1090 if (ctx->const_buffer[PIPE_SHADER_FRAGMENT].buffer) {
1091 render->uniforms_address =
1092 lima_ctx_buff_va(ctx, lima_ctx_buff_pp_uniform_array, LIMA_CTX_BUFF_SUBMIT_PP);
1093 uint32_t size = ctx->buffer_state[lima_ctx_buff_pp_uniform].size;
1094 uint32_t bits = 0;
1095 if (size >= 8) {
1096 bits = util_last_bit(size >> 3) - 1;
1097 bits += size & u_bit_consecutive(0, bits + 3) ? 1 : 0;
1098 }
1099 render->uniforms_address |= bits > 0xf ? 0xf : bits;
1100
1101 render->aux0 |= 0x80;
1102 render->aux1 |= 0x10000;
1103 }
1104
1105 if (ctx->vs->num_varyings) {
1106 render->varying_types = 0x00000000;
1107 render->varyings_address = ctx->sh_varying->va;
1108 lima_submit_add_bo(ctx->pp_submit, ctx->sh_varying, LIMA_SUBMIT_BO_READ);
1109 for (int i = 0, index = 0; i < ctx->vs->num_outputs; i++) {
1110 int val;
1111
1112 if (i == ctx->vs->gl_pos_idx ||
1113 i == ctx->vs->point_size_idx)
1114 continue;
1115
1116 struct lima_varying_info *v = ctx->vs->varying + i;
1117 if (v->component_size == 4)
1118 val = v->components > 2 ? 0 : 1;
1119 else
1120 val = v->components > 2 ? 2 : 3;
1121
1122 if (index < 10)
1123 render->varying_types |= val << (3 * index);
1124 else if (index == 10) {
1125 render->varying_types |= val << 30;
1126 render->varyings_address |= val >> 2;
1127 }
1128 else if (index == 11)
1129 render->varyings_address |= val << 1;
1130
1131 index++;
1132 }
1133 }
1134 else {
1135 render->varying_types = 0x00000000;
1136 render->varyings_address = 0x00000000;
1137 }
1138
1139 lima_dump_command_stream_print(
1140 render, sizeof(*render), false, "add render state at va %x\n",
1141 lima_ctx_buff_va(ctx, lima_ctx_buff_pp_plb_rsw, 0));
1142
1143 lima_dump_rsw_command_stream_print(render, sizeof(*render),
1144 lima_ctx_buff_va(ctx, lima_ctx_buff_pp_plb_rsw, 0));
1145
1146 }
1147
1148 static void
1149 lima_update_gp_attribute_info(struct lima_context *ctx, const struct pipe_draw_info *info)
1150 {
1151 struct lima_vertex_element_state *ve = ctx->vertex_elements;
1152 struct lima_context_vertex_buffer *vb = &ctx->vertex_buffers;
1153
1154 uint32_t *attribute =
1155 lima_ctx_buff_alloc(ctx, lima_ctx_buff_gp_attribute_info,
1156 MAX2(1, ve->num_elements) * 8, true);
1157
1158 int n = 0;
1159 for (int i = 0; i < ve->num_elements; i++) {
1160 struct pipe_vertex_element *pve = ve->pipe + i;
1161
1162 assert(pve->vertex_buffer_index < vb->count);
1163 assert(vb->enabled_mask & (1 << pve->vertex_buffer_index));
1164
1165 struct pipe_vertex_buffer *pvb = vb->vb + pve->vertex_buffer_index;
1166 struct lima_resource *res = lima_resource(pvb->buffer.resource);
1167
1168 lima_submit_add_bo(ctx->gp_submit, res->bo, LIMA_SUBMIT_BO_READ);
1169
1170 unsigned start = info->index_size ? (ctx->min_index + info->index_bias) : info->start;
1171 attribute[n++] = res->bo->va + pvb->buffer_offset + pve->src_offset
1172 + start * pvb->stride;
1173 attribute[n++] = (pvb->stride << 11) |
1174 (lima_pipe_format_to_attrib_type(pve->src_format) << 2) |
1175 (util_format_get_nr_components(pve->src_format) - 1);
1176 }
1177
1178 lima_dump_command_stream_print(
1179 attribute, n * 4, false, "update attribute info at va %x\n",
1180 lima_ctx_buff_va(ctx, lima_ctx_buff_gp_attribute_info, 0));
1181 }
1182
1183 static void
1184 lima_update_gp_uniform(struct lima_context *ctx)
1185 {
1186 struct lima_context_constant_buffer *ccb =
1187 ctx->const_buffer + PIPE_SHADER_VERTEX;
1188 struct lima_vs_shader_state *vs = ctx->vs;
1189
1190 int size = vs->uniform_pending_offset + vs->constant_size + 32;
1191 void *vs_const_buff =
1192 lima_ctx_buff_alloc(ctx, lima_ctx_buff_gp_uniform, size, true);
1193
1194 if (ccb->buffer)
1195 memcpy(vs_const_buff, ccb->buffer, ccb->size);
1196
1197 memcpy(vs_const_buff + vs->uniform_pending_offset,
1198 ctx->viewport.transform.scale,
1199 sizeof(ctx->viewport.transform.scale));
1200 memcpy(vs_const_buff + vs->uniform_pending_offset + 16,
1201 ctx->viewport.transform.translate,
1202 sizeof(ctx->viewport.transform.translate));
1203
1204 if (vs->constant)
1205 memcpy(vs_const_buff + vs->uniform_pending_offset + 32,
1206 vs->constant, vs->constant_size);
1207
1208 lima_dump_command_stream_print(
1209 vs_const_buff, size, true,
1210 "update gp uniform at va %x\n",
1211 lima_ctx_buff_va(ctx, lima_ctx_buff_gp_uniform, 0));
1212 }
1213
1214 static void
1215 lima_update_pp_uniform(struct lima_context *ctx)
1216 {
1217 const float *const_buff = ctx->const_buffer[PIPE_SHADER_FRAGMENT].buffer;
1218 size_t const_buff_size = ctx->const_buffer[PIPE_SHADER_FRAGMENT].size / sizeof(float);
1219
1220 if (!const_buff)
1221 return;
1222
1223 uint16_t *fp16_const_buff =
1224 lima_ctx_buff_alloc(ctx, lima_ctx_buff_pp_uniform,
1225 const_buff_size * sizeof(uint16_t), true);
1226
1227 uint32_t *array =
1228 lima_ctx_buff_alloc(ctx, lima_ctx_buff_pp_uniform_array, 4, true);
1229
1230 for (int i = 0; i < const_buff_size; i++)
1231 fp16_const_buff[i] = util_float_to_half(const_buff[i]);
1232
1233 *array = lima_ctx_buff_va(ctx, lima_ctx_buff_pp_uniform, LIMA_CTX_BUFF_SUBMIT_PP);
1234
1235 lima_dump_command_stream_print(
1236 fp16_const_buff, const_buff_size * 2, false, "add pp uniform data at va %x\n",
1237 lima_ctx_buff_va(ctx, lima_ctx_buff_pp_uniform, 0));
1238 lima_dump_command_stream_print(
1239 array, 4, false, "add pp uniform info at va %x\n",
1240 lima_ctx_buff_va(ctx, lima_ctx_buff_pp_uniform_array, 0));
1241 }
1242
1243 static void
1244 lima_update_varying(struct lima_context *ctx, const struct pipe_draw_info *info)
1245 {
1246 struct lima_screen *screen = lima_screen(ctx->base.screen);
1247 struct lima_vs_shader_state *vs = ctx->vs;
1248
1249 uint32_t *varying =
1250 lima_ctx_buff_alloc(ctx, lima_ctx_buff_gp_varying_info,
1251 vs->num_outputs * 8, true);
1252 int n = 0;
1253
1254 /* should be LIMA_SUBMIT_BO_WRITE for GP, but each draw will use
1255 * different part of this bo, so no need to set exclusive constraint */
1256 lima_ctx_buff_alloc(ctx, lima_ctx_buff_sh_gl_pos,
1257 4 * 4 * info->count, false);
1258
1259 int offset = 0;
1260
1261 for (int i = 0; i < vs->num_outputs; i++) {
1262 struct lima_varying_info *v = vs->varying + i;
1263
1264 if (i == vs->gl_pos_idx ||
1265 i == vs->point_size_idx)
1266 continue;
1267
1268 int size = v->component_size * 4;
1269
1270 /* does component_size == 2 need to be 16 aligned? */
1271 if (v->component_size == 4)
1272 offset = align(offset, 16);
1273
1274 v->offset = offset;
1275 offset += size;
1276 }
1277
1278 vs->varying_stride = align(offset, 16);
1279
1280 if (vs->num_varyings) {
1281 /* sh_varying can be too large for the suballocators, so create a
1282 * separate bo for it. The bo cache should prevent a performance hit. */
1283 ctx->sh_varying = lima_bo_create(screen,
1284 vs->varying_stride * info->count, 0);
1285 assert(ctx->sh_varying);
1286 lima_submit_add_bo(ctx->gp_submit, ctx->sh_varying, LIMA_SUBMIT_BO_WRITE);
1287 }
1288
1289 for (int i = 0; i < vs->num_outputs; i++) {
1290 struct lima_varying_info *v = vs->varying + i;
1291
1292 if (i == vs->gl_pos_idx) {
1293 /* gl_Position */
1294 varying[n++] =
1295 lima_ctx_buff_va(ctx, lima_ctx_buff_sh_gl_pos,
1296 LIMA_CTX_BUFF_SUBMIT_GP | LIMA_CTX_BUFF_SUBMIT_PP);
1297 varying[n++] = 0x8020;
1298 } else if (i == vs->point_size_idx) {
1299 /* gl_PointSize */
1300 lima_ctx_buff_alloc(ctx, lima_ctx_buff_sh_gl_point_size,
1301 4 * info->count, false);
1302 varying[n++] =
1303 lima_ctx_buff_va(ctx, lima_ctx_buff_sh_gl_point_size,
1304 LIMA_CTX_BUFF_SUBMIT_GP | LIMA_CTX_BUFF_SUBMIT_PP);
1305 varying[n++] = 0x2021;
1306 } else {
1307 /* Varying */
1308 varying[n++] = ctx->sh_varying->va + v->offset;
1309 varying[n++] = (vs->varying_stride << 11) | (v->components - 1) |
1310 (v->component_size == 2 ? 0x0C : 0);
1311 }
1312 }
1313
1314 lima_dump_command_stream_print(
1315 varying, n * 4, false, "update varying info at va %x\n",
1316 lima_ctx_buff_va(ctx, lima_ctx_buff_gp_varying_info, 0));
1317 }
1318
1319 static void
1320 lima_draw_vbo(struct pipe_context *pctx, const struct pipe_draw_info *info)
1321 {
1322 /* check if draw mode and vertex/index count match,
1323 * otherwise gp will hang */
1324 if (!u_trim_pipe_prim(info->mode, (unsigned*)&info->count)) {
1325 debug_printf("draw mode and vertex/index count mismatch\n");
1326 return;
1327 }
1328
1329 struct lima_context *ctx = lima_context(pctx);
1330 struct pipe_resource *indexbuf = NULL;
1331
1332 if (!ctx->vs || !ctx->fs) {
1333 debug_warn_once("no shader, skip draw\n");
1334 return;
1335 }
1336
1337 if (!lima_update_vs_state(ctx) || !lima_update_fs_state(ctx))
1338 return;
1339
1340 if (info->index_size) {
1341 if (info->has_user_indices) {
1342 util_upload_index_buffer(&ctx->base, info, &indexbuf, &ctx->index_offset, 0x40);
1343 ctx->index_res = lima_resource(indexbuf);
1344 }
1345 else
1346 ctx->index_res = lima_resource(info->index.resource);
1347
1348 lima_submit_add_bo(ctx->gp_submit, ctx->index_res->bo, LIMA_SUBMIT_BO_READ);
1349 }
1350
1351 lima_dump_command_stream_print(
1352 ctx->vs->bo->map, ctx->vs->shader_size, false,
1353 "add vs at va %x\n", ctx->vs->bo->va);
1354
1355 lima_dump_command_stream_print(
1356 ctx->fs->bo->map, ctx->fs->shader_size, false,
1357 "add fs at va %x\n", ctx->fs->bo->va);
1358
1359 lima_submit_add_bo(ctx->gp_submit, ctx->vs->bo, LIMA_SUBMIT_BO_READ);
1360 lima_submit_add_bo(ctx->pp_submit, ctx->fs->bo, LIMA_SUBMIT_BO_READ);
1361
1362 lima_update_submit_bo(ctx);
1363
1364 /* Mali Utgard GPU always need min/max index info for index draw,
1365 * compute it if upper layer does not do for us */
1366 if (info->index_size && info->max_index == ~0u)
1367 u_vbuf_get_minmax_index(pctx, info, &ctx->min_index, &ctx->max_index);
1368 else {
1369 ctx->min_index = info->min_index;
1370 ctx->max_index = info->max_index;
1371 }
1372
1373 lima_update_gp_attribute_info(ctx, info);
1374
1375 if ((ctx->dirty & LIMA_CONTEXT_DIRTY_CONST_BUFF &&
1376 ctx->const_buffer[PIPE_SHADER_VERTEX].dirty) ||
1377 ctx->dirty & LIMA_CONTEXT_DIRTY_VIEWPORT ||
1378 ctx->dirty & LIMA_CONTEXT_DIRTY_SHADER_VERT) {
1379 lima_update_gp_uniform(ctx);
1380 ctx->const_buffer[PIPE_SHADER_VERTEX].dirty = false;
1381 }
1382
1383 lima_update_varying(ctx, info);
1384
1385 /* If it's zero scissor, don't build vs cmd list */
1386 if (!lima_is_scissor_zero(ctx))
1387 lima_pack_vs_cmd(ctx, info);
1388
1389 if (ctx->dirty & LIMA_CONTEXT_DIRTY_CONST_BUFF &&
1390 ctx->const_buffer[PIPE_SHADER_FRAGMENT].dirty) {
1391 lima_update_pp_uniform(ctx);
1392 ctx->const_buffer[PIPE_SHADER_FRAGMENT].dirty = false;
1393 }
1394
1395 if (ctx->dirty & LIMA_CONTEXT_DIRTY_TEXTURES)
1396 lima_update_textures(ctx);
1397
1398 lima_pack_render_state(ctx, info);
1399 lima_pack_plbu_cmd(ctx, info);
1400
1401 if (ctx->sh_varying) {
1402 lima_bo_unreference(ctx->sh_varying); /* held by submit */
1403 ctx->sh_varying = NULL;
1404 }
1405
1406 ctx->dirty = 0;
1407
1408 if (indexbuf)
1409 pipe_resource_reference(&indexbuf, NULL);
1410 }
1411
1412 static void
1413 lima_finish_plbu_cmd(struct lima_context *ctx)
1414 {
1415 int i = 0;
1416 uint32_t *plbu_cmd = util_dynarray_ensure_cap(&ctx->plbu_cmd_array, ctx->plbu_cmd_array.size + 2 * 4);
1417
1418 plbu_cmd[i++] = 0x00000000;
1419 plbu_cmd[i++] = 0x50000000; /* END */
1420
1421 ctx->plbu_cmd_array.size += i * 4;
1422 }
1423
1424 static void
1425 lima_pack_wb_zsbuf_reg(struct lima_context *ctx, uint32_t *wb_reg, int wb_idx)
1426 {
1427 struct lima_context_framebuffer *fb = &ctx->framebuffer;
1428 struct lima_resource *res = lima_resource(fb->base.zsbuf->texture);
1429 int level = fb->base.zsbuf->u.tex.level;
1430 uint32_t format = lima_format_get_pixel(fb->base.zsbuf->format);
1431
1432 struct lima_pp_wb_reg *wb = (void *)wb_reg;
1433 wb[wb_idx].type = 0x01; /* 1 for depth, stencil */
1434 wb[wb_idx].address = res->bo->va + res->levels[level].offset;
1435 wb[wb_idx].pixel_format = format;
1436 if (res->tiled) {
1437 wb[wb_idx].pixel_layout = 0x2;
1438 wb[wb_idx].pitch = fb->tiled_w;
1439 } else {
1440 wb[wb_idx].pixel_layout = 0x0;
1441 wb[wb_idx].pitch = res->levels[level].stride / 8;
1442 }
1443 wb[wb_idx].mrt_bits = 0;
1444 }
1445
1446 static void
1447 lima_pack_wb_cbuf_reg(struct lima_context *ctx, uint32_t *wb_reg, int wb_idx)
1448 {
1449 struct lima_context_framebuffer *fb = &ctx->framebuffer;
1450 struct lima_resource *res = lima_resource(fb->base.cbufs[0]->texture);
1451 int level = fb->base.cbufs[0]->u.tex.level;
1452 unsigned layer = fb->base.cbufs[0]->u.tex.first_layer;
1453 uint32_t format = lima_format_get_pixel(fb->base.cbufs[0]->format);
1454 bool swap_channels = lima_format_get_swap_rb(fb->base.cbufs[0]->format);
1455
1456 struct lima_pp_wb_reg *wb = (void *)wb_reg;
1457 wb[wb_idx].type = 0x02; /* 2 for color buffer */
1458 wb[wb_idx].address = res->bo->va + res->levels[level].offset + layer * res->levels[level].layer_stride;
1459 wb[wb_idx].pixel_format = format;
1460 if (res->tiled) {
1461 wb[wb_idx].pixel_layout = 0x2;
1462 wb[wb_idx].pitch = fb->tiled_w;
1463 } else {
1464 wb[wb_idx].pixel_layout = 0x0;
1465 wb[wb_idx].pitch = res->levels[level].stride / 8;
1466 }
1467 wb[wb_idx].mrt_bits = swap_channels ? 0x4 : 0x0;
1468 }
1469
1470
1471 static void
1472 lima_pack_pp_frame_reg(struct lima_context *ctx, uint32_t *frame_reg,
1473 uint32_t *wb_reg)
1474 {
1475 struct lima_context_framebuffer *fb = &ctx->framebuffer;
1476 struct lima_pp_frame_reg *frame = (void *)frame_reg;
1477 struct lima_screen *screen = lima_screen(ctx->base.screen);
1478 int wb_idx = 0;
1479
1480 frame->render_address = screen->pp_buffer->va + pp_frame_rsw_offset;
1481 frame->flags = 0x02;
1482 frame->clear_value_depth = ctx->clear.depth;
1483 frame->clear_value_stencil = ctx->clear.stencil;
1484 frame->clear_value_color = ctx->clear.color_8pc;
1485 frame->clear_value_color_1 = ctx->clear.color_8pc;
1486 frame->clear_value_color_2 = ctx->clear.color_8pc;
1487 frame->clear_value_color_3 = ctx->clear.color_8pc;
1488 frame->one = 1;
1489
1490 frame->width = fb->base.width - 1;
1491 frame->height = fb->base.height - 1;
1492
1493 /* frame->fragment_stack_address is overwritten per-pp in the kernel
1494 * by the values of pp_frame.fragment_stack_address[i] */
1495
1496 /* These are "stack size" and "stack offset" shifted,
1497 * here they are assumed to be always the same. */
1498 frame->fragment_stack_size = ctx->pp_max_stack_size << 16 | ctx->pp_max_stack_size;
1499
1500 /* related with MSAA and different value when r4p0/r7p0 */
1501 frame->supersampled_height = fb->base.height * 2 - 1;
1502 frame->scale = 0xE0C;
1503
1504 frame->dubya = 0x77;
1505 frame->onscreen = 1;
1506 frame->blocking = (fb->shift_min << 28) | (fb->shift_h << 16) | fb->shift_w;
1507 frame->foureight = 0x8888;
1508
1509 if (fb->base.nr_cbufs)
1510 lima_pack_wb_cbuf_reg(ctx, wb_reg, wb_idx++);
1511
1512 /* Mali4x0 can use on-tile buffer for depth/stencil, so to save some
1513 * memory bandwidth don't write depth/stencil back to memory if we're
1514 * rendering to scanout
1515 */
1516 if (!lima_is_scanout(ctx) && fb->base.zsbuf)
1517 lima_pack_wb_zsbuf_reg(ctx, wb_reg, wb_idx++);
1518 }
1519
1520 static void
1521 _lima_flush(struct lima_context *ctx, bool end_of_frame)
1522 {
1523 #define pp_stack_pp_size 0x400
1524
1525 lima_finish_plbu_cmd(ctx);
1526
1527 int vs_cmd_size = ctx->vs_cmd_array.size;
1528 int plbu_cmd_size = ctx->plbu_cmd_array.size;
1529 uint32_t vs_cmd_va = 0;
1530 uint32_t plbu_cmd_va;
1531
1532 if (vs_cmd_size) {
1533 void *vs_cmd =
1534 lima_ctx_buff_alloc(ctx, lima_ctx_buff_gp_vs_cmd, vs_cmd_size, true);
1535 memcpy(vs_cmd, util_dynarray_begin(&ctx->vs_cmd_array), vs_cmd_size);
1536 util_dynarray_clear(&ctx->vs_cmd_array);
1537 vs_cmd_va = lima_ctx_buff_va(ctx, lima_ctx_buff_gp_vs_cmd,
1538 LIMA_CTX_BUFF_SUBMIT_GP);
1539
1540 lima_dump_command_stream_print(
1541 vs_cmd, vs_cmd_size, false, "flush vs cmd at va %x\n", vs_cmd_va);
1542 lima_dump_vs_command_stream_print(vs_cmd, vs_cmd_size, vs_cmd_va);
1543 }
1544
1545 void *plbu_cmd =
1546 lima_ctx_buff_alloc(ctx, lima_ctx_buff_gp_plbu_cmd, plbu_cmd_size, true);
1547 memcpy(plbu_cmd, util_dynarray_begin(&ctx->plbu_cmd_array), plbu_cmd_size);
1548 util_dynarray_clear(&ctx->plbu_cmd_array);
1549 plbu_cmd_va = lima_ctx_buff_va(ctx, lima_ctx_buff_gp_plbu_cmd,
1550 LIMA_CTX_BUFF_SUBMIT_GP);
1551
1552 lima_dump_command_stream_print(
1553 plbu_cmd, plbu_cmd_size, false, "flush plbu cmd at va %x\n", plbu_cmd_va);
1554 lima_dump_plbu_command_stream_print(plbu_cmd, plbu_cmd_size, plbu_cmd_va);
1555
1556 struct lima_screen *screen = lima_screen(ctx->base.screen);
1557 struct drm_lima_gp_frame gp_frame;
1558 struct lima_gp_frame_reg *gp_frame_reg = (void *)gp_frame.frame;
1559 gp_frame_reg->vs_cmd_start = vs_cmd_va;
1560 gp_frame_reg->vs_cmd_end = vs_cmd_va + vs_cmd_size;
1561 gp_frame_reg->plbu_cmd_start = plbu_cmd_va;
1562 gp_frame_reg->plbu_cmd_end = plbu_cmd_va + plbu_cmd_size;
1563 gp_frame_reg->tile_heap_start = ctx->gp_tile_heap[ctx->plb_index]->va;
1564 gp_frame_reg->tile_heap_end = ctx->gp_tile_heap[ctx->plb_index]->va + gp_tile_heap_size;
1565
1566 lima_dump_command_stream_print(
1567 &gp_frame, sizeof(gp_frame), false, "add gp frame\n");
1568
1569 if (!lima_submit_start(ctx->gp_submit, &gp_frame, sizeof(gp_frame)))
1570 fprintf(stderr, "gp submit error\n");
1571
1572 if (lima_dump_command_stream) {
1573 if (lima_submit_wait(ctx->gp_submit, PIPE_TIMEOUT_INFINITE)) {
1574 if (ctx->buffer_state[lima_ctx_buff_sh_gl_pos].res) {
1575 float *pos = lima_ctx_buff_map(ctx, lima_ctx_buff_sh_gl_pos);
1576 lima_dump_command_stream_print(
1577 pos, 4 * 4 * 16, true, "gl_pos dump at va %x\n",
1578 lima_ctx_buff_va(ctx, lima_ctx_buff_sh_gl_pos, 0));
1579 }
1580
1581 uint32_t *plb = lima_bo_map(ctx->plb[ctx->plb_index]);
1582 lima_dump_command_stream_print(
1583 plb, LIMA_CTX_PLB_BLK_SIZE, false, "plb dump at va %x\n",
1584 ctx->plb[ctx->plb_index]->va);
1585 }
1586 else {
1587 fprintf(stderr, "gp submit wait error\n");
1588 exit(1);
1589 }
1590 }
1591
1592 uint32_t pp_stack_va = 0;
1593 if (ctx->pp_max_stack_size) {
1594 lima_ctx_buff_alloc(ctx, lima_ctx_buff_pp_stack, screen->num_pp *
1595 ctx->pp_max_stack_size * pp_stack_pp_size, true);
1596 pp_stack_va = lima_ctx_buff_va(ctx, lima_ctx_buff_pp_stack,
1597 LIMA_CTX_BUFF_SUBMIT_PP);
1598 }
1599
1600 struct lima_pp_stream_state *ps = &ctx->pp_stream;
1601 if (screen->gpu_type == DRM_LIMA_PARAM_GPU_ID_MALI400) {
1602 struct drm_lima_m400_pp_frame pp_frame = {0};
1603 lima_pack_pp_frame_reg(ctx, pp_frame.frame, pp_frame.wb);
1604 pp_frame.num_pp = screen->num_pp;
1605
1606 for (int i = 0; i < screen->num_pp; i++) {
1607 pp_frame.plbu_array_address[i] = ps->bo->va + ps->bo_offset + ps->offset[i];
1608 if (ctx->pp_max_stack_size)
1609 pp_frame.fragment_stack_address[i] = pp_stack_va +
1610 ctx->pp_max_stack_size * pp_stack_pp_size * i;
1611 }
1612
1613 lima_dump_command_stream_print(
1614 &pp_frame, sizeof(pp_frame), false, "add pp frame\n");
1615
1616 if (!lima_submit_start(ctx->pp_submit, &pp_frame, sizeof(pp_frame)))
1617 fprintf(stderr, "pp submit error\n");
1618 }
1619 else {
1620 struct drm_lima_m450_pp_frame pp_frame = {0};
1621 lima_pack_pp_frame_reg(ctx, pp_frame.frame, pp_frame.wb);
1622 pp_frame.num_pp = screen->num_pp;
1623
1624 if (ctx->pp_max_stack_size)
1625 for (int i = 0; i < screen->num_pp; i++)
1626 pp_frame.fragment_stack_address[i] = pp_stack_va +
1627 ctx->pp_max_stack_size * pp_stack_pp_size * i;
1628
1629 if (ps->bo) {
1630 for (int i = 0; i < screen->num_pp; i++)
1631 pp_frame.plbu_array_address[i] = ps->bo->va + ps->bo_offset + ps->offset[i];
1632 }
1633 else {
1634 pp_frame.use_dlbu = true;
1635
1636 struct lima_context_framebuffer *fb = &ctx->framebuffer;
1637 pp_frame.dlbu_regs[0] = ctx->plb[ctx->plb_index]->va;
1638 pp_frame.dlbu_regs[1] = ((fb->tiled_h - 1) << 16) | (fb->tiled_w - 1);
1639 unsigned s = util_logbase2(LIMA_CTX_PLB_BLK_SIZE) - 7;
1640 pp_frame.dlbu_regs[2] = (s << 28) | (fb->shift_h << 16) | fb->shift_w;
1641 pp_frame.dlbu_regs[3] = ((fb->tiled_h - 1) << 24) | ((fb->tiled_w - 1) << 16);
1642 }
1643
1644 lima_dump_command_stream_print(
1645 &pp_frame, sizeof(pp_frame), false, "add pp frame\n");
1646
1647 if (!lima_submit_start(ctx->pp_submit, &pp_frame, sizeof(pp_frame)))
1648 fprintf(stderr, "pp submit error\n");
1649 }
1650
1651 if (lima_dump_command_stream) {
1652 if (!lima_submit_wait(ctx->pp_submit, PIPE_TIMEOUT_INFINITE)) {
1653 fprintf(stderr, "pp wait error\n");
1654 exit(1);
1655 }
1656 }
1657
1658 ctx->plb_index = (ctx->plb_index + 1) % lima_ctx_num_plb;
1659
1660 if (ctx->framebuffer.base.nr_cbufs) {
1661 /* Set reload flag for next draw. It'll be unset if buffer is cleared */
1662 struct lima_surface *surf = lima_surface(ctx->framebuffer.base.cbufs[0]);
1663 surf->reload = true;
1664 }
1665
1666 ctx->pp_max_stack_size = 0;
1667 }
1668
1669 void
1670 lima_flush(struct lima_context *ctx)
1671 {
1672 if (!lima_ctx_dirty(ctx))
1673 return;
1674
1675 _lima_flush(ctx, false);
1676 }
1677
1678 static void
1679 lima_pipe_flush(struct pipe_context *pctx, struct pipe_fence_handle **fence,
1680 unsigned flags)
1681 {
1682 struct lima_context *ctx = lima_context(pctx);
1683 if (lima_ctx_dirty(ctx))
1684 _lima_flush(ctx, flags & PIPE_FLUSH_END_OF_FRAME);
1685
1686 if (fence) {
1687 int fd;
1688 if (lima_submit_get_out_sync(ctx->pp_submit, &fd))
1689 *fence = lima_fence_create(fd);
1690 }
1691 }
1692
1693 void
1694 lima_draw_init(struct lima_context *ctx)
1695 {
1696 ctx->base.clear = lima_clear;
1697 ctx->base.draw_vbo = lima_draw_vbo;
1698 ctx->base.flush = lima_pipe_flush;
1699 }