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lima: fix allocation of GP outputs storage for indexed draw
[mesa.git] / src / gallium / drivers / lima / lima_draw.c
1 /*
2 * Copyright (c) 2011-2013 Luc Verhaegen <libv@skynet.be>
3 * Copyright (c) 2017-2019 Lima Project
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sub license,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the
13 * next paragraph) shall be included in all copies or substantial portions
14 * of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
23 *
24 */
25
26 #include "util/u_math.h"
27 #include "util/format/u_format.h"
28 #include "util/u_debug.h"
29 #include "util/u_half.h"
30 #include "util/u_helpers.h"
31 #include "util/u_inlines.h"
32 #include "util/u_pack_color.h"
33 #include "util/hash_table.h"
34 #include "util/u_split_draw.h"
35 #include "util/u_upload_mgr.h"
36 #include "util/u_prim.h"
37 #include "util/u_vbuf.h"
38
39 #include "lima_context.h"
40 #include "lima_screen.h"
41 #include "lima_resource.h"
42 #include "lima_program.h"
43 #include "lima_bo.h"
44 #include "lima_submit.h"
45 #include "lima_texture.h"
46 #include "lima_util.h"
47 #include "lima_fence.h"
48 #include "lima_format.h"
49
50 #include <drm-uapi/lima_drm.h>
51
52 struct lima_gp_frame_reg {
53 uint32_t vs_cmd_start;
54 uint32_t vs_cmd_end;
55 uint32_t plbu_cmd_start;
56 uint32_t plbu_cmd_end;
57 uint32_t tile_heap_start;
58 uint32_t tile_heap_end;
59 };
60
61 struct lima_pp_frame_reg {
62 uint32_t plbu_array_address;
63 uint32_t render_address;
64 uint32_t unused_0;
65 uint32_t flags;
66 uint32_t clear_value_depth;
67 uint32_t clear_value_stencil;
68 uint32_t clear_value_color;
69 uint32_t clear_value_color_1;
70 uint32_t clear_value_color_2;
71 uint32_t clear_value_color_3;
72 uint32_t width;
73 uint32_t height;
74 uint32_t fragment_stack_address;
75 uint32_t fragment_stack_size;
76 uint32_t unused_1;
77 uint32_t unused_2;
78 uint32_t one;
79 uint32_t supersampled_height;
80 uint32_t dubya;
81 uint32_t onscreen;
82 uint32_t blocking;
83 uint32_t scale;
84 uint32_t foureight;
85 };
86
87 struct lima_pp_wb_reg {
88 uint32_t type;
89 uint32_t address;
90 uint32_t pixel_format;
91 uint32_t downsample_factor;
92 uint32_t pixel_layout;
93 uint32_t pitch;
94 uint32_t mrt_bits;
95 uint32_t mrt_pitch;
96 uint32_t zero;
97 uint32_t unused0;
98 uint32_t unused1;
99 uint32_t unused2;
100 };
101
102 struct lima_render_state {
103 uint32_t blend_color_bg;
104 uint32_t blend_color_ra;
105 uint32_t alpha_blend;
106 uint32_t depth_test;
107 uint32_t depth_range;
108 uint32_t stencil_front;
109 uint32_t stencil_back;
110 uint32_t stencil_test;
111 uint32_t multi_sample;
112 uint32_t shader_address;
113 uint32_t varying_types;
114 uint32_t uniforms_address;
115 uint32_t textures_address;
116 uint32_t aux0;
117 uint32_t aux1;
118 uint32_t varyings_address;
119 };
120
121
122 /* plbu commands */
123 #define PLBU_CMD_BEGIN(max) { \
124 int i = 0, max_n = max; \
125 uint32_t *plbu_cmd = util_dynarray_ensure_cap(&ctx->plbu_cmd_array, ctx->plbu_cmd_array.size + max_n * 4);
126
127 #define PLBU_CMD_END() \
128 assert(i <= max_n); \
129 ctx->plbu_cmd_array.size += i * 4; \
130 }
131
132 #define PLBU_CMD(v1, v2) \
133 do { \
134 plbu_cmd[i++] = v1; \
135 plbu_cmd[i++] = v2; \
136 } while (0)
137
138 #define PLBU_CMD_BLOCK_STEP(shift_min, shift_h, shift_w) \
139 PLBU_CMD(((shift_min) << 28) | ((shift_h) << 16) | (shift_w), 0x1000010C)
140 #define PLBU_CMD_TILED_DIMENSIONS(tiled_w, tiled_h) \
141 PLBU_CMD((((tiled_w) - 1) << 24) | (((tiled_h) - 1) << 8), 0x10000109)
142 #define PLBU_CMD_BLOCK_STRIDE(block_w) PLBU_CMD((block_w) & 0xff, 0x30000000)
143 #define PLBU_CMD_ARRAY_ADDRESS(gp_stream, block_num) \
144 PLBU_CMD(gp_stream, 0x28000000 | ((block_num) - 1) | 1)
145 #define PLBU_CMD_VIEWPORT_LEFT(v) PLBU_CMD(v, 0x10000107)
146 #define PLBU_CMD_VIEWPORT_RIGHT(v) PLBU_CMD(v, 0x10000108)
147 #define PLBU_CMD_VIEWPORT_BOTTOM(v) PLBU_CMD(v, 0x10000105)
148 #define PLBU_CMD_VIEWPORT_TOP(v) PLBU_CMD(v, 0x10000106)
149 #define PLBU_CMD_ARRAYS_SEMAPHORE_BEGIN() PLBU_CMD(0x00010002, 0x60000000)
150 #define PLBU_CMD_ARRAYS_SEMAPHORE_END() PLBU_CMD(0x00010001, 0x60000000)
151 #define PLBU_CMD_PRIMITIVE_SETUP(prim, cull, index_size) \
152 PLBU_CMD(0x200 | (prim) | (cull) | ((index_size) << 9), 0x1000010B)
153 #define PLBU_CMD_RSW_VERTEX_ARRAY(rsw, gl_pos) \
154 PLBU_CMD(rsw, 0x80000000 | ((gl_pos) >> 4))
155 #define PLBU_CMD_SCISSORS(minx, maxx, miny, maxy) \
156 PLBU_CMD(((minx) << 30) | ((maxy) - 1) << 15 | (miny), \
157 0x70000000 | ((maxx) - 1) << 13 | ((minx) >> 2))
158 #define PLBU_CMD_UNKNOWN1() PLBU_CMD(0x00000000, 0x1000010A)
159 #define PLBU_CMD_UNKNOWN2() PLBU_CMD(0x00000200, 0x1000010B)
160 #define PLBU_CMD_LOW_PRIM_SIZE(v) PLBU_CMD(v, 0x1000010D)
161 #define PLBU_CMD_DEPTH_RANGE_NEAR(v) PLBU_CMD(v, 0x1000010E)
162 #define PLBU_CMD_DEPTH_RANGE_FAR(v) PLBU_CMD(v, 0x1000010F)
163 #define PLBU_CMD_INDEXED_DEST(gl_pos) PLBU_CMD(gl_pos, 0x10000100)
164 #define PLBU_CMD_INDEXED_PT_SIZE(pt_size) PLBU_CMD(pt_size, 0x10000102)
165 #define PLBU_CMD_INDICES(va) PLBU_CMD(va, 0x10000101)
166 #define PLBU_CMD_DRAW_ARRAYS(mode, start, count) \
167 PLBU_CMD(((count) << 24) | (start), (((mode) & 0x1F) << 16) | ((count) >> 8))
168 #define PLBU_CMD_DRAW_ELEMENTS(mode, start, count) \
169 PLBU_CMD(((count) << 24) | (start), \
170 0x00200000 | (((mode) & 0x1F) << 16) | ((count) >> 8))
171
172 /* vs commands */
173 #define VS_CMD_BEGIN(max) { \
174 int i = 0, max_n = max; \
175 uint32_t *vs_cmd = util_dynarray_ensure_cap(&ctx->vs_cmd_array, ctx->vs_cmd_array.size + max_n * 4);
176
177 #define VS_CMD_END() \
178 assert(i <= max_n); \
179 ctx->vs_cmd_array.size += i * 4; \
180 }
181
182 #define VS_CMD(v1, v2) \
183 do { \
184 vs_cmd[i++] = v1; \
185 vs_cmd[i++] = v2; \
186 } while (0)
187
188 #define VS_CMD_ARRAYS_SEMAPHORE_BEGIN_1() VS_CMD(0x00028000, 0x50000000)
189 #define VS_CMD_ARRAYS_SEMAPHORE_BEGIN_2() VS_CMD(0x00000001, 0x50000000)
190 #define VS_CMD_ARRAYS_SEMAPHORE_END(index_draw) \
191 VS_CMD((index_draw) ? 0x00018000 : 0x00000000, 0x50000000)
192 #define VS_CMD_UNIFORMS_ADDRESS(addr, size) \
193 VS_CMD(addr, 0x30000000 | ((size) << 12))
194 #define VS_CMD_SHADER_ADDRESS(addr, size) \
195 VS_CMD(addr, 0x40000000 | ((size) << 12))
196 #define VS_CMD_SHADER_INFO(prefetch, size) \
197 VS_CMD(((prefetch) << 20) | ((((size) >> 4) - 1) << 10), 0x10000040)
198 #define VS_CMD_VARYING_ATTRIBUTE_COUNT(nv, na) \
199 VS_CMD((((nv) - 1) << 8) | (((na) - 1) << 24), 0x10000042)
200 #define VS_CMD_UNKNOWN1() VS_CMD(0x00000003, 0x10000041)
201 #define VS_CMD_UNKNOWN2() VS_CMD(0x00000000, 0x60000000)
202 #define VS_CMD_ATTRIBUTES_ADDRESS(addr, na) \
203 VS_CMD(addr, 0x20000000 | ((na) << 17))
204 #define VS_CMD_VARYINGS_ADDRESS(addr, nv) \
205 VS_CMD(addr, 0x20000008 | ((nv) << 17))
206 #define VS_CMD_DRAW(num, index_draw) \
207 VS_CMD(((num) << 24) | ((index_draw) ? 1 : 0), ((num) >> 8))
208
209 static inline bool
210 lima_ctx_dirty(struct lima_context *ctx)
211 {
212 return ctx->plbu_cmd_array.size;
213 }
214
215 static inline struct lima_damage_region *
216 lima_ctx_get_damage(struct lima_context *ctx)
217 {
218 if (!ctx->framebuffer.base.nr_cbufs)
219 return NULL;
220
221 struct lima_surface *surf = lima_surface(ctx->framebuffer.base.cbufs[0]);
222 struct lima_resource *res = lima_resource(surf->base.texture);
223 return &res->damage;
224 }
225
226 static bool
227 lima_fb_need_reload(struct lima_context *ctx)
228 {
229 /* Depth buffer is always discarded */
230 if (!ctx->framebuffer.base.nr_cbufs)
231 return false;
232
233 struct lima_surface *surf = lima_surface(ctx->framebuffer.base.cbufs[0]);
234 struct lima_resource *res = lima_resource(surf->base.texture);
235 if (res->damage.region) {
236 /* for EGL_KHR_partial_update, when EGL_EXT_buffer_age is enabled,
237 * we need to reload damage region, otherwise just want to reload
238 * the region not aligned to tile boundary */
239 //if (!res->damage.aligned)
240 // return true;
241 return true;
242 }
243 else if (surf->reload)
244 return true;
245
246 return false;
247 }
248
249 static void
250 lima_pack_reload_plbu_cmd(struct lima_context *ctx)
251 {
252 #define lima_reload_render_state_offset 0x0000
253 #define lima_reload_gl_pos_offset 0x0040
254 #define lima_reload_varying_offset 0x0080
255 #define lima_reload_tex_desc_offset 0x00c0
256 #define lima_reload_tex_array_offset 0x0100
257 #define lima_reload_buffer_size 0x0140
258
259 void *cpu;
260 unsigned offset;
261 struct pipe_resource *pres = NULL;
262 u_upload_alloc(ctx->uploader, 0, lima_reload_buffer_size,
263 0x40, &offset, &pres, &cpu);
264
265 struct lima_resource *res = lima_resource(pres);
266 uint32_t va = res->bo->va + offset;
267
268 struct lima_screen *screen = lima_screen(ctx->base.screen);
269
270 uint32_t reload_shader_first_instr_size =
271 ((uint32_t *)(screen->pp_buffer->map + pp_reload_program_offset))[0] & 0x1f;
272 uint32_t reload_shader_va = screen->pp_buffer->va + pp_reload_program_offset;
273
274 struct lima_render_state reload_render_state = {
275 .alpha_blend = 0xf03b1ad2,
276 .depth_test = 0x0000000e,
277 .depth_range = 0xffff0000,
278 .stencil_front = 0x00000007,
279 .stencil_back = 0x00000007,
280 .multi_sample = 0x0000f007,
281 .shader_address = reload_shader_va | reload_shader_first_instr_size,
282 .varying_types = 0x00000001,
283 .textures_address = va + lima_reload_tex_array_offset,
284 .aux0 = 0x00004021,
285 .varyings_address = va + lima_reload_varying_offset,
286 };
287 memcpy(cpu + lima_reload_render_state_offset, &reload_render_state,
288 sizeof(reload_render_state));
289
290 struct lima_context_framebuffer *fb = &ctx->framebuffer;
291 lima_tex_desc *td = cpu + lima_reload_tex_desc_offset;
292 memset(td, 0, lima_min_tex_desc_size);
293 lima_texture_desc_set_res(ctx, td, fb->base.cbufs[0]->texture, 0, 0);
294 td->unnorm_coords = 1;
295 td->texture_type = LIMA_TEXTURE_TYPE_2D;
296 td->min_img_filter_nearest = 1;
297 td->mag_img_filter_nearest = 1;
298 td->wrap_s_clamp_to_edge = 1;
299 td->wrap_t_clamp_to_edge = 1;
300 td->unknown_2_2 = 0x1;
301
302 uint32_t *ta = cpu + lima_reload_tex_array_offset;
303 ta[0] = va + lima_reload_tex_desc_offset;
304
305 float reload_gl_pos[] = {
306 fb->base.width, 0, 0, 1,
307 0, 0, 0, 1,
308 0, fb->base.height, 0, 1,
309 };
310 memcpy(cpu + lima_reload_gl_pos_offset, reload_gl_pos,
311 sizeof(reload_gl_pos));
312
313 float reload_varying[] = {
314 fb->base.width, 0, 0, 0,
315 0, fb->base.height, 0, 0,
316 };
317 memcpy(cpu + lima_reload_varying_offset, reload_varying,
318 sizeof(reload_varying));
319
320 lima_submit_add_bo(ctx->pp_submit, res->bo, LIMA_SUBMIT_BO_READ);
321 pipe_resource_reference(&pres, NULL);
322
323 PLBU_CMD_BEGIN(20);
324
325 PLBU_CMD_VIEWPORT_LEFT(0);
326 PLBU_CMD_VIEWPORT_RIGHT(fui(fb->base.width));
327 PLBU_CMD_VIEWPORT_BOTTOM(0);
328 PLBU_CMD_VIEWPORT_TOP(fui(fb->base.height));
329
330 PLBU_CMD_RSW_VERTEX_ARRAY(
331 va + lima_reload_render_state_offset,
332 va + lima_reload_gl_pos_offset);
333
334 PLBU_CMD_UNKNOWN2();
335 PLBU_CMD_UNKNOWN1();
336
337 PLBU_CMD_INDICES(screen->pp_buffer->va + pp_shared_index_offset);
338 PLBU_CMD_INDEXED_DEST(va + lima_reload_gl_pos_offset);
339 PLBU_CMD_DRAW_ELEMENTS(0xf, 0, 3);
340
341 PLBU_CMD_END();
342 }
343
344 static void
345 lima_pack_head_plbu_cmd(struct lima_context *ctx)
346 {
347 /* first draw need create a PLBU command header */
348 if (lima_ctx_dirty(ctx))
349 return;
350
351 struct lima_context_framebuffer *fb = &ctx->framebuffer;
352
353 PLBU_CMD_BEGIN(10);
354
355 PLBU_CMD_UNKNOWN2();
356 PLBU_CMD_BLOCK_STEP(fb->shift_min, fb->shift_h, fb->shift_w);
357 PLBU_CMD_TILED_DIMENSIONS(fb->tiled_w, fb->tiled_h);
358 PLBU_CMD_BLOCK_STRIDE(fb->block_w);
359
360 PLBU_CMD_ARRAY_ADDRESS(
361 ctx->plb_gp_stream->va + ctx->plb_index * ctx->plb_gp_size,
362 fb->block_w * fb->block_h);
363
364 PLBU_CMD_END();
365
366 if (lima_fb_need_reload(ctx))
367 lima_pack_reload_plbu_cmd(ctx);
368 }
369
370 static bool
371 lima_is_scissor_zero(struct lima_context *ctx)
372 {
373 if (!ctx->rasterizer || !ctx->rasterizer->base.scissor)
374 return false;
375
376 struct pipe_scissor_state *scissor = &ctx->scissor;
377 return
378 scissor->minx == scissor->maxx
379 && scissor->miny == scissor->maxy;
380 }
381
382 static void
383 hilbert_rotate(int n, int *x, int *y, int rx, int ry)
384 {
385 if (ry == 0) {
386 if (rx == 1) {
387 *x = n-1 - *x;
388 *y = n-1 - *y;
389 }
390
391 /* Swap x and y */
392 int t = *x;
393 *x = *y;
394 *y = t;
395 }
396 }
397
398 static void
399 hilbert_coords(int n, int d, int *x, int *y)
400 {
401 int rx, ry, i, t=d;
402
403 *x = *y = 0;
404
405 for (i = 0; (1 << i) < n; i++) {
406
407 rx = 1 & (t / 2);
408 ry = 1 & (t ^ rx);
409
410 hilbert_rotate(1 << i, x, y, rx, ry);
411
412 *x += rx << i;
413 *y += ry << i;
414
415 t /= 4;
416 }
417 }
418
419 static int
420 lima_get_pp_stream_size(int num_pp, int tiled_w, int tiled_h, uint32_t *off)
421 {
422 /* carefully calculate each stream start address:
423 * 1. overflow: each stream size may be different due to
424 * fb->tiled_w * fb->tiled_h can't be divided by num_pp,
425 * extra size should be added to the preceeding stream
426 * 2. alignment: each stream address should be 0x20 aligned
427 */
428 int delta = tiled_w * tiled_h / num_pp * 16 + 8;
429 int remain = tiled_w * tiled_h % num_pp;
430 int offset = 0;
431
432 for (int i = 0; i < num_pp; i++) {
433 off[i] = offset;
434
435 offset += delta;
436 if (remain) {
437 offset += 16;
438 remain--;
439 }
440 offset = align(offset, 0x20);
441 }
442
443 return offset;
444 }
445
446 static bool
447 inside_damage_region(int x, int y, struct lima_damage_region *ds)
448 {
449 if (!ds || !ds->region)
450 return true;
451
452 for (int i = 0; i < ds->num_region; i++) {
453 struct pipe_scissor_state *ss = ds->region + i;
454 if (x >= ss->minx && x < ss->maxx &&
455 y >= ss->miny && y < ss->maxy)
456 return true;
457 }
458
459 return false;
460 }
461
462 static void
463 lima_update_pp_stream(struct lima_context *ctx, int off_x, int off_y,
464 int tiled_w, int tiled_h)
465 {
466 struct lima_pp_stream_state *ps = &ctx->pp_stream;
467 struct lima_context_framebuffer *fb = &ctx->framebuffer;
468 struct lima_damage_region *damage = lima_ctx_get_damage(ctx);
469 struct lima_screen *screen = lima_screen(ctx->base.screen);
470 int i, num_pp = screen->num_pp;
471
472 /* use hilbert_coords to generates 1D to 2D relationship.
473 * 1D for pp stream index and 2D for plb block x/y on framebuffer.
474 * if multi pp, interleave the 1D index to make each pp's render target
475 * close enough which should result close workload
476 */
477 int max = MAX2(tiled_w, tiled_h);
478 int dim = util_logbase2_ceil(max);
479 int count = 1 << (dim + dim);
480 int index = 0;
481 uint32_t *stream[4];
482 int si[4] = {0};
483
484 for (i = 0; i < num_pp; i++)
485 stream[i] = ps->bo->map + ps->bo_offset + ps->offset[i];
486
487 for (i = 0; i < count; i++) {
488 int x, y;
489 hilbert_coords(max, i, &x, &y);
490 if (x < tiled_w && y < tiled_h) {
491 x += off_x;
492 y += off_y;
493
494 if (!inside_damage_region(x, y, damage))
495 continue;
496
497 int pp = index % num_pp;
498 int offset = ((y >> fb->shift_h) * fb->block_w +
499 (x >> fb->shift_w)) * LIMA_CTX_PLB_BLK_SIZE;
500 int plb_va = ctx->plb[ctx->plb_index]->va + offset;
501
502 stream[pp][si[pp]++] = 0;
503 stream[pp][si[pp]++] = 0xB8000000 | x | (y << 8);
504 stream[pp][si[pp]++] = 0xE0000002 | ((plb_va >> 3) & ~0xE0000003);
505 stream[pp][si[pp]++] = 0xB0000000;
506
507 index++;
508 }
509 }
510
511 for (i = 0; i < num_pp; i++) {
512 stream[i][si[i]++] = 0;
513 stream[i][si[i]++] = 0xBC000000;
514
515 lima_dump_command_stream_print(
516 stream[i], si[i] * 4, false, "pp plb stream %d at va %x\n",
517 i, ps->bo->va + ps->bo_offset + ps->offset[i]);
518 }
519 }
520
521 static void
522 lima_update_damage_pp_stream(struct lima_context *ctx)
523 {
524 struct lima_damage_region *ds = lima_ctx_get_damage(ctx);
525 struct pipe_scissor_state *bound = &ds->bound;
526
527 int tiled_w = bound->maxx - bound->minx;
528 int tiled_h = bound->maxy - bound->miny;
529 struct lima_screen *screen = lima_screen(ctx->base.screen);
530 int size = lima_get_pp_stream_size(
531 screen->num_pp, tiled_w, tiled_h, ctx->pp_stream.offset);
532
533 void *cpu;
534 unsigned offset;
535 struct pipe_resource *pres = NULL;
536 u_upload_alloc(ctx->uploader, 0, size, 0x40, &offset, &pres, &cpu);
537
538 struct lima_resource *res = lima_resource(pres);
539 ctx->pp_stream.bo = res->bo;
540 ctx->pp_stream.bo_offset = offset;
541
542 lima_update_pp_stream(ctx, bound->minx, bound->miny, tiled_w, tiled_h);
543
544 lima_submit_add_bo(ctx->pp_submit, res->bo, LIMA_SUBMIT_BO_READ);
545 pipe_resource_reference(&pres, NULL);
546 }
547
548 static void
549 lima_update_full_pp_stream(struct lima_context *ctx)
550 {
551 struct lima_context_framebuffer *fb = &ctx->framebuffer;
552 struct lima_ctx_plb_pp_stream_key key = {
553 .plb_index = ctx->plb_index,
554 .tiled_w = fb->tiled_w,
555 .tiled_h = fb->tiled_h,
556 };
557
558 struct hash_entry *entry =
559 _mesa_hash_table_search(ctx->plb_pp_stream, &key);
560 struct lima_ctx_plb_pp_stream *s = entry->data;
561
562 if (s->bo) {
563 ctx->pp_stream.bo = s->bo;
564 ctx->pp_stream.bo_offset = 0;
565 memcpy(ctx->pp_stream.offset, s->offset, sizeof(s->offset));
566 }
567 else {
568 struct lima_screen *screen = lima_screen(ctx->base.screen);
569 int size = lima_get_pp_stream_size(
570 screen->num_pp, fb->tiled_w, fb->tiled_h, s->offset);
571 s->bo = lima_bo_create(screen, size, 0);
572 lima_bo_map(s->bo);
573
574 ctx->pp_stream.bo = s->bo;
575 ctx->pp_stream.bo_offset = 0;
576 memcpy(ctx->pp_stream.offset, s->offset, sizeof(s->offset));
577
578 lima_update_pp_stream(ctx, 0, 0, fb->tiled_w, fb->tiled_h);
579 }
580
581 lima_submit_add_bo(ctx->pp_submit, s->bo, LIMA_SUBMIT_BO_READ);
582 }
583
584 static void
585 lima_update_submit_bo(struct lima_context *ctx)
586 {
587 if (lima_ctx_dirty(ctx))
588 return;
589
590 struct lima_screen *screen = lima_screen(ctx->base.screen);
591 lima_submit_add_bo(ctx->gp_submit, ctx->plb_gp_stream, LIMA_SUBMIT_BO_READ);
592 lima_submit_add_bo(ctx->gp_submit, ctx->plb[ctx->plb_index], LIMA_SUBMIT_BO_WRITE);
593 lima_submit_add_bo(ctx->gp_submit, ctx->gp_tile_heap[ctx->plb_index], LIMA_SUBMIT_BO_WRITE);
594
595 lima_dump_command_stream_print(
596 ctx->plb_gp_stream->map + ctx->plb_index * ctx->plb_gp_size,
597 ctx->plb_gp_size, false, "gp plb stream at va %x\n",
598 ctx->plb_gp_stream->va + ctx->plb_index * ctx->plb_gp_size);
599
600 struct lima_damage_region *damage = lima_ctx_get_damage(ctx);
601 if (damage && damage->region)
602 lima_update_damage_pp_stream(ctx);
603 else if (ctx->plb_pp_stream)
604 lima_update_full_pp_stream(ctx);
605 else
606 ctx->pp_stream.bo = NULL;
607
608 if (ctx->framebuffer.base.nr_cbufs) {
609 struct lima_resource *res = lima_resource(ctx->framebuffer.base.cbufs[0]->texture);
610 lima_submit_add_bo(ctx->pp_submit, res->bo, LIMA_SUBMIT_BO_WRITE);
611 }
612 if (ctx->framebuffer.base.zsbuf) {
613 struct lima_resource *res = lima_resource(ctx->framebuffer.base.zsbuf->texture);
614 lima_submit_add_bo(ctx->pp_submit, res->bo, LIMA_SUBMIT_BO_WRITE);
615 }
616 lima_submit_add_bo(ctx->pp_submit, ctx->plb[ctx->plb_index], LIMA_SUBMIT_BO_READ);
617 lima_submit_add_bo(ctx->pp_submit, ctx->gp_tile_heap[ctx->plb_index], LIMA_SUBMIT_BO_READ);
618 lima_submit_add_bo(ctx->pp_submit, screen->pp_buffer, LIMA_SUBMIT_BO_READ);
619 }
620
621 static void
622 lima_clear(struct pipe_context *pctx, unsigned buffers,
623 const union pipe_color_union *color, double depth, unsigned stencil)
624 {
625 struct lima_context *ctx = lima_context(pctx);
626
627 lima_flush(ctx);
628
629 /* no need to reload if cleared */
630 if (ctx->framebuffer.base.nr_cbufs && (buffers & PIPE_CLEAR_COLOR0)) {
631 struct lima_surface *surf = lima_surface(ctx->framebuffer.base.cbufs[0]);
632 surf->reload = false;
633 }
634
635 struct lima_context_clear *clear = &ctx->clear;
636 clear->buffers = buffers;
637
638 if (buffers & PIPE_CLEAR_COLOR0) {
639 clear->color_8pc =
640 ((uint32_t)float_to_ubyte(color->f[3]) << 24) |
641 ((uint32_t)float_to_ubyte(color->f[2]) << 16) |
642 ((uint32_t)float_to_ubyte(color->f[1]) << 8) |
643 float_to_ubyte(color->f[0]);
644
645 clear->color_16pc =
646 ((uint64_t)float_to_ushort(color->f[3]) << 48) |
647 ((uint64_t)float_to_ushort(color->f[2]) << 32) |
648 ((uint64_t)float_to_ushort(color->f[1]) << 16) |
649 float_to_ushort(color->f[0]);
650 }
651
652 if (buffers & PIPE_CLEAR_DEPTH)
653 clear->depth = util_pack_z(PIPE_FORMAT_Z24X8_UNORM, depth);
654
655 if (buffers & PIPE_CLEAR_STENCIL)
656 clear->stencil = stencil;
657
658 lima_update_submit_bo(ctx);
659
660 lima_pack_head_plbu_cmd(ctx);
661
662 ctx->dirty |= LIMA_CONTEXT_DIRTY_CLEAR;
663 }
664
665 enum lima_attrib_type {
666 LIMA_ATTRIB_FLOAT = 0x000,
667 /* todo: find out what lives here. */
668 LIMA_ATTRIB_I16 = 0x004,
669 LIMA_ATTRIB_U16 = 0x005,
670 LIMA_ATTRIB_I8 = 0x006,
671 LIMA_ATTRIB_U8 = 0x007,
672 LIMA_ATTRIB_I8N = 0x008,
673 LIMA_ATTRIB_U8N = 0x009,
674 LIMA_ATTRIB_I16N = 0x00A,
675 LIMA_ATTRIB_U16N = 0x00B,
676 /* todo: where is the 32 int */
677 /* todo: find out what lives here. */
678 LIMA_ATTRIB_FIXED = 0x101
679 };
680
681 static enum lima_attrib_type
682 lima_pipe_format_to_attrib_type(enum pipe_format format)
683 {
684 const struct util_format_description *desc = util_format_description(format);
685 int i = util_format_get_first_non_void_channel(format);
686 const struct util_format_channel_description *c = desc->channel + i;
687
688 switch (c->type) {
689 case UTIL_FORMAT_TYPE_FLOAT:
690 return LIMA_ATTRIB_FLOAT;
691 case UTIL_FORMAT_TYPE_FIXED:
692 return LIMA_ATTRIB_FIXED;
693 case UTIL_FORMAT_TYPE_SIGNED:
694 if (c->size == 8) {
695 if (c->normalized)
696 return LIMA_ATTRIB_I8N;
697 else
698 return LIMA_ATTRIB_I8;
699 }
700 else if (c->size == 16) {
701 if (c->normalized)
702 return LIMA_ATTRIB_I16N;
703 else
704 return LIMA_ATTRIB_I16;
705 }
706 break;
707 case UTIL_FORMAT_TYPE_UNSIGNED:
708 if (c->size == 8) {
709 if (c->normalized)
710 return LIMA_ATTRIB_U8N;
711 else
712 return LIMA_ATTRIB_U8;
713 }
714 else if (c->size == 16) {
715 if (c->normalized)
716 return LIMA_ATTRIB_U16N;
717 else
718 return LIMA_ATTRIB_U16;
719 }
720 break;
721 }
722
723 return LIMA_ATTRIB_FLOAT;
724 }
725
726 static void
727 lima_pack_vs_cmd(struct lima_context *ctx, const struct pipe_draw_info *info)
728 {
729 VS_CMD_BEGIN(24);
730
731 if (!info->index_size) {
732 VS_CMD_ARRAYS_SEMAPHORE_BEGIN_1();
733 VS_CMD_ARRAYS_SEMAPHORE_BEGIN_2();
734 }
735
736 int uniform_size = ctx->vs->uniform_pending_offset + ctx->vs->constant_size + 32;
737 VS_CMD_UNIFORMS_ADDRESS(
738 lima_ctx_buff_va(ctx, lima_ctx_buff_gp_uniform, LIMA_CTX_BUFF_SUBMIT_GP),
739 align(uniform_size, 16));
740
741 VS_CMD_SHADER_ADDRESS(ctx->vs->bo->va, ctx->vs->shader_size);
742 VS_CMD_SHADER_INFO(ctx->vs->prefetch, ctx->vs->shader_size);
743
744 int num_outputs = ctx->vs->num_outputs;
745 int num_attributes = ctx->vertex_elements->num_elements;
746 VS_CMD_VARYING_ATTRIBUTE_COUNT(num_outputs, MAX2(1, num_attributes));
747
748 VS_CMD_UNKNOWN1();
749
750 VS_CMD_ATTRIBUTES_ADDRESS(
751 lima_ctx_buff_va(ctx, lima_ctx_buff_gp_attribute_info, LIMA_CTX_BUFF_SUBMIT_GP),
752 MAX2(1, num_attributes));
753
754 VS_CMD_VARYINGS_ADDRESS(
755 lima_ctx_buff_va(ctx, lima_ctx_buff_gp_varying_info, LIMA_CTX_BUFF_SUBMIT_GP),
756 num_outputs);
757
758 unsigned num = info->index_size ? (ctx->max_index - ctx->min_index + 1) : info->count;
759 VS_CMD_DRAW(num, info->index_size);
760
761 VS_CMD_UNKNOWN2();
762
763 VS_CMD_ARRAYS_SEMAPHORE_END(info->index_size);
764
765 VS_CMD_END();
766 }
767
768 static void
769 lima_pack_plbu_cmd(struct lima_context *ctx, const struct pipe_draw_info *info)
770 {
771 struct lima_context_framebuffer *fb = &ctx->framebuffer;
772 struct lima_vs_shader_state *vs = ctx->vs;
773
774 lima_pack_head_plbu_cmd(ctx);
775
776 /* If it's zero scissor, we skip adding all other commands */
777 if (lima_is_scissor_zero(ctx))
778 return;
779
780 PLBU_CMD_BEGIN(32);
781
782 PLBU_CMD_VIEWPORT_LEFT(fui(ctx->viewport.left));
783 PLBU_CMD_VIEWPORT_RIGHT(fui(ctx->viewport.right));
784 PLBU_CMD_VIEWPORT_BOTTOM(fui(ctx->viewport.bottom));
785 PLBU_CMD_VIEWPORT_TOP(fui(ctx->viewport.top));
786
787 if (!info->index_size)
788 PLBU_CMD_ARRAYS_SEMAPHORE_BEGIN();
789
790 int cf = ctx->rasterizer->base.cull_face;
791 int ccw = ctx->rasterizer->base.front_ccw;
792 uint32_t cull = 0;
793 if (cf != PIPE_FACE_NONE) {
794 if (cf & PIPE_FACE_FRONT)
795 cull |= ccw ? 0x00040000 : 0x00020000;
796 if (cf & PIPE_FACE_BACK)
797 cull |= ccw ? 0x00020000 : 0x00040000;
798 }
799
800 if (info->mode == PIPE_PRIM_POINTS && ctx->vs->point_size_idx != -1)
801 PLBU_CMD_PRIMITIVE_SETUP(0x0000, cull, info->index_size);
802 else if (info->mode < PIPE_PRIM_TRIANGLES)
803 PLBU_CMD_PRIMITIVE_SETUP(0x3000, cull, info->index_size);
804 else
805 PLBU_CMD_PRIMITIVE_SETUP(0x2000, cull, info->index_size);
806
807 PLBU_CMD_RSW_VERTEX_ARRAY(
808 lima_ctx_buff_va(ctx, lima_ctx_buff_pp_plb_rsw, LIMA_CTX_BUFF_SUBMIT_PP),
809 ctx->gp_output->va);
810
811 /* TODO
812 * - we should set it only for the first draw that enabled the scissor and for
813 * latter draw only if scissor is dirty
814 */
815 if (ctx->rasterizer->base.scissor) {
816 struct pipe_scissor_state *scissor = &ctx->scissor;
817 PLBU_CMD_SCISSORS(scissor->minx, scissor->maxx, scissor->miny, scissor->maxy);
818 } else {
819 PLBU_CMD_SCISSORS(0, fb->base.width, 0, fb->base.height);
820 }
821
822 PLBU_CMD_UNKNOWN1();
823
824 PLBU_CMD_DEPTH_RANGE_NEAR(fui(ctx->viewport.near));
825 PLBU_CMD_DEPTH_RANGE_FAR(fui(ctx->viewport.far));
826
827 if ((info->mode == PIPE_PRIM_POINTS && ctx->vs->point_size_idx == -1) ||
828 ((info->mode >= PIPE_PRIM_LINES) && (info->mode < PIPE_PRIM_TRIANGLES)))
829 {
830 uint32_t v = info->mode == PIPE_PRIM_POINTS ?
831 fui(ctx->rasterizer->base.point_size) : fui(ctx->rasterizer->base.line_width);
832 PLBU_CMD_LOW_PRIM_SIZE(v);
833 }
834
835 if (info->index_size) {
836 PLBU_CMD_INDEXED_DEST(ctx->gp_output->va);
837 if (vs->point_size_idx != -1)
838 PLBU_CMD_INDEXED_PT_SIZE(ctx->gp_output->va + ctx->gp_output_point_size_offt);
839
840 PLBU_CMD_INDICES(ctx->index_res->bo->va + info->start * info->index_size + ctx->index_offset);
841 }
842 else {
843 /* can this make the attribute info static? */
844 PLBU_CMD_DRAW_ARRAYS(info->mode, info->start, info->count);
845 }
846
847 PLBU_CMD_ARRAYS_SEMAPHORE_END();
848
849 if (info->index_size)
850 PLBU_CMD_DRAW_ELEMENTS(info->mode, ctx->min_index, info->count);
851
852 PLBU_CMD_END();
853 }
854
855 static int
856 lima_blend_func(enum pipe_blend_func pipe)
857 {
858 switch (pipe) {
859 case PIPE_BLEND_ADD:
860 return 2;
861 case PIPE_BLEND_SUBTRACT:
862 return 0;
863 case PIPE_BLEND_REVERSE_SUBTRACT:
864 return 1;
865 case PIPE_BLEND_MIN:
866 return 4;
867 case PIPE_BLEND_MAX:
868 return 5;
869 }
870 return -1;
871 }
872
873 static int
874 lima_blend_factor(enum pipe_blendfactor pipe)
875 {
876 switch (pipe) {
877 case PIPE_BLENDFACTOR_ONE:
878 return 11;
879 case PIPE_BLENDFACTOR_SRC_COLOR:
880 return 0;
881 case PIPE_BLENDFACTOR_SRC_ALPHA:
882 return 16;
883 case PIPE_BLENDFACTOR_DST_ALPHA:
884 return 17;
885 case PIPE_BLENDFACTOR_DST_COLOR:
886 return 1;
887 case PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE:
888 return 7;
889 case PIPE_BLENDFACTOR_CONST_COLOR:
890 return 2;
891 case PIPE_BLENDFACTOR_CONST_ALPHA:
892 return 18;
893 case PIPE_BLENDFACTOR_ZERO:
894 return 3;
895 case PIPE_BLENDFACTOR_INV_SRC_COLOR:
896 return 8;
897 case PIPE_BLENDFACTOR_INV_SRC_ALPHA:
898 return 24;
899 case PIPE_BLENDFACTOR_INV_DST_ALPHA:
900 return 25;
901 case PIPE_BLENDFACTOR_INV_DST_COLOR:
902 return 9;
903 case PIPE_BLENDFACTOR_INV_CONST_COLOR:
904 return 10;
905 case PIPE_BLENDFACTOR_INV_CONST_ALPHA:
906 return 26;
907 case PIPE_BLENDFACTOR_SRC1_COLOR:
908 case PIPE_BLENDFACTOR_SRC1_ALPHA:
909 case PIPE_BLENDFACTOR_INV_SRC1_COLOR:
910 case PIPE_BLENDFACTOR_INV_SRC1_ALPHA:
911 return -1; /* not support */
912 }
913 return -1;
914 }
915
916 static int
917 lima_calculate_alpha_blend(enum pipe_blend_func rgb_func, enum pipe_blend_func alpha_func,
918 enum pipe_blendfactor rgb_src_factor, enum pipe_blendfactor rgb_dst_factor,
919 enum pipe_blendfactor alpha_src_factor, enum pipe_blendfactor alpha_dst_factor)
920 {
921 return lima_blend_func(rgb_func) |
922 (lima_blend_func(alpha_func) << 3) |
923 (lima_blend_factor(rgb_src_factor) << 6) |
924 (lima_blend_factor(rgb_dst_factor) << 11) |
925 ((lima_blend_factor(alpha_src_factor) & 0xF) << 16) |
926 ((lima_blend_factor(alpha_dst_factor) & 0xF) << 20) |
927 0x0C000000; /* need check if this GLESv1 glAlphaFunc */
928 }
929
930 #if 0
931 static int
932 lima_stencil_op(enum pipe_stencil_op pipe)
933 {
934 switch (pipe) {
935 case PIPE_STENCIL_OP_KEEP:
936 return 0;
937 case PIPE_STENCIL_OP_ZERO:
938 return 2;
939 case PIPE_STENCIL_OP_REPLACE:
940 return 1;
941 case PIPE_STENCIL_OP_INCR:
942 return 6;
943 case PIPE_STENCIL_OP_DECR:
944 return 7;
945 case PIPE_STENCIL_OP_INCR_WRAP:
946 return 4;
947 case PIPE_STENCIL_OP_DECR_WRAP:
948 return 5;
949 case PIPE_STENCIL_OP_INVERT:
950 return 3;
951 }
952 return -1;
953 }
954 #endif
955
956 static int
957 lima_calculate_depth_test(struct pipe_depth_state *depth, struct pipe_rasterizer_state *rst)
958 {
959 enum pipe_compare_func func = (depth->enabled ? depth->func : PIPE_FUNC_ALWAYS);
960
961 int offset_scale = 0;
962
963 //TODO: implement polygon offset
964 #if 0
965 if (rst->offset_scale < -32)
966 offset_scale = -32;
967 else if (rst->offset_scale > 31)
968 offset_scale = 31;
969 else
970 offset_scale = rst->offset_scale * 4;
971
972 if (offset_scale < 0)
973 offset_scale = 0x100 + offset_scale;
974 #endif
975
976 return (depth->enabled && depth->writemask) |
977 ((int)func << 1) |
978 (offset_scale << 16) |
979 0x30; /* find out what is this */
980 }
981
982 static void
983 lima_pack_render_state(struct lima_context *ctx, const struct pipe_draw_info *info)
984 {
985 struct lima_render_state *render =
986 lima_ctx_buff_alloc(ctx, lima_ctx_buff_pp_plb_rsw,
987 sizeof(*render));
988
989 /* do hw support RGBA independ blend?
990 * PIPE_CAP_INDEP_BLEND_ENABLE
991 *
992 * how to handle the no cbuf only zbuf case?
993 */
994 struct pipe_rt_blend_state *rt = ctx->blend->base.rt;
995 render->blend_color_bg = float_to_ubyte(ctx->blend_color.color[2]) |
996 (float_to_ubyte(ctx->blend_color.color[1]) << 16);
997 render->blend_color_ra = float_to_ubyte(ctx->blend_color.color[0]) |
998 (float_to_ubyte(ctx->blend_color.color[3]) << 16);
999
1000 if (rt->blend_enable) {
1001 render->alpha_blend = lima_calculate_alpha_blend(rt->rgb_func, rt->alpha_func,
1002 rt->rgb_src_factor, rt->rgb_dst_factor,
1003 rt->alpha_src_factor, rt->alpha_dst_factor);
1004 }
1005 else {
1006 /*
1007 * Special handling for blending disabled.
1008 * Binary driver is generating the same alpha_value,
1009 * as when we would just enable blending, without changing/setting any blend equation/params.
1010 * Normaly in this case mesa would set all rt fields (func/factor) to zero.
1011 */
1012 render->alpha_blend = lima_calculate_alpha_blend(PIPE_BLEND_ADD, PIPE_BLEND_ADD,
1013 PIPE_BLENDFACTOR_ONE, PIPE_BLENDFACTOR_ZERO,
1014 PIPE_BLENDFACTOR_ONE, PIPE_BLENDFACTOR_ZERO);
1015 }
1016
1017 render->alpha_blend |= (rt->colormask & PIPE_MASK_RGBA) << 28;
1018
1019 struct pipe_rasterizer_state *rst = &ctx->rasterizer->base;
1020 struct pipe_depth_state *depth = &ctx->zsa->base.depth;
1021 render->depth_test = lima_calculate_depth_test(depth, rst);
1022
1023 /* overlap with plbu? any place can remove one? */
1024 render->depth_range = float_to_ushort(ctx->viewport.near) |
1025 (float_to_ushort(ctx->viewport.far) << 16);
1026
1027 #if 0
1028 struct pipe_stencil_state *stencil = ctx->zsa->base.stencil;
1029 struct pipe_stencil_ref *ref = &ctx->stencil_ref;
1030 render->stencil_front = stencil[0].func |
1031 (lima_stencil_op(stencil[0].fail_op) << 3) |
1032 (lima_stencil_op(stencil[0].zfail_op) << 6) |
1033 (lima_stencil_op(stencil[0].zpass_op) << 9) |
1034 (ref->ref_value[0] << 16) |
1035 (stencil[0].valuemask << 24);
1036 render->stencil_back = stencil[1].func |
1037 (lima_stencil_op(stencil[1].fail_op) << 3) |
1038 (lima_stencil_op(stencil[1].zfail_op) << 6) |
1039 (lima_stencil_op(stencil[1].zpass_op) << 9) |
1040 (ref->ref_value[1] << 16) |
1041 (stencil[1].valuemask << 24);
1042 #else
1043 render->stencil_front = 0xff000007;
1044 render->stencil_back = 0xff000007;
1045 #endif
1046
1047 /* seems not correct? */
1048 //struct pipe_alpha_state *alpha = &ctx->zsa->base.alpha;
1049 render->stencil_test = 0;
1050 //(stencil->enabled ? 0xFF : 0x00) | (float_to_ubyte(alpha->ref_value) << 16)
1051
1052 /* need more investigation */
1053 if (info->mode == PIPE_PRIM_POINTS)
1054 render->multi_sample = 0x0000F007;
1055 else if (info->mode < PIPE_PRIM_TRIANGLES)
1056 render->multi_sample = 0x0000F407;
1057 else
1058 render->multi_sample = 0x0000F807;
1059 if (ctx->framebuffer.base.samples)
1060 render->multi_sample |= 0x68;
1061
1062 render->shader_address =
1063 ctx->fs->bo->va | (((uint32_t *)ctx->fs->bo->map)[0] & 0x1F);
1064
1065 /* seems not needed */
1066 render->uniforms_address = 0x00000000;
1067
1068 render->textures_address = 0x00000000;
1069
1070 /* more investigation */
1071 render->aux0 = 0x00000300 | (ctx->vs->varying_stride >> 3);
1072 render->aux1 = 0x00001000;
1073 if (ctx->blend->base.dither)
1074 render->aux1 |= 0x00002000;
1075
1076 if (ctx->tex_stateobj.num_samplers) {
1077 render->textures_address =
1078 lima_ctx_buff_va(ctx, lima_ctx_buff_pp_tex_desc, LIMA_CTX_BUFF_SUBMIT_PP);
1079 render->aux0 |= ctx->tex_stateobj.num_samplers << 14;
1080 render->aux0 |= 0x20;
1081 }
1082
1083 if (ctx->const_buffer[PIPE_SHADER_FRAGMENT].buffer) {
1084 render->uniforms_address =
1085 lima_ctx_buff_va(ctx, lima_ctx_buff_pp_uniform_array, LIMA_CTX_BUFF_SUBMIT_PP);
1086 uint32_t size = ctx->buffer_state[lima_ctx_buff_pp_uniform].size;
1087 uint32_t bits = 0;
1088 if (size >= 8) {
1089 bits = util_last_bit(size >> 3) - 1;
1090 bits += size & u_bit_consecutive(0, bits + 3) ? 1 : 0;
1091 }
1092 render->uniforms_address |= bits > 0xf ? 0xf : bits;
1093
1094 render->aux0 |= 0x80;
1095 render->aux1 |= 0x10000;
1096 }
1097
1098 if (ctx->vs->num_varyings) {
1099 render->varying_types = 0x00000000;
1100 render->varyings_address = ctx->gp_output->va +
1101 ctx->gp_output_varyings_offt;
1102 for (int i = 0, index = 0; i < ctx->vs->num_outputs; i++) {
1103 int val;
1104
1105 if (i == ctx->vs->gl_pos_idx ||
1106 i == ctx->vs->point_size_idx)
1107 continue;
1108
1109 struct lima_varying_info *v = ctx->vs->varying + i;
1110 if (v->component_size == 4)
1111 val = v->components > 2 ? 0 : 1;
1112 else
1113 val = v->components > 2 ? 2 : 3;
1114
1115 if (index < 10)
1116 render->varying_types |= val << (3 * index);
1117 else if (index == 10) {
1118 render->varying_types |= val << 30;
1119 render->varyings_address |= val >> 2;
1120 }
1121 else if (index == 11)
1122 render->varyings_address |= val << 1;
1123
1124 index++;
1125 }
1126 }
1127 else {
1128 render->varying_types = 0x00000000;
1129 render->varyings_address = 0x00000000;
1130 }
1131
1132 lima_dump_command_stream_print(
1133 render, sizeof(*render), false, "add render state at va %x\n",
1134 lima_ctx_buff_va(ctx, lima_ctx_buff_pp_plb_rsw, 0));
1135
1136 lima_dump_rsw_command_stream_print(render, sizeof(*render),
1137 lima_ctx_buff_va(ctx, lima_ctx_buff_pp_plb_rsw, 0));
1138
1139 }
1140
1141 static void
1142 lima_update_gp_attribute_info(struct lima_context *ctx, const struct pipe_draw_info *info)
1143 {
1144 struct lima_vertex_element_state *ve = ctx->vertex_elements;
1145 struct lima_context_vertex_buffer *vb = &ctx->vertex_buffers;
1146
1147 uint32_t *attribute =
1148 lima_ctx_buff_alloc(ctx, lima_ctx_buff_gp_attribute_info,
1149 MAX2(1, ve->num_elements) * 8);
1150
1151 int n = 0;
1152 for (int i = 0; i < ve->num_elements; i++) {
1153 struct pipe_vertex_element *pve = ve->pipe + i;
1154
1155 assert(pve->vertex_buffer_index < vb->count);
1156 assert(vb->enabled_mask & (1 << pve->vertex_buffer_index));
1157
1158 struct pipe_vertex_buffer *pvb = vb->vb + pve->vertex_buffer_index;
1159 struct lima_resource *res = lima_resource(pvb->buffer.resource);
1160
1161 lima_submit_add_bo(ctx->gp_submit, res->bo, LIMA_SUBMIT_BO_READ);
1162
1163 unsigned start = info->index_size ? (ctx->min_index + info->index_bias) : info->start;
1164 attribute[n++] = res->bo->va + pvb->buffer_offset + pve->src_offset
1165 + start * pvb->stride;
1166 attribute[n++] = (pvb->stride << 11) |
1167 (lima_pipe_format_to_attrib_type(pve->src_format) << 2) |
1168 (util_format_get_nr_components(pve->src_format) - 1);
1169 }
1170
1171 lima_dump_command_stream_print(
1172 attribute, n * 4, false, "update attribute info at va %x\n",
1173 lima_ctx_buff_va(ctx, lima_ctx_buff_gp_attribute_info, 0));
1174 }
1175
1176 static void
1177 lima_update_gp_uniform(struct lima_context *ctx)
1178 {
1179 struct lima_context_constant_buffer *ccb =
1180 ctx->const_buffer + PIPE_SHADER_VERTEX;
1181 struct lima_vs_shader_state *vs = ctx->vs;
1182
1183 int size = vs->uniform_pending_offset + vs->constant_size + 32;
1184 void *vs_const_buff =
1185 lima_ctx_buff_alloc(ctx, lima_ctx_buff_gp_uniform, size);
1186
1187 if (ccb->buffer)
1188 memcpy(vs_const_buff, ccb->buffer, ccb->size);
1189
1190 memcpy(vs_const_buff + vs->uniform_pending_offset,
1191 ctx->viewport.transform.scale,
1192 sizeof(ctx->viewport.transform.scale));
1193 memcpy(vs_const_buff + vs->uniform_pending_offset + 16,
1194 ctx->viewport.transform.translate,
1195 sizeof(ctx->viewport.transform.translate));
1196
1197 if (vs->constant)
1198 memcpy(vs_const_buff + vs->uniform_pending_offset + 32,
1199 vs->constant, vs->constant_size);
1200
1201 lima_dump_command_stream_print(
1202 vs_const_buff, size, true,
1203 "update gp uniform at va %x\n",
1204 lima_ctx_buff_va(ctx, lima_ctx_buff_gp_uniform, 0));
1205 }
1206
1207 static void
1208 lima_update_pp_uniform(struct lima_context *ctx)
1209 {
1210 const float *const_buff = ctx->const_buffer[PIPE_SHADER_FRAGMENT].buffer;
1211 size_t const_buff_size = ctx->const_buffer[PIPE_SHADER_FRAGMENT].size / sizeof(float);
1212
1213 if (!const_buff)
1214 return;
1215
1216 uint16_t *fp16_const_buff =
1217 lima_ctx_buff_alloc(ctx, lima_ctx_buff_pp_uniform,
1218 const_buff_size * sizeof(uint16_t));
1219
1220 uint32_t *array =
1221 lima_ctx_buff_alloc(ctx, lima_ctx_buff_pp_uniform_array, 4);
1222
1223 for (int i = 0; i < const_buff_size; i++)
1224 fp16_const_buff[i] = util_float_to_half(const_buff[i]);
1225
1226 *array = lima_ctx_buff_va(ctx, lima_ctx_buff_pp_uniform, LIMA_CTX_BUFF_SUBMIT_PP);
1227
1228 lima_dump_command_stream_print(
1229 fp16_const_buff, const_buff_size * 2, false, "add pp uniform data at va %x\n",
1230 lima_ctx_buff_va(ctx, lima_ctx_buff_pp_uniform, 0));
1231 lima_dump_command_stream_print(
1232 array, 4, false, "add pp uniform info at va %x\n",
1233 lima_ctx_buff_va(ctx, lima_ctx_buff_pp_uniform_array, 0));
1234 }
1235
1236 static void
1237 lima_update_varying(struct lima_context *ctx, const struct pipe_draw_info *info)
1238 {
1239 struct lima_screen *screen = lima_screen(ctx->base.screen);
1240 struct lima_vs_shader_state *vs = ctx->vs;
1241 uint32_t gp_output_size;
1242 unsigned num = info->index_size ? (ctx->max_index - ctx->min_index + 1) : info->count;
1243
1244 uint32_t *varying =
1245 lima_ctx_buff_alloc(ctx, lima_ctx_buff_gp_varying_info,
1246 vs->num_outputs * 8);
1247 int n = 0;
1248
1249 int offset = 0;
1250
1251 for (int i = 0; i < vs->num_outputs; i++) {
1252 struct lima_varying_info *v = vs->varying + i;
1253
1254 if (i == vs->gl_pos_idx ||
1255 i == vs->point_size_idx)
1256 continue;
1257
1258 int size = v->component_size * 4;
1259
1260 /* does component_size == 2 need to be 16 aligned? */
1261 if (v->component_size == 4)
1262 offset = align(offset, 16);
1263
1264 v->offset = offset;
1265 offset += size;
1266 }
1267
1268 vs->varying_stride = align(offset, 16);
1269
1270 /* gl_Position is always present, allocate space for it */
1271 gp_output_size = align(4 * 4 * num, 0x40);
1272
1273 /* Allocate space for varyings if there're any */
1274 if (vs->num_varyings) {
1275 ctx->gp_output_varyings_offt = gp_output_size;
1276 gp_output_size += align(vs->varying_stride * num, 0x40);
1277 }
1278
1279 /* Allocate space for gl_PointSize if it's there */
1280 if (vs->point_size_idx != -1) {
1281 ctx->gp_output_point_size_offt = gp_output_size;
1282 gp_output_size += 4 * num;
1283 }
1284
1285 /* gp_output can be too large for the suballocator, so create a
1286 * separate bo for it. The bo cache should prevent performance hit.
1287 */
1288 ctx->gp_output = lima_bo_create(screen, gp_output_size, 0);
1289 assert(ctx->gp_output);
1290 lima_submit_add_bo(ctx->gp_submit, ctx->gp_output, LIMA_SUBMIT_BO_WRITE);
1291 lima_submit_add_bo(ctx->pp_submit, ctx->gp_output, LIMA_SUBMIT_BO_READ);
1292
1293 for (int i = 0; i < vs->num_outputs; i++) {
1294 struct lima_varying_info *v = vs->varying + i;
1295
1296 if (i == vs->gl_pos_idx) {
1297 /* gl_Position */
1298 varying[n++] = ctx->gp_output->va;
1299 varying[n++] = 0x8020;
1300 } else if (i == vs->point_size_idx) {
1301 /* gl_PointSize */
1302 varying[n++] = ctx->gp_output->va + ctx->gp_output_point_size_offt;
1303 varying[n++] = 0x2021;
1304 } else {
1305 /* Varying */
1306 varying[n++] = ctx->gp_output->va + ctx->gp_output_varyings_offt +
1307 v->offset;
1308 varying[n++] = (vs->varying_stride << 11) | (v->components - 1) |
1309 (v->component_size == 2 ? 0x0C : 0);
1310 }
1311 }
1312
1313 lima_dump_command_stream_print(
1314 varying, n * 4, false, "update varying info at va %x\n",
1315 lima_ctx_buff_va(ctx, lima_ctx_buff_gp_varying_info, 0));
1316 }
1317
1318 static void
1319 lima_draw_vbo_update(struct pipe_context *pctx,
1320 const struct pipe_draw_info *info)
1321 {
1322 struct lima_context *ctx = lima_context(pctx);
1323
1324 lima_update_submit_bo(ctx);
1325
1326 lima_update_gp_attribute_info(ctx, info);
1327
1328 if ((ctx->dirty & LIMA_CONTEXT_DIRTY_CONST_BUFF &&
1329 ctx->const_buffer[PIPE_SHADER_VERTEX].dirty) ||
1330 ctx->dirty & LIMA_CONTEXT_DIRTY_VIEWPORT ||
1331 ctx->dirty & LIMA_CONTEXT_DIRTY_SHADER_VERT) {
1332 lima_update_gp_uniform(ctx);
1333 ctx->const_buffer[PIPE_SHADER_VERTEX].dirty = false;
1334 }
1335
1336 lima_update_varying(ctx, info);
1337
1338 /* If it's zero scissor, don't build vs cmd list */
1339 if (!lima_is_scissor_zero(ctx))
1340 lima_pack_vs_cmd(ctx, info);
1341
1342 if (ctx->dirty & LIMA_CONTEXT_DIRTY_CONST_BUFF &&
1343 ctx->const_buffer[PIPE_SHADER_FRAGMENT].dirty) {
1344 lima_update_pp_uniform(ctx);
1345 ctx->const_buffer[PIPE_SHADER_FRAGMENT].dirty = false;
1346 }
1347
1348 if (ctx->dirty & LIMA_CONTEXT_DIRTY_TEXTURES)
1349 lima_update_textures(ctx);
1350
1351 lima_pack_render_state(ctx, info);
1352 lima_pack_plbu_cmd(ctx, info);
1353
1354 if (ctx->gp_output) {
1355 lima_bo_unreference(ctx->gp_output); /* held by submit */
1356 ctx->gp_output = NULL;
1357 }
1358
1359 ctx->dirty = 0;
1360 }
1361
1362 static void
1363 lima_draw_vbo_indexed(struct pipe_context *pctx,
1364 const struct pipe_draw_info *info)
1365 {
1366 struct lima_context *ctx = lima_context(pctx);
1367 struct pipe_resource *indexbuf = NULL;
1368
1369 /* Mali Utgard GPU always need min/max index info for index draw,
1370 * compute it if upper layer does not do for us */
1371 if (info->max_index == ~0u)
1372 u_vbuf_get_minmax_index(pctx, info, &ctx->min_index, &ctx->max_index);
1373 else {
1374 ctx->min_index = info->min_index;
1375 ctx->max_index = info->max_index;
1376 }
1377
1378 if (info->has_user_indices) {
1379 util_upload_index_buffer(&ctx->base, info, &indexbuf, &ctx->index_offset, 0x40);
1380 ctx->index_res = lima_resource(indexbuf);
1381 }
1382 else {
1383 ctx->index_res = lima_resource(info->index.resource);
1384 ctx->index_offset = 0;
1385 }
1386
1387 lima_submit_add_bo(ctx->gp_submit, ctx->index_res->bo, LIMA_SUBMIT_BO_READ);
1388 lima_submit_add_bo(ctx->pp_submit, ctx->index_res->bo, LIMA_SUBMIT_BO_READ);
1389 lima_draw_vbo_update(pctx, info);
1390
1391 if (indexbuf)
1392 pipe_resource_reference(&indexbuf, NULL);
1393 }
1394
1395 static void
1396 lima_draw_vbo_count(struct pipe_context *pctx,
1397 const struct pipe_draw_info *info)
1398 {
1399 static const uint32_t max_verts = 65535;
1400
1401 struct pipe_draw_info local_info = *info;
1402 unsigned start = info->start;
1403 unsigned count = info->count;
1404
1405 while (count) {
1406 unsigned this_count = count;
1407 unsigned step;
1408
1409 u_split_draw(info, max_verts, &this_count, &step);
1410
1411 local_info.start = start;
1412 local_info.count = this_count;
1413
1414 lima_draw_vbo_update(pctx, &local_info);
1415
1416 count -= step;
1417 start += step;
1418 }
1419 }
1420
1421 static void
1422 lima_draw_vbo(struct pipe_context *pctx,
1423 const struct pipe_draw_info *info)
1424 {
1425 /* check if draw mode and vertex/index count match,
1426 * otherwise gp will hang */
1427 if (!u_trim_pipe_prim(info->mode, (unsigned*)&info->count)) {
1428 debug_printf("draw mode and vertex/index count mismatch\n");
1429 return;
1430 }
1431
1432 struct lima_context *ctx = lima_context(pctx);
1433
1434 if (!ctx->vs || !ctx->fs) {
1435 debug_warn_once("no shader, skip draw\n");
1436 return;
1437 }
1438
1439 if (!lima_update_vs_state(ctx) || !lima_update_fs_state(ctx))
1440 return;
1441
1442 lima_dump_command_stream_print(
1443 ctx->vs->bo->map, ctx->vs->shader_size, false,
1444 "add vs at va %x\n", ctx->vs->bo->va);
1445
1446 lima_dump_command_stream_print(
1447 ctx->fs->bo->map, ctx->fs->shader_size, false,
1448 "add fs at va %x\n", ctx->fs->bo->va);
1449
1450 lima_submit_add_bo(ctx->gp_submit, ctx->vs->bo, LIMA_SUBMIT_BO_READ);
1451 lima_submit_add_bo(ctx->pp_submit, ctx->fs->bo, LIMA_SUBMIT_BO_READ);
1452
1453 if (info->index_size)
1454 lima_draw_vbo_indexed(pctx, info);
1455 else
1456 lima_draw_vbo_count(pctx, info);
1457 }
1458
1459 static void
1460 lima_finish_plbu_cmd(struct lima_context *ctx)
1461 {
1462 int i = 0;
1463 uint32_t *plbu_cmd = util_dynarray_ensure_cap(&ctx->plbu_cmd_array, ctx->plbu_cmd_array.size + 2 * 4);
1464
1465 plbu_cmd[i++] = 0x00000000;
1466 plbu_cmd[i++] = 0x50000000; /* END */
1467
1468 ctx->plbu_cmd_array.size += i * 4;
1469 }
1470
1471 static void
1472 lima_pack_wb_zsbuf_reg(struct lima_context *ctx, uint32_t *wb_reg, int wb_idx)
1473 {
1474 struct lima_context_framebuffer *fb = &ctx->framebuffer;
1475 struct lima_resource *res = lima_resource(fb->base.zsbuf->texture);
1476 int level = fb->base.zsbuf->u.tex.level;
1477 uint32_t format = lima_format_get_pixel(fb->base.zsbuf->format);
1478
1479 struct lima_pp_wb_reg *wb = (void *)wb_reg;
1480 wb[wb_idx].type = 0x01; /* 1 for depth, stencil */
1481 wb[wb_idx].address = res->bo->va + res->levels[level].offset;
1482 wb[wb_idx].pixel_format = format;
1483 if (res->tiled) {
1484 wb[wb_idx].pixel_layout = 0x2;
1485 wb[wb_idx].pitch = fb->tiled_w;
1486 } else {
1487 wb[wb_idx].pixel_layout = 0x0;
1488 wb[wb_idx].pitch = res->levels[level].stride / 8;
1489 }
1490 wb[wb_idx].mrt_bits = 0;
1491 }
1492
1493 static void
1494 lima_pack_wb_cbuf_reg(struct lima_context *ctx, uint32_t *wb_reg, int wb_idx)
1495 {
1496 struct lima_context_framebuffer *fb = &ctx->framebuffer;
1497 struct lima_resource *res = lima_resource(fb->base.cbufs[0]->texture);
1498 int level = fb->base.cbufs[0]->u.tex.level;
1499 unsigned layer = fb->base.cbufs[0]->u.tex.first_layer;
1500 uint32_t format = lima_format_get_pixel(fb->base.cbufs[0]->format);
1501 bool swap_channels = lima_format_get_swap_rb(fb->base.cbufs[0]->format);
1502
1503 struct lima_pp_wb_reg *wb = (void *)wb_reg;
1504 wb[wb_idx].type = 0x02; /* 2 for color buffer */
1505 wb[wb_idx].address = res->bo->va + res->levels[level].offset + layer * res->levels[level].layer_stride;
1506 wb[wb_idx].pixel_format = format;
1507 if (res->tiled) {
1508 wb[wb_idx].pixel_layout = 0x2;
1509 wb[wb_idx].pitch = fb->tiled_w;
1510 } else {
1511 wb[wb_idx].pixel_layout = 0x0;
1512 wb[wb_idx].pitch = res->levels[level].stride / 8;
1513 }
1514 wb[wb_idx].mrt_bits = swap_channels ? 0x4 : 0x0;
1515 }
1516
1517
1518 static void
1519 lima_pack_pp_frame_reg(struct lima_context *ctx, uint32_t *frame_reg,
1520 uint32_t *wb_reg)
1521 {
1522 struct lima_context_framebuffer *fb = &ctx->framebuffer;
1523 struct lima_pp_frame_reg *frame = (void *)frame_reg;
1524 struct lima_screen *screen = lima_screen(ctx->base.screen);
1525 int wb_idx = 0;
1526
1527 frame->render_address = screen->pp_buffer->va + pp_frame_rsw_offset;
1528 frame->flags = 0x02;
1529 frame->clear_value_depth = ctx->clear.depth;
1530 frame->clear_value_stencil = ctx->clear.stencil;
1531 frame->clear_value_color = ctx->clear.color_8pc;
1532 frame->clear_value_color_1 = ctx->clear.color_8pc;
1533 frame->clear_value_color_2 = ctx->clear.color_8pc;
1534 frame->clear_value_color_3 = ctx->clear.color_8pc;
1535 frame->one = 1;
1536
1537 frame->width = fb->base.width - 1;
1538 frame->height = fb->base.height - 1;
1539
1540 /* frame->fragment_stack_address is overwritten per-pp in the kernel
1541 * by the values of pp_frame.fragment_stack_address[i] */
1542
1543 /* These are "stack size" and "stack offset" shifted,
1544 * here they are assumed to be always the same. */
1545 frame->fragment_stack_size = ctx->pp_max_stack_size << 16 | ctx->pp_max_stack_size;
1546
1547 /* related with MSAA and different value when r4p0/r7p0 */
1548 frame->supersampled_height = fb->base.height * 2 - 1;
1549 frame->scale = 0xE0C;
1550
1551 frame->dubya = 0x77;
1552 frame->onscreen = 1;
1553 frame->blocking = (fb->shift_min << 28) | (fb->shift_h << 16) | fb->shift_w;
1554 frame->foureight = 0x8888;
1555
1556 if (fb->base.nr_cbufs)
1557 lima_pack_wb_cbuf_reg(ctx, wb_reg, wb_idx++);
1558
1559 /* Mali4x0 can use on-tile buffer for depth/stencil, so to save some
1560 * memory bandwidth don't write depth/stencil back to memory if we're
1561 * rendering to scanout
1562 */
1563 if (!lima_is_scanout(ctx) && fb->base.zsbuf)
1564 lima_pack_wb_zsbuf_reg(ctx, wb_reg, wb_idx++);
1565 }
1566
1567 static void
1568 _lima_flush(struct lima_context *ctx, bool end_of_frame)
1569 {
1570 #define pp_stack_pp_size 0x400
1571
1572 lima_finish_plbu_cmd(ctx);
1573
1574 int vs_cmd_size = ctx->vs_cmd_array.size;
1575 int plbu_cmd_size = ctx->plbu_cmd_array.size;
1576 uint32_t vs_cmd_va = 0;
1577 uint32_t plbu_cmd_va;
1578
1579 if (vs_cmd_size) {
1580 void *vs_cmd =
1581 lima_ctx_buff_alloc(ctx, lima_ctx_buff_gp_vs_cmd, vs_cmd_size);
1582 memcpy(vs_cmd, util_dynarray_begin(&ctx->vs_cmd_array), vs_cmd_size);
1583 util_dynarray_clear(&ctx->vs_cmd_array);
1584 vs_cmd_va = lima_ctx_buff_va(ctx, lima_ctx_buff_gp_vs_cmd,
1585 LIMA_CTX_BUFF_SUBMIT_GP);
1586
1587 lima_dump_command_stream_print(
1588 vs_cmd, vs_cmd_size, false, "flush vs cmd at va %x\n", vs_cmd_va);
1589 lima_dump_vs_command_stream_print(vs_cmd, vs_cmd_size, vs_cmd_va);
1590 }
1591
1592 void *plbu_cmd =
1593 lima_ctx_buff_alloc(ctx, lima_ctx_buff_gp_plbu_cmd, plbu_cmd_size);
1594 memcpy(plbu_cmd, util_dynarray_begin(&ctx->plbu_cmd_array), plbu_cmd_size);
1595 util_dynarray_clear(&ctx->plbu_cmd_array);
1596 plbu_cmd_va = lima_ctx_buff_va(ctx, lima_ctx_buff_gp_plbu_cmd,
1597 LIMA_CTX_BUFF_SUBMIT_GP);
1598
1599 lima_dump_command_stream_print(
1600 plbu_cmd, plbu_cmd_size, false, "flush plbu cmd at va %x\n", plbu_cmd_va);
1601 lima_dump_plbu_command_stream_print(plbu_cmd, plbu_cmd_size, plbu_cmd_va);
1602
1603 struct lima_screen *screen = lima_screen(ctx->base.screen);
1604 struct drm_lima_gp_frame gp_frame;
1605 struct lima_gp_frame_reg *gp_frame_reg = (void *)gp_frame.frame;
1606 gp_frame_reg->vs_cmd_start = vs_cmd_va;
1607 gp_frame_reg->vs_cmd_end = vs_cmd_va + vs_cmd_size;
1608 gp_frame_reg->plbu_cmd_start = plbu_cmd_va;
1609 gp_frame_reg->plbu_cmd_end = plbu_cmd_va + plbu_cmd_size;
1610 gp_frame_reg->tile_heap_start = ctx->gp_tile_heap[ctx->plb_index]->va;
1611 gp_frame_reg->tile_heap_end = ctx->gp_tile_heap[ctx->plb_index]->va + gp_tile_heap_size;
1612
1613 lima_dump_command_stream_print(
1614 &gp_frame, sizeof(gp_frame), false, "add gp frame\n");
1615
1616 if (!lima_submit_start(ctx->gp_submit, &gp_frame, sizeof(gp_frame)))
1617 fprintf(stderr, "gp submit error\n");
1618
1619 if (lima_dump_command_stream) {
1620 if (lima_submit_wait(ctx->gp_submit, PIPE_TIMEOUT_INFINITE)) {
1621 if (ctx->gp_output) {
1622 float *pos = lima_bo_map(ctx->gp_output);
1623 lima_dump_command_stream_print(
1624 pos, 4 * 4 * 16, true, "gl_pos dump at va %x\n",
1625 ctx->gp_output->va);
1626 }
1627
1628 uint32_t *plb = lima_bo_map(ctx->plb[ctx->plb_index]);
1629 lima_dump_command_stream_print(
1630 plb, LIMA_CTX_PLB_BLK_SIZE, false, "plb dump at va %x\n",
1631 ctx->plb[ctx->plb_index]->va);
1632 }
1633 else {
1634 fprintf(stderr, "gp submit wait error\n");
1635 exit(1);
1636 }
1637 }
1638
1639 uint32_t pp_stack_va = 0;
1640 if (ctx->pp_max_stack_size) {
1641 lima_ctx_buff_alloc(ctx, lima_ctx_buff_pp_stack, screen->num_pp *
1642 ctx->pp_max_stack_size * pp_stack_pp_size);
1643 pp_stack_va = lima_ctx_buff_va(ctx, lima_ctx_buff_pp_stack,
1644 LIMA_CTX_BUFF_SUBMIT_PP);
1645 }
1646
1647 struct lima_pp_stream_state *ps = &ctx->pp_stream;
1648 if (screen->gpu_type == DRM_LIMA_PARAM_GPU_ID_MALI400) {
1649 struct drm_lima_m400_pp_frame pp_frame = {0};
1650 lima_pack_pp_frame_reg(ctx, pp_frame.frame, pp_frame.wb);
1651 pp_frame.num_pp = screen->num_pp;
1652
1653 for (int i = 0; i < screen->num_pp; i++) {
1654 pp_frame.plbu_array_address[i] = ps->bo->va + ps->bo_offset + ps->offset[i];
1655 if (ctx->pp_max_stack_size)
1656 pp_frame.fragment_stack_address[i] = pp_stack_va +
1657 ctx->pp_max_stack_size * pp_stack_pp_size * i;
1658 }
1659
1660 lima_dump_command_stream_print(
1661 &pp_frame, sizeof(pp_frame), false, "add pp frame\n");
1662
1663 if (!lima_submit_start(ctx->pp_submit, &pp_frame, sizeof(pp_frame)))
1664 fprintf(stderr, "pp submit error\n");
1665 }
1666 else {
1667 struct drm_lima_m450_pp_frame pp_frame = {0};
1668 lima_pack_pp_frame_reg(ctx, pp_frame.frame, pp_frame.wb);
1669 pp_frame.num_pp = screen->num_pp;
1670
1671 if (ctx->pp_max_stack_size)
1672 for (int i = 0; i < screen->num_pp; i++)
1673 pp_frame.fragment_stack_address[i] = pp_stack_va +
1674 ctx->pp_max_stack_size * pp_stack_pp_size * i;
1675
1676 if (ps->bo) {
1677 for (int i = 0; i < screen->num_pp; i++)
1678 pp_frame.plbu_array_address[i] = ps->bo->va + ps->bo_offset + ps->offset[i];
1679 }
1680 else {
1681 pp_frame.use_dlbu = true;
1682
1683 struct lima_context_framebuffer *fb = &ctx->framebuffer;
1684 pp_frame.dlbu_regs[0] = ctx->plb[ctx->plb_index]->va;
1685 pp_frame.dlbu_regs[1] = ((fb->tiled_h - 1) << 16) | (fb->tiled_w - 1);
1686 unsigned s = util_logbase2(LIMA_CTX_PLB_BLK_SIZE) - 7;
1687 pp_frame.dlbu_regs[2] = (s << 28) | (fb->shift_h << 16) | fb->shift_w;
1688 pp_frame.dlbu_regs[3] = ((fb->tiled_h - 1) << 24) | ((fb->tiled_w - 1) << 16);
1689 }
1690
1691 lima_dump_command_stream_print(
1692 &pp_frame, sizeof(pp_frame), false, "add pp frame\n");
1693
1694 if (!lima_submit_start(ctx->pp_submit, &pp_frame, sizeof(pp_frame)))
1695 fprintf(stderr, "pp submit error\n");
1696 }
1697
1698 if (lima_dump_command_stream) {
1699 if (!lima_submit_wait(ctx->pp_submit, PIPE_TIMEOUT_INFINITE)) {
1700 fprintf(stderr, "pp wait error\n");
1701 exit(1);
1702 }
1703 }
1704
1705 ctx->plb_index = (ctx->plb_index + 1) % lima_ctx_num_plb;
1706
1707 if (ctx->framebuffer.base.nr_cbufs) {
1708 /* Set reload flag for next draw. It'll be unset if buffer is cleared */
1709 struct lima_surface *surf = lima_surface(ctx->framebuffer.base.cbufs[0]);
1710 surf->reload = true;
1711 }
1712
1713 ctx->pp_max_stack_size = 0;
1714
1715 lima_dump_file_next();
1716 }
1717
1718 void
1719 lima_flush(struct lima_context *ctx)
1720 {
1721 if (!lima_ctx_dirty(ctx))
1722 return;
1723
1724 _lima_flush(ctx, false);
1725 }
1726
1727 static void
1728 lima_pipe_flush(struct pipe_context *pctx, struct pipe_fence_handle **fence,
1729 unsigned flags)
1730 {
1731 struct lima_context *ctx = lima_context(pctx);
1732 if (lima_ctx_dirty(ctx))
1733 _lima_flush(ctx, flags & PIPE_FLUSH_END_OF_FRAME);
1734
1735 if (fence) {
1736 int fd;
1737 if (lima_submit_get_out_sync(ctx->pp_submit, &fd))
1738 *fence = lima_fence_create(fd);
1739 }
1740 }
1741
1742 void
1743 lima_draw_init(struct lima_context *ctx)
1744 {
1745 ctx->base.clear = lima_clear;
1746 ctx->base.draw_vbo = lima_draw_vbo;
1747 ctx->base.flush = lima_pipe_flush;
1748 }