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438f41385f0dcefc77de21a885f094ba0178df8d
[mesa.git] / src / gallium / drivers / nouveau / nv50 / nv50_state.c
1 /*
2 * Copyright 2010 Christoph Bumiller
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 */
22
23 #include "pipe/p_defines.h"
24 #include "util/u_framebuffer.h"
25 #include "util/u_helpers.h"
26 #include "util/u_inlines.h"
27 #include "util/u_transfer.h"
28 #include "util/format_srgb.h"
29
30 #include "tgsi/tgsi_parse.h"
31
32 #include "nv50/nv50_stateobj.h"
33 #include "nv50/nv50_context.h"
34 #include "nv50/nv50_query_hw.h"
35
36 #include "nv50/nv50_3d.xml.h"
37 #include "nv50/nv50_texture.xml.h"
38
39 #include "nouveau_gldefs.h"
40
41 /* Caveats:
42 * ! pipe_sampler_state.normalized_coords is ignored - rectangle textures will
43 * use non-normalized coordinates, everything else won't
44 * (The relevant bit is in the TIC entry and not the TSC entry.)
45 *
46 * ! pipe_sampler_state.seamless_cube_map is ignored - seamless filtering is
47 * always activated on NVA0 +
48 * (Give me the global bit, otherwise it's not worth the CPU work.)
49 *
50 * ! pipe_sampler_state.border_color is not swizzled according to the texture
51 * swizzle in pipe_sampler_view
52 * (This will be ugly with indirect independent texture/sampler access,
53 * we'd have to emulate the logic in the shader. GL doesn't have that,
54 * D3D doesn't have swizzle, if we knew what we were implementing we'd be
55 * good.)
56 *
57 * ! pipe_rasterizer_state.line_last_pixel is ignored - it is never drawn
58 *
59 * ! pipe_rasterizer_state.flatshade_first also applies to QUADS
60 * (There's a GL query for that, forcing an exception is just ridiculous.)
61 *
62 * ! pipe_rasterizer_state.sprite_coord_enable is masked with 0xff on NVC0
63 * (The hardware only has 8 slots meant for TexCoord and we have to assign
64 * in advance to maintain elegant separate shader objects.)
65 */
66
67 static inline uint32_t
68 nv50_colormask(unsigned mask)
69 {
70 uint32_t ret = 0;
71
72 if (mask & PIPE_MASK_R)
73 ret |= 0x0001;
74 if (mask & PIPE_MASK_G)
75 ret |= 0x0010;
76 if (mask & PIPE_MASK_B)
77 ret |= 0x0100;
78 if (mask & PIPE_MASK_A)
79 ret |= 0x1000;
80
81 return ret;
82 }
83
84 #define NV50_BLEND_FACTOR_CASE(a, b) \
85 case PIPE_BLENDFACTOR_##a: return NV50_BLEND_FACTOR_##b
86
87 static inline uint32_t
88 nv50_blend_fac(unsigned factor)
89 {
90 switch (factor) {
91 NV50_BLEND_FACTOR_CASE(ONE, ONE);
92 NV50_BLEND_FACTOR_CASE(SRC_COLOR, SRC_COLOR);
93 NV50_BLEND_FACTOR_CASE(SRC_ALPHA, SRC_ALPHA);
94 NV50_BLEND_FACTOR_CASE(DST_ALPHA, DST_ALPHA);
95 NV50_BLEND_FACTOR_CASE(DST_COLOR, DST_COLOR);
96 NV50_BLEND_FACTOR_CASE(SRC_ALPHA_SATURATE, SRC_ALPHA_SATURATE);
97 NV50_BLEND_FACTOR_CASE(CONST_COLOR, CONSTANT_COLOR);
98 NV50_BLEND_FACTOR_CASE(CONST_ALPHA, CONSTANT_ALPHA);
99 NV50_BLEND_FACTOR_CASE(SRC1_COLOR, SRC1_COLOR);
100 NV50_BLEND_FACTOR_CASE(SRC1_ALPHA, SRC1_ALPHA);
101 NV50_BLEND_FACTOR_CASE(ZERO, ZERO);
102 NV50_BLEND_FACTOR_CASE(INV_SRC_COLOR, ONE_MINUS_SRC_COLOR);
103 NV50_BLEND_FACTOR_CASE(INV_SRC_ALPHA, ONE_MINUS_SRC_ALPHA);
104 NV50_BLEND_FACTOR_CASE(INV_DST_ALPHA, ONE_MINUS_DST_ALPHA);
105 NV50_BLEND_FACTOR_CASE(INV_DST_COLOR, ONE_MINUS_DST_COLOR);
106 NV50_BLEND_FACTOR_CASE(INV_CONST_COLOR, ONE_MINUS_CONSTANT_COLOR);
107 NV50_BLEND_FACTOR_CASE(INV_CONST_ALPHA, ONE_MINUS_CONSTANT_ALPHA);
108 NV50_BLEND_FACTOR_CASE(INV_SRC1_COLOR, ONE_MINUS_SRC1_COLOR);
109 NV50_BLEND_FACTOR_CASE(INV_SRC1_ALPHA, ONE_MINUS_SRC1_ALPHA);
110 default:
111 return NV50_BLEND_FACTOR_ZERO;
112 }
113 }
114
115 static void *
116 nv50_blend_state_create(struct pipe_context *pipe,
117 const struct pipe_blend_state *cso)
118 {
119 struct nv50_blend_stateobj *so = CALLOC_STRUCT(nv50_blend_stateobj);
120 int i;
121 bool emit_common_func = cso->rt[0].blend_enable;
122
123 if (nv50_context(pipe)->screen->tesla->oclass >= NVA3_3D_CLASS) {
124 SB_BEGIN_3D(so, BLEND_INDEPENDENT, 1);
125 SB_DATA (so, cso->independent_blend_enable);
126 }
127
128 so->pipe = *cso;
129
130 SB_BEGIN_3D(so, COLOR_MASK_COMMON, 1);
131 SB_DATA (so, !cso->independent_blend_enable);
132
133 SB_BEGIN_3D(so, BLEND_ENABLE_COMMON, 1);
134 SB_DATA (so, !cso->independent_blend_enable);
135
136 if (cso->independent_blend_enable) {
137 SB_BEGIN_3D(so, BLEND_ENABLE(0), 8);
138 for (i = 0; i < 8; ++i) {
139 SB_DATA(so, cso->rt[i].blend_enable);
140 if (cso->rt[i].blend_enable)
141 emit_common_func = true;
142 }
143
144 if (nv50_context(pipe)->screen->tesla->oclass >= NVA3_3D_CLASS) {
145 emit_common_func = false;
146
147 for (i = 0; i < 8; ++i) {
148 if (!cso->rt[i].blend_enable)
149 continue;
150 SB_BEGIN_3D_(so, NVA3_3D_IBLEND_EQUATION_RGB(i), 6);
151 SB_DATA (so, nvgl_blend_eqn(cso->rt[i].rgb_func));
152 SB_DATA (so, nv50_blend_fac(cso->rt[i].rgb_src_factor));
153 SB_DATA (so, nv50_blend_fac(cso->rt[i].rgb_dst_factor));
154 SB_DATA (so, nvgl_blend_eqn(cso->rt[i].alpha_func));
155 SB_DATA (so, nv50_blend_fac(cso->rt[i].alpha_src_factor));
156 SB_DATA (so, nv50_blend_fac(cso->rt[i].alpha_dst_factor));
157 }
158 }
159 } else {
160 SB_BEGIN_3D(so, BLEND_ENABLE(0), 1);
161 SB_DATA (so, cso->rt[0].blend_enable);
162 }
163
164 if (emit_common_func) {
165 SB_BEGIN_3D(so, BLEND_EQUATION_RGB, 5);
166 SB_DATA (so, nvgl_blend_eqn(cso->rt[0].rgb_func));
167 SB_DATA (so, nv50_blend_fac(cso->rt[0].rgb_src_factor));
168 SB_DATA (so, nv50_blend_fac(cso->rt[0].rgb_dst_factor));
169 SB_DATA (so, nvgl_blend_eqn(cso->rt[0].alpha_func));
170 SB_DATA (so, nv50_blend_fac(cso->rt[0].alpha_src_factor));
171 SB_BEGIN_3D(so, BLEND_FUNC_DST_ALPHA, 1);
172 SB_DATA (so, nv50_blend_fac(cso->rt[0].alpha_dst_factor));
173 }
174
175 if (cso->logicop_enable) {
176 SB_BEGIN_3D(so, LOGIC_OP_ENABLE, 2);
177 SB_DATA (so, 1);
178 SB_DATA (so, nvgl_logicop_func(cso->logicop_func));
179 } else {
180 SB_BEGIN_3D(so, LOGIC_OP_ENABLE, 1);
181 SB_DATA (so, 0);
182 }
183
184 if (cso->independent_blend_enable) {
185 SB_BEGIN_3D(so, COLOR_MASK(0), 8);
186 for (i = 0; i < 8; ++i)
187 SB_DATA(so, nv50_colormask(cso->rt[i].colormask));
188 } else {
189 SB_BEGIN_3D(so, COLOR_MASK(0), 1);
190 SB_DATA (so, nv50_colormask(cso->rt[0].colormask));
191 }
192
193 assert(so->size <= ARRAY_SIZE(so->state));
194 return so;
195 }
196
197 static void
198 nv50_blend_state_bind(struct pipe_context *pipe, void *hwcso)
199 {
200 struct nv50_context *nv50 = nv50_context(pipe);
201
202 nv50->blend = hwcso;
203 nv50->dirty |= NV50_NEW_BLEND;
204 }
205
206 static void
207 nv50_blend_state_delete(struct pipe_context *pipe, void *hwcso)
208 {
209 FREE(hwcso);
210 }
211
212 /* NOTE: ignoring line_last_pixel */
213 static void *
214 nv50_rasterizer_state_create(struct pipe_context *pipe,
215 const struct pipe_rasterizer_state *cso)
216 {
217 struct nv50_rasterizer_stateobj *so;
218 uint32_t reg;
219
220 so = CALLOC_STRUCT(nv50_rasterizer_stateobj);
221 if (!so)
222 return NULL;
223 so->pipe = *cso;
224
225 #ifndef NV50_SCISSORS_CLIPPING
226 for (int i = 0; i < NV50_MAX_VIEWPORTS; i++) {
227 SB_BEGIN_3D(so, SCISSOR_ENABLE(i), 1);
228 SB_DATA (so, cso->scissor);
229 }
230 #endif
231
232 SB_BEGIN_3D(so, SHADE_MODEL, 1);
233 SB_DATA (so, cso->flatshade ? NV50_3D_SHADE_MODEL_FLAT :
234 NV50_3D_SHADE_MODEL_SMOOTH);
235 SB_BEGIN_3D(so, PROVOKING_VERTEX_LAST, 1);
236 SB_DATA (so, !cso->flatshade_first);
237 SB_BEGIN_3D(so, VERTEX_TWO_SIDE_ENABLE, 1);
238 SB_DATA (so, cso->light_twoside);
239
240 SB_BEGIN_3D(so, FRAG_COLOR_CLAMP_EN, 1);
241 SB_DATA (so, cso->clamp_fragment_color ? 0x11111111 : 0x00000000);
242
243 SB_BEGIN_3D(so, MULTISAMPLE_ENABLE, 1);
244 SB_DATA (so, cso->multisample);
245
246 SB_BEGIN_3D(so, LINE_WIDTH, 1);
247 SB_DATA (so, fui(cso->line_width));
248 SB_BEGIN_3D(so, LINE_SMOOTH_ENABLE, 1);
249 SB_DATA (so, cso->line_smooth);
250
251 SB_BEGIN_3D(so, LINE_STIPPLE_ENABLE, 1);
252 if (cso->line_stipple_enable) {
253 SB_DATA (so, 1);
254 SB_BEGIN_3D(so, LINE_STIPPLE, 1);
255 SB_DATA (so, (cso->line_stipple_pattern << 8) |
256 cso->line_stipple_factor);
257 } else {
258 SB_DATA (so, 0);
259 }
260
261 if (!cso->point_size_per_vertex) {
262 SB_BEGIN_3D(so, POINT_SIZE, 1);
263 SB_DATA (so, fui(cso->point_size));
264 }
265 SB_BEGIN_3D(so, POINT_SPRITE_ENABLE, 1);
266 SB_DATA (so, cso->point_quad_rasterization);
267 SB_BEGIN_3D(so, POINT_SMOOTH_ENABLE, 1);
268 SB_DATA (so, cso->point_smooth);
269
270 SB_BEGIN_3D(so, POLYGON_MODE_FRONT, 3);
271 SB_DATA (so, nvgl_polygon_mode(cso->fill_front));
272 SB_DATA (so, nvgl_polygon_mode(cso->fill_back));
273 SB_DATA (so, cso->poly_smooth);
274
275 SB_BEGIN_3D(so, CULL_FACE_ENABLE, 3);
276 SB_DATA (so, cso->cull_face != PIPE_FACE_NONE);
277 SB_DATA (so, cso->front_ccw ? NV50_3D_FRONT_FACE_CCW :
278 NV50_3D_FRONT_FACE_CW);
279 switch (cso->cull_face) {
280 case PIPE_FACE_FRONT_AND_BACK:
281 SB_DATA(so, NV50_3D_CULL_FACE_FRONT_AND_BACK);
282 break;
283 case PIPE_FACE_FRONT:
284 SB_DATA(so, NV50_3D_CULL_FACE_FRONT);
285 break;
286 case PIPE_FACE_BACK:
287 default:
288 SB_DATA(so, NV50_3D_CULL_FACE_BACK);
289 break;
290 }
291
292 SB_BEGIN_3D(so, POLYGON_STIPPLE_ENABLE, 1);
293 SB_DATA (so, cso->poly_stipple_enable);
294 SB_BEGIN_3D(so, POLYGON_OFFSET_POINT_ENABLE, 3);
295 SB_DATA (so, cso->offset_point);
296 SB_DATA (so, cso->offset_line);
297 SB_DATA (so, cso->offset_tri);
298
299 if (cso->offset_point || cso->offset_line || cso->offset_tri) {
300 SB_BEGIN_3D(so, POLYGON_OFFSET_FACTOR, 1);
301 SB_DATA (so, fui(cso->offset_scale));
302 SB_BEGIN_3D(so, POLYGON_OFFSET_UNITS, 1);
303 SB_DATA (so, fui(cso->offset_units * 2.0f));
304 SB_BEGIN_3D(so, POLYGON_OFFSET_CLAMP, 1);
305 SB_DATA (so, fui(cso->offset_clamp));
306 }
307
308 if (cso->depth_clip) {
309 reg = 0;
310 } else {
311 reg =
312 NV50_3D_VIEW_VOLUME_CLIP_CTRL_DEPTH_CLAMP_NEAR |
313 NV50_3D_VIEW_VOLUME_CLIP_CTRL_DEPTH_CLAMP_FAR |
314 NV50_3D_VIEW_VOLUME_CLIP_CTRL_UNK12_UNK1;
315 }
316 #ifndef NV50_SCISSORS_CLIPPING
317 reg |=
318 NV50_3D_VIEW_VOLUME_CLIP_CTRL_UNK7 |
319 NV50_3D_VIEW_VOLUME_CLIP_CTRL_UNK12_UNK1;
320 #endif
321 SB_BEGIN_3D(so, VIEW_VOLUME_CLIP_CTRL, 1);
322 SB_DATA (so, reg);
323
324 SB_BEGIN_3D(so, DEPTH_CLIP_NEGATIVE_Z, 1);
325 SB_DATA (so, cso->clip_halfz);
326
327 SB_BEGIN_3D(so, PIXEL_CENTER_INTEGER, 1);
328 SB_DATA (so, !cso->half_pixel_center);
329
330 assert(so->size <= ARRAY_SIZE(so->state));
331 return (void *)so;
332 }
333
334 static void
335 nv50_rasterizer_state_bind(struct pipe_context *pipe, void *hwcso)
336 {
337 struct nv50_context *nv50 = nv50_context(pipe);
338
339 nv50->rast = hwcso;
340 nv50->dirty |= NV50_NEW_RASTERIZER;
341 }
342
343 static void
344 nv50_rasterizer_state_delete(struct pipe_context *pipe, void *hwcso)
345 {
346 FREE(hwcso);
347 }
348
349 static void *
350 nv50_zsa_state_create(struct pipe_context *pipe,
351 const struct pipe_depth_stencil_alpha_state *cso)
352 {
353 struct nv50_zsa_stateobj *so = CALLOC_STRUCT(nv50_zsa_stateobj);
354
355 so->pipe = *cso;
356
357 SB_BEGIN_3D(so, DEPTH_WRITE_ENABLE, 1);
358 SB_DATA (so, cso->depth.writemask);
359 SB_BEGIN_3D(so, DEPTH_TEST_ENABLE, 1);
360 if (cso->depth.enabled) {
361 SB_DATA (so, 1);
362 SB_BEGIN_3D(so, DEPTH_TEST_FUNC, 1);
363 SB_DATA (so, nvgl_comparison_op(cso->depth.func));
364 } else {
365 SB_DATA (so, 0);
366 }
367
368 SB_BEGIN_3D(so, DEPTH_BOUNDS_EN, 1);
369 if (cso->depth.bounds_test) {
370 SB_DATA (so, 1);
371 SB_BEGIN_3D(so, DEPTH_BOUNDS(0), 2);
372 SB_DATA (so, fui(cso->depth.bounds_min));
373 SB_DATA (so, fui(cso->depth.bounds_max));
374 } else {
375 SB_DATA (so, 0);
376 }
377
378 if (cso->stencil[0].enabled) {
379 SB_BEGIN_3D(so, STENCIL_ENABLE, 5);
380 SB_DATA (so, 1);
381 SB_DATA (so, nvgl_stencil_op(cso->stencil[0].fail_op));
382 SB_DATA (so, nvgl_stencil_op(cso->stencil[0].zfail_op));
383 SB_DATA (so, nvgl_stencil_op(cso->stencil[0].zpass_op));
384 SB_DATA (so, nvgl_comparison_op(cso->stencil[0].func));
385 SB_BEGIN_3D(so, STENCIL_FRONT_MASK, 2);
386 SB_DATA (so, cso->stencil[0].writemask);
387 SB_DATA (so, cso->stencil[0].valuemask);
388 } else {
389 SB_BEGIN_3D(so, STENCIL_ENABLE, 1);
390 SB_DATA (so, 0);
391 }
392
393 if (cso->stencil[1].enabled) {
394 assert(cso->stencil[0].enabled);
395 SB_BEGIN_3D(so, STENCIL_TWO_SIDE_ENABLE, 5);
396 SB_DATA (so, 1);
397 SB_DATA (so, nvgl_stencil_op(cso->stencil[1].fail_op));
398 SB_DATA (so, nvgl_stencil_op(cso->stencil[1].zfail_op));
399 SB_DATA (so, nvgl_stencil_op(cso->stencil[1].zpass_op));
400 SB_DATA (so, nvgl_comparison_op(cso->stencil[1].func));
401 SB_BEGIN_3D(so, STENCIL_BACK_MASK, 2);
402 SB_DATA (so, cso->stencil[1].writemask);
403 SB_DATA (so, cso->stencil[1].valuemask);
404 } else {
405 SB_BEGIN_3D(so, STENCIL_TWO_SIDE_ENABLE, 1);
406 SB_DATA (so, 0);
407 }
408
409 SB_BEGIN_3D(so, ALPHA_TEST_ENABLE, 1);
410 if (cso->alpha.enabled) {
411 SB_DATA (so, 1);
412 SB_BEGIN_3D(so, ALPHA_TEST_REF, 2);
413 SB_DATA (so, fui(cso->alpha.ref_value));
414 SB_DATA (so, nvgl_comparison_op(cso->alpha.func));
415 } else {
416 SB_DATA (so, 0);
417 }
418
419 assert(so->size <= ARRAY_SIZE(so->state));
420 return (void *)so;
421 }
422
423 static void
424 nv50_zsa_state_bind(struct pipe_context *pipe, void *hwcso)
425 {
426 struct nv50_context *nv50 = nv50_context(pipe);
427
428 nv50->zsa = hwcso;
429 nv50->dirty |= NV50_NEW_ZSA;
430 }
431
432 static void
433 nv50_zsa_state_delete(struct pipe_context *pipe, void *hwcso)
434 {
435 FREE(hwcso);
436 }
437
438 /* ====================== SAMPLERS AND TEXTURES ================================
439 */
440
441 #define NV50_TSC_WRAP_CASE(n) \
442 case PIPE_TEX_WRAP_##n: return NV50_TSC_WRAP_##n
443
444 static inline unsigned
445 nv50_tsc_wrap_mode(unsigned wrap)
446 {
447 switch (wrap) {
448 NV50_TSC_WRAP_CASE(REPEAT);
449 NV50_TSC_WRAP_CASE(MIRROR_REPEAT);
450 NV50_TSC_WRAP_CASE(CLAMP_TO_EDGE);
451 NV50_TSC_WRAP_CASE(CLAMP_TO_BORDER);
452 NV50_TSC_WRAP_CASE(CLAMP);
453 NV50_TSC_WRAP_CASE(MIRROR_CLAMP_TO_EDGE);
454 NV50_TSC_WRAP_CASE(MIRROR_CLAMP_TO_BORDER);
455 NV50_TSC_WRAP_CASE(MIRROR_CLAMP);
456 default:
457 NOUVEAU_ERR("unknown wrap mode: %d\n", wrap);
458 return NV50_TSC_WRAP_REPEAT;
459 }
460 }
461
462 void *
463 nv50_sampler_state_create(struct pipe_context *pipe,
464 const struct pipe_sampler_state *cso)
465 {
466 struct nv50_tsc_entry *so = MALLOC_STRUCT(nv50_tsc_entry);
467 float f[2];
468
469 so->id = -1;
470
471 so->tsc[0] = (0x00026000 |
472 (nv50_tsc_wrap_mode(cso->wrap_s) << 0) |
473 (nv50_tsc_wrap_mode(cso->wrap_t) << 3) |
474 (nv50_tsc_wrap_mode(cso->wrap_r) << 6));
475
476 switch (cso->mag_img_filter) {
477 case PIPE_TEX_FILTER_LINEAR:
478 so->tsc[1] = NV50_TSC_1_MAGF_LINEAR;
479 break;
480 case PIPE_TEX_FILTER_NEAREST:
481 default:
482 so->tsc[1] = NV50_TSC_1_MAGF_NEAREST;
483 break;
484 }
485
486 switch (cso->min_img_filter) {
487 case PIPE_TEX_FILTER_LINEAR:
488 so->tsc[1] |= NV50_TSC_1_MINF_LINEAR;
489 break;
490 case PIPE_TEX_FILTER_NEAREST:
491 default:
492 so->tsc[1] |= NV50_TSC_1_MINF_NEAREST;
493 break;
494 }
495
496 switch (cso->min_mip_filter) {
497 case PIPE_TEX_MIPFILTER_LINEAR:
498 so->tsc[1] |= NV50_TSC_1_MIPF_LINEAR;
499 break;
500 case PIPE_TEX_MIPFILTER_NEAREST:
501 so->tsc[1] |= NV50_TSC_1_MIPF_NEAREST;
502 break;
503 case PIPE_TEX_MIPFILTER_NONE:
504 default:
505 so->tsc[1] |= NV50_TSC_1_MIPF_NONE;
506 break;
507 }
508
509 if (nouveau_screen(pipe->screen)->class_3d >= NVE4_3D_CLASS) {
510 if (cso->seamless_cube_map)
511 so->tsc[1] |= NVE4_TSC_1_CUBE_SEAMLESS;
512 if (!cso->normalized_coords)
513 so->tsc[1] |= NVE4_TSC_1_FORCE_NONNORMALIZED_COORDS;
514 }
515
516 if (cso->max_anisotropy >= 16)
517 so->tsc[0] |= (7 << 20);
518 else
519 if (cso->max_anisotropy >= 12)
520 so->tsc[0] |= (6 << 20);
521 else {
522 so->tsc[0] |= (cso->max_anisotropy >> 1) << 20;
523
524 if (cso->max_anisotropy >= 4)
525 so->tsc[1] |= NV50_TSC_1_UNKN_ANISO_35;
526 else
527 if (cso->max_anisotropy >= 2)
528 so->tsc[1] |= NV50_TSC_1_UNKN_ANISO_15;
529 }
530
531 if (cso->compare_mode == PIPE_TEX_COMPARE_R_TO_TEXTURE) {
532 /* NOTE: must be deactivated for non-shadow textures */
533 so->tsc[0] |= (1 << 9);
534 so->tsc[0] |= (nvgl_comparison_op(cso->compare_func) & 0x7) << 10;
535 }
536
537 f[0] = CLAMP(cso->lod_bias, -16.0f, 15.0f);
538 so->tsc[1] |= ((int)(f[0] * 256.0f) & 0x1fff) << 12;
539
540 f[0] = CLAMP(cso->min_lod, 0.0f, 15.0f);
541 f[1] = CLAMP(cso->max_lod, 0.0f, 15.0f);
542 so->tsc[2] =
543 (((int)(f[1] * 256.0f) & 0xfff) << 12) | ((int)(f[0] * 256.0f) & 0xfff);
544
545 so->tsc[2] |=
546 util_format_linear_float_to_srgb_8unorm(cso->border_color.f[0]) << 24;
547 so->tsc[3] =
548 util_format_linear_float_to_srgb_8unorm(cso->border_color.f[1]) << 12;
549 so->tsc[3] |=
550 util_format_linear_float_to_srgb_8unorm(cso->border_color.f[2]) << 20;
551
552 so->tsc[4] = fui(cso->border_color.f[0]);
553 so->tsc[5] = fui(cso->border_color.f[1]);
554 so->tsc[6] = fui(cso->border_color.f[2]);
555 so->tsc[7] = fui(cso->border_color.f[3]);
556
557 return (void *)so;
558 }
559
560 static void
561 nv50_sampler_state_delete(struct pipe_context *pipe, void *hwcso)
562 {
563 unsigned s, i;
564
565 for (s = 0; s < 3; ++s) {
566 assert(nv50_context(pipe)->num_samplers[s] <= PIPE_MAX_SAMPLERS);
567 for (i = 0; i < nv50_context(pipe)->num_samplers[s]; ++i)
568 if (nv50_context(pipe)->samplers[s][i] == hwcso)
569 nv50_context(pipe)->samplers[s][i] = NULL;
570 }
571
572 nv50_screen_tsc_free(nv50_context(pipe)->screen, nv50_tsc_entry(hwcso));
573
574 FREE(hwcso);
575 }
576
577 static inline void
578 nv50_stage_sampler_states_bind(struct nv50_context *nv50, int s,
579 unsigned nr, void **hwcso)
580 {
581 unsigned i;
582
583 assert(nr <= PIPE_MAX_SAMPLERS);
584 for (i = 0; i < nr; ++i) {
585 struct nv50_tsc_entry *old = nv50->samplers[s][i];
586
587 nv50->samplers[s][i] = nv50_tsc_entry(hwcso[i]);
588 if (old)
589 nv50_screen_tsc_unlock(nv50->screen, old);
590 }
591 assert(nv50->num_samplers[s] <= PIPE_MAX_SAMPLERS);
592 for (; i < nv50->num_samplers[s]; ++i) {
593 if (nv50->samplers[s][i]) {
594 nv50_screen_tsc_unlock(nv50->screen, nv50->samplers[s][i]);
595 nv50->samplers[s][i] = NULL;
596 }
597 }
598
599 nv50->num_samplers[s] = nr;
600
601 nv50->dirty |= NV50_NEW_SAMPLERS;
602 }
603
604 static void
605 nv50_vp_sampler_states_bind(struct pipe_context *pipe, unsigned nr, void **s)
606 {
607 nv50_stage_sampler_states_bind(nv50_context(pipe), 0, nr, s);
608 }
609
610 static void
611 nv50_fp_sampler_states_bind(struct pipe_context *pipe, unsigned nr, void **s)
612 {
613 nv50_stage_sampler_states_bind(nv50_context(pipe), 2, nr, s);
614 }
615
616 static void
617 nv50_gp_sampler_states_bind(struct pipe_context *pipe, unsigned nr, void **s)
618 {
619 nv50_stage_sampler_states_bind(nv50_context(pipe), 1, nr, s);
620 }
621
622 static void
623 nv50_bind_sampler_states(struct pipe_context *pipe,
624 unsigned shader, unsigned start,
625 unsigned num_samplers, void **samplers)
626 {
627 assert(start == 0);
628 switch (shader) {
629 case PIPE_SHADER_VERTEX:
630 nv50_vp_sampler_states_bind(pipe, num_samplers, samplers);
631 break;
632 case PIPE_SHADER_GEOMETRY:
633 nv50_gp_sampler_states_bind(pipe, num_samplers, samplers);
634 break;
635 case PIPE_SHADER_FRAGMENT:
636 nv50_fp_sampler_states_bind(pipe, num_samplers, samplers);
637 break;
638 }
639 }
640
641
642
643 /* NOTE: only called when not referenced anywhere, won't be bound */
644 static void
645 nv50_sampler_view_destroy(struct pipe_context *pipe,
646 struct pipe_sampler_view *view)
647 {
648 pipe_resource_reference(&view->texture, NULL);
649
650 nv50_screen_tic_free(nv50_context(pipe)->screen, nv50_tic_entry(view));
651
652 FREE(nv50_tic_entry(view));
653 }
654
655 static inline void
656 nv50_stage_set_sampler_views(struct nv50_context *nv50, int s,
657 unsigned nr,
658 struct pipe_sampler_view **views)
659 {
660 unsigned i;
661
662 assert(nr <= PIPE_MAX_SAMPLERS);
663 for (i = 0; i < nr; ++i) {
664 struct nv50_tic_entry *old = nv50_tic_entry(nv50->textures[s][i]);
665 if (old)
666 nv50_screen_tic_unlock(nv50->screen, old);
667
668 if (views[i] && views[i]->texture) {
669 struct pipe_resource *res = views[i]->texture;
670 if (res->target == PIPE_BUFFER &&
671 (res->flags & PIPE_RESOURCE_FLAG_MAP_COHERENT))
672 nv50->textures_coherent[s] |= 1 << i;
673 else
674 nv50->textures_coherent[s] &= ~(1 << i);
675 } else {
676 nv50->textures_coherent[s] &= ~(1 << i);
677 }
678
679 pipe_sampler_view_reference(&nv50->textures[s][i], views[i]);
680 }
681
682 assert(nv50->num_textures[s] <= PIPE_MAX_SAMPLERS);
683 for (i = nr; i < nv50->num_textures[s]; ++i) {
684 struct nv50_tic_entry *old = nv50_tic_entry(nv50->textures[s][i]);
685 if (!old)
686 continue;
687 nv50_screen_tic_unlock(nv50->screen, old);
688
689 pipe_sampler_view_reference(&nv50->textures[s][i], NULL);
690 }
691
692 nv50->num_textures[s] = nr;
693
694 nouveau_bufctx_reset(nv50->bufctx_3d, NV50_BIND_TEXTURES);
695
696 nv50->dirty |= NV50_NEW_TEXTURES;
697 }
698
699 static void
700 nv50_set_sampler_views(struct pipe_context *pipe, unsigned shader,
701 unsigned start, unsigned nr,
702 struct pipe_sampler_view **views)
703 {
704 assert(start == 0);
705 switch (shader) {
706 case PIPE_SHADER_VERTEX:
707 nv50_stage_set_sampler_views(nv50_context(pipe), 0, nr, views);
708 break;
709 case PIPE_SHADER_GEOMETRY:
710 nv50_stage_set_sampler_views(nv50_context(pipe), 1, nr, views);
711 break;
712 case PIPE_SHADER_FRAGMENT:
713 nv50_stage_set_sampler_views(nv50_context(pipe), 2, nr, views);
714 break;
715 default:
716 ;
717 }
718 }
719
720
721
722 /* ============================= SHADERS =======================================
723 */
724
725 static void *
726 nv50_sp_state_create(struct pipe_context *pipe,
727 const struct pipe_shader_state *cso, unsigned type)
728 {
729 struct nv50_program *prog;
730
731 prog = CALLOC_STRUCT(nv50_program);
732 if (!prog)
733 return NULL;
734
735 prog->type = type;
736 prog->pipe.tokens = tgsi_dup_tokens(cso->tokens);
737
738 if (cso->stream_output.num_outputs)
739 prog->pipe.stream_output = cso->stream_output;
740
741 prog->translated = nv50_program_translate(
742 prog, nv50_context(pipe)->screen->base.device->chipset,
743 &nouveau_context(pipe)->debug);
744
745 return (void *)prog;
746 }
747
748 static void
749 nv50_sp_state_delete(struct pipe_context *pipe, void *hwcso)
750 {
751 struct nv50_program *prog = (struct nv50_program *)hwcso;
752
753 nv50_program_destroy(nv50_context(pipe), prog);
754
755 FREE((void *)prog->pipe.tokens);
756 FREE(prog);
757 }
758
759 static void *
760 nv50_vp_state_create(struct pipe_context *pipe,
761 const struct pipe_shader_state *cso)
762 {
763 return nv50_sp_state_create(pipe, cso, PIPE_SHADER_VERTEX);
764 }
765
766 static void
767 nv50_vp_state_bind(struct pipe_context *pipe, void *hwcso)
768 {
769 struct nv50_context *nv50 = nv50_context(pipe);
770
771 nv50->vertprog = hwcso;
772 nv50->dirty |= NV50_NEW_VERTPROG;
773 }
774
775 static void *
776 nv50_fp_state_create(struct pipe_context *pipe,
777 const struct pipe_shader_state *cso)
778 {
779 return nv50_sp_state_create(pipe, cso, PIPE_SHADER_FRAGMENT);
780 }
781
782 static void
783 nv50_fp_state_bind(struct pipe_context *pipe, void *hwcso)
784 {
785 struct nv50_context *nv50 = nv50_context(pipe);
786
787 nv50->fragprog = hwcso;
788 nv50->dirty |= NV50_NEW_FRAGPROG;
789 }
790
791 static void *
792 nv50_gp_state_create(struct pipe_context *pipe,
793 const struct pipe_shader_state *cso)
794 {
795 return nv50_sp_state_create(pipe, cso, PIPE_SHADER_GEOMETRY);
796 }
797
798 static void
799 nv50_gp_state_bind(struct pipe_context *pipe, void *hwcso)
800 {
801 struct nv50_context *nv50 = nv50_context(pipe);
802
803 nv50->gmtyprog = hwcso;
804 nv50->dirty |= NV50_NEW_GMTYPROG;
805 }
806
807 static void *
808 nv50_cp_state_create(struct pipe_context *pipe,
809 const struct pipe_compute_state *cso)
810 {
811 struct nv50_program *prog;
812
813 prog = CALLOC_STRUCT(nv50_program);
814 if (!prog)
815 return NULL;
816 prog->type = PIPE_SHADER_COMPUTE;
817
818 prog->cp.smem_size = cso->req_local_mem;
819 prog->cp.lmem_size = cso->req_private_mem;
820 prog->parm_size = cso->req_input_mem;
821
822 prog->pipe.tokens = tgsi_dup_tokens((const struct tgsi_token *)cso->prog);
823
824 return (void *)prog;
825 }
826
827 static void
828 nv50_cp_state_bind(struct pipe_context *pipe, void *hwcso)
829 {
830 struct nv50_context *nv50 = nv50_context(pipe);
831
832 nv50->compprog = hwcso;
833 nv50->dirty_cp |= NV50_NEW_CP_PROGRAM;
834 }
835
836 static void
837 nv50_set_constant_buffer(struct pipe_context *pipe, uint shader, uint index,
838 struct pipe_constant_buffer *cb)
839 {
840 struct nv50_context *nv50 = nv50_context(pipe);
841 struct pipe_resource *res = cb ? cb->buffer : NULL;
842 const unsigned s = nv50_context_shader_stage(shader);
843 const unsigned i = index;
844
845 if (shader == PIPE_SHADER_COMPUTE)
846 return;
847
848 assert(i < NV50_MAX_PIPE_CONSTBUFS);
849 if (nv50->constbuf[s][i].user)
850 nv50->constbuf[s][i].u.buf = NULL;
851 else
852 if (nv50->constbuf[s][i].u.buf)
853 nouveau_bufctx_reset(nv50->bufctx_3d, NV50_BIND_CB(s, i));
854
855 pipe_resource_reference(&nv50->constbuf[s][i].u.buf, res);
856
857 nv50->constbuf[s][i].user = (cb && cb->user_buffer) ? true : false;
858 if (nv50->constbuf[s][i].user) {
859 nv50->constbuf[s][i].u.data = cb->user_buffer;
860 nv50->constbuf[s][i].size = MIN2(cb->buffer_size, 0x10000);
861 nv50->constbuf_valid[s] |= 1 << i;
862 nv50->constbuf_coherent[s] &= ~(1 << i);
863 } else
864 if (res) {
865 nv50->constbuf[s][i].offset = cb->buffer_offset;
866 nv50->constbuf[s][i].size = MIN2(align(cb->buffer_size, 0x100), 0x10000);
867 nv50->constbuf_valid[s] |= 1 << i;
868 if (res->flags & PIPE_RESOURCE_FLAG_MAP_COHERENT)
869 nv50->constbuf_coherent[s] |= 1 << i;
870 else
871 nv50->constbuf_coherent[s] &= ~(1 << i);
872 } else {
873 nv50->constbuf_valid[s] &= ~(1 << i);
874 nv50->constbuf_coherent[s] &= ~(1 << i);
875 }
876 nv50->constbuf_dirty[s] |= 1 << i;
877
878 nv50->dirty |= NV50_NEW_CONSTBUF;
879 }
880
881 /* =============================================================================
882 */
883
884 static void
885 nv50_set_blend_color(struct pipe_context *pipe,
886 const struct pipe_blend_color *bcol)
887 {
888 struct nv50_context *nv50 = nv50_context(pipe);
889
890 nv50->blend_colour = *bcol;
891 nv50->dirty |= NV50_NEW_BLEND_COLOUR;
892 }
893
894 static void
895 nv50_set_stencil_ref(struct pipe_context *pipe,
896 const struct pipe_stencil_ref *sr)
897 {
898 struct nv50_context *nv50 = nv50_context(pipe);
899
900 nv50->stencil_ref = *sr;
901 nv50->dirty |= NV50_NEW_STENCIL_REF;
902 }
903
904 static void
905 nv50_set_clip_state(struct pipe_context *pipe,
906 const struct pipe_clip_state *clip)
907 {
908 struct nv50_context *nv50 = nv50_context(pipe);
909
910 memcpy(nv50->clip.ucp, clip->ucp, sizeof(clip->ucp));
911
912 nv50->dirty |= NV50_NEW_CLIP;
913 }
914
915 static void
916 nv50_set_sample_mask(struct pipe_context *pipe, unsigned sample_mask)
917 {
918 struct nv50_context *nv50 = nv50_context(pipe);
919
920 nv50->sample_mask = sample_mask;
921 nv50->dirty |= NV50_NEW_SAMPLE_MASK;
922 }
923
924 static void
925 nv50_set_min_samples(struct pipe_context *pipe, unsigned min_samples)
926 {
927 struct nv50_context *nv50 = nv50_context(pipe);
928
929 if (nv50->min_samples != min_samples) {
930 nv50->min_samples = min_samples;
931 nv50->dirty |= NV50_NEW_MIN_SAMPLES;
932 }
933 }
934
935 static void
936 nv50_set_framebuffer_state(struct pipe_context *pipe,
937 const struct pipe_framebuffer_state *fb)
938 {
939 struct nv50_context *nv50 = nv50_context(pipe);
940
941 nouveau_bufctx_reset(nv50->bufctx_3d, NV50_BIND_FB);
942
943 util_copy_framebuffer_state(&nv50->framebuffer, fb);
944
945 nv50->dirty |= NV50_NEW_FRAMEBUFFER;
946 }
947
948 static void
949 nv50_set_polygon_stipple(struct pipe_context *pipe,
950 const struct pipe_poly_stipple *stipple)
951 {
952 struct nv50_context *nv50 = nv50_context(pipe);
953
954 nv50->stipple = *stipple;
955 nv50->dirty |= NV50_NEW_STIPPLE;
956 }
957
958 static void
959 nv50_set_scissor_states(struct pipe_context *pipe,
960 unsigned start_slot,
961 unsigned num_scissors,
962 const struct pipe_scissor_state *scissor)
963 {
964 struct nv50_context *nv50 = nv50_context(pipe);
965 int i;
966
967 assert(start_slot + num_scissors <= NV50_MAX_VIEWPORTS);
968 for (i = 0; i < num_scissors; i++) {
969 if (!memcmp(&nv50->scissors[start_slot + i], &scissor[i], sizeof(*scissor)))
970 continue;
971 nv50->scissors[start_slot + i] = scissor[i];
972 nv50->scissors_dirty |= 1 << (start_slot + i);
973 nv50->dirty |= NV50_NEW_SCISSOR;
974 }
975 }
976
977 static void
978 nv50_set_viewport_states(struct pipe_context *pipe,
979 unsigned start_slot,
980 unsigned num_viewports,
981 const struct pipe_viewport_state *vpt)
982 {
983 struct nv50_context *nv50 = nv50_context(pipe);
984 int i;
985
986 assert(start_slot + num_viewports <= NV50_MAX_VIEWPORTS);
987 for (i = 0; i < num_viewports; i++) {
988 if (!memcmp(&nv50->viewports[start_slot + i], &vpt[i], sizeof(*vpt)))
989 continue;
990 nv50->viewports[start_slot + i] = vpt[i];
991 nv50->viewports_dirty |= 1 << (start_slot + i);
992 nv50->dirty |= NV50_NEW_VIEWPORT;
993 }
994 }
995
996 static void
997 nv50_set_vertex_buffers(struct pipe_context *pipe,
998 unsigned start_slot, unsigned count,
999 const struct pipe_vertex_buffer *vb)
1000 {
1001 struct nv50_context *nv50 = nv50_context(pipe);
1002 unsigned i;
1003
1004 nouveau_bufctx_reset(nv50->bufctx_3d, NV50_BIND_VERTEX);
1005 nv50->dirty |= NV50_NEW_ARRAYS;
1006
1007 util_set_vertex_buffers_count(nv50->vtxbuf, &nv50->num_vtxbufs, vb,
1008 start_slot, count);
1009
1010 if (!vb) {
1011 nv50->vbo_user &= ~(((1ull << count) - 1) << start_slot);
1012 nv50->vbo_constant &= ~(((1ull << count) - 1) << start_slot);
1013 nv50->vtxbufs_coherent &= ~(((1ull << count) - 1) << start_slot);
1014 return;
1015 }
1016
1017 for (i = 0; i < count; ++i) {
1018 unsigned dst_index = start_slot + i;
1019
1020 if (!vb[i].buffer && vb[i].user_buffer) {
1021 nv50->vbo_user |= 1 << dst_index;
1022 if (!vb[i].stride)
1023 nv50->vbo_constant |= 1 << dst_index;
1024 else
1025 nv50->vbo_constant &= ~(1 << dst_index);
1026 nv50->vtxbufs_coherent &= ~(1 << dst_index);
1027 } else {
1028 nv50->vbo_user &= ~(1 << dst_index);
1029 nv50->vbo_constant &= ~(1 << dst_index);
1030
1031 if (vb[i].buffer &&
1032 vb[i].buffer->flags & PIPE_RESOURCE_FLAG_MAP_COHERENT)
1033 nv50->vtxbufs_coherent |= (1 << dst_index);
1034 else
1035 nv50->vtxbufs_coherent &= ~(1 << dst_index);
1036 }
1037 }
1038 }
1039
1040 static void
1041 nv50_set_index_buffer(struct pipe_context *pipe,
1042 const struct pipe_index_buffer *ib)
1043 {
1044 struct nv50_context *nv50 = nv50_context(pipe);
1045
1046 if (nv50->idxbuf.buffer)
1047 nouveau_bufctx_reset(nv50->bufctx_3d, NV50_BIND_INDEX);
1048
1049 if (ib) {
1050 pipe_resource_reference(&nv50->idxbuf.buffer, ib->buffer);
1051 nv50->idxbuf.index_size = ib->index_size;
1052 if (ib->buffer) {
1053 nv50->idxbuf.offset = ib->offset;
1054 BCTX_REFN(nv50->bufctx_3d, INDEX, nv04_resource(ib->buffer), RD);
1055 } else {
1056 nv50->idxbuf.user_buffer = ib->user_buffer;
1057 }
1058 } else {
1059 pipe_resource_reference(&nv50->idxbuf.buffer, NULL);
1060 }
1061 }
1062
1063 static void
1064 nv50_vertex_state_bind(struct pipe_context *pipe, void *hwcso)
1065 {
1066 struct nv50_context *nv50 = nv50_context(pipe);
1067
1068 nv50->vertex = hwcso;
1069 nv50->dirty |= NV50_NEW_VERTEX;
1070 }
1071
1072 static struct pipe_stream_output_target *
1073 nv50_so_target_create(struct pipe_context *pipe,
1074 struct pipe_resource *res,
1075 unsigned offset, unsigned size)
1076 {
1077 struct nv04_resource *buf = (struct nv04_resource *)res;
1078 struct nv50_so_target *targ = MALLOC_STRUCT(nv50_so_target);
1079 if (!targ)
1080 return NULL;
1081
1082 if (nouveau_context(pipe)->screen->class_3d >= NVA0_3D_CLASS) {
1083 targ->pq = pipe->create_query(pipe,
1084 NVA0_HW_QUERY_STREAM_OUTPUT_BUFFER_OFFSET, 0);
1085 if (!targ->pq) {
1086 FREE(targ);
1087 return NULL;
1088 }
1089 } else {
1090 targ->pq = NULL;
1091 }
1092 targ->clean = true;
1093
1094 targ->pipe.buffer_size = size;
1095 targ->pipe.buffer_offset = offset;
1096 targ->pipe.context = pipe;
1097 targ->pipe.buffer = NULL;
1098 pipe_resource_reference(&targ->pipe.buffer, res);
1099 pipe_reference_init(&targ->pipe.reference, 1);
1100
1101 assert(buf->base.target == PIPE_BUFFER);
1102 util_range_add(&buf->valid_buffer_range, offset, offset + size);
1103
1104 return &targ->pipe;
1105 }
1106
1107 static void
1108 nva0_so_target_save_offset(struct pipe_context *pipe,
1109 struct pipe_stream_output_target *ptarg,
1110 unsigned index, bool serialize)
1111 {
1112 struct nv50_so_target *targ = nv50_so_target(ptarg);
1113
1114 if (serialize) {
1115 struct nouveau_pushbuf *push = nv50_context(pipe)->base.pushbuf;
1116 PUSH_SPACE(push, 2);
1117 BEGIN_NV04(push, SUBC_3D(NV50_GRAPH_SERIALIZE), 1);
1118 PUSH_DATA (push, 0);
1119 }
1120
1121 nv50_query(targ->pq)->index = index;
1122 pipe->end_query(pipe, targ->pq);
1123 }
1124
1125 static void
1126 nv50_so_target_destroy(struct pipe_context *pipe,
1127 struct pipe_stream_output_target *ptarg)
1128 {
1129 struct nv50_so_target *targ = nv50_so_target(ptarg);
1130 if (targ->pq)
1131 pipe->destroy_query(pipe, targ->pq);
1132 pipe_resource_reference(&targ->pipe.buffer, NULL);
1133 FREE(targ);
1134 }
1135
1136 static void
1137 nv50_set_stream_output_targets(struct pipe_context *pipe,
1138 unsigned num_targets,
1139 struct pipe_stream_output_target **targets,
1140 const unsigned *offsets)
1141 {
1142 struct nv50_context *nv50 = nv50_context(pipe);
1143 unsigned i;
1144 bool serialize = true;
1145 const bool can_resume = nv50->screen->base.class_3d >= NVA0_3D_CLASS;
1146
1147 assert(num_targets <= 4);
1148
1149 for (i = 0; i < num_targets; ++i) {
1150 const bool changed = nv50->so_target[i] != targets[i];
1151 const bool append = (offsets[i] == (unsigned)-1);
1152 if (!changed && append)
1153 continue;
1154 nv50->so_targets_dirty |= 1 << i;
1155
1156 if (can_resume && changed && nv50->so_target[i]) {
1157 nva0_so_target_save_offset(pipe, nv50->so_target[i], i, serialize);
1158 serialize = false;
1159 }
1160
1161 if (targets[i] && !append)
1162 nv50_so_target(targets[i])->clean = true;
1163
1164 pipe_so_target_reference(&nv50->so_target[i], targets[i]);
1165 }
1166 for (; i < nv50->num_so_targets; ++i) {
1167 if (can_resume && nv50->so_target[i]) {
1168 nva0_so_target_save_offset(pipe, nv50->so_target[i], i, serialize);
1169 serialize = false;
1170 }
1171 pipe_so_target_reference(&nv50->so_target[i], NULL);
1172 nv50->so_targets_dirty |= 1 << i;
1173 }
1174 nv50->num_so_targets = num_targets;
1175
1176 if (nv50->so_targets_dirty)
1177 nv50->dirty |= NV50_NEW_STRMOUT;
1178 }
1179
1180 static void
1181 nv50_set_compute_resources(struct pipe_context *pipe,
1182 unsigned start, unsigned nr,
1183 struct pipe_surface **resources)
1184 {
1185 /* TODO: bind surfaces */
1186 }
1187
1188 static inline void
1189 nv50_set_global_handle(uint32_t *phandle, struct pipe_resource *res)
1190 {
1191 struct nv04_resource *buf = nv04_resource(res);
1192 if (buf) {
1193 uint64_t limit = (buf->address + buf->base.width0) - 1;
1194 if (limit < (1ULL << 32)) {
1195 *phandle = (uint32_t)buf->address;
1196 } else {
1197 NOUVEAU_ERR("Cannot map into TGSI_RESOURCE_GLOBAL: "
1198 "resource not contained within 32-bit address space !\n");
1199 *phandle = 0;
1200 }
1201 } else {
1202 *phandle = 0;
1203 }
1204 }
1205
1206 static void
1207 nv50_set_global_bindings(struct pipe_context *pipe,
1208 unsigned start, unsigned nr,
1209 struct pipe_resource **resources,
1210 uint32_t **handles)
1211 {
1212 struct nv50_context *nv50 = nv50_context(pipe);
1213 struct pipe_resource **ptr;
1214 unsigned i;
1215 const unsigned end = start + nr;
1216
1217 if (nv50->global_residents.size <= (end * sizeof(struct pipe_resource *))) {
1218 const unsigned old_size = nv50->global_residents.size;
1219 const unsigned req_size = end * sizeof(struct pipe_resource *);
1220 util_dynarray_resize(&nv50->global_residents, req_size);
1221 memset((uint8_t *)nv50->global_residents.data + old_size, 0,
1222 req_size - old_size);
1223 }
1224
1225 if (resources) {
1226 ptr = util_dynarray_element(
1227 &nv50->global_residents, struct pipe_resource *, start);
1228 for (i = 0; i < nr; ++i) {
1229 pipe_resource_reference(&ptr[i], resources[i]);
1230 nv50_set_global_handle(handles[i], resources[i]);
1231 }
1232 } else {
1233 ptr = util_dynarray_element(
1234 &nv50->global_residents, struct pipe_resource *, start);
1235 for (i = 0; i < nr; ++i)
1236 pipe_resource_reference(&ptr[i], NULL);
1237 }
1238
1239 nouveau_bufctx_reset(nv50->bufctx_cp, NV50_BIND_CP_GLOBAL);
1240
1241 nv50->dirty_cp = NV50_NEW_CP_GLOBALS;
1242 }
1243
1244 void
1245 nv50_init_state_functions(struct nv50_context *nv50)
1246 {
1247 struct pipe_context *pipe = &nv50->base.pipe;
1248
1249 pipe->create_blend_state = nv50_blend_state_create;
1250 pipe->bind_blend_state = nv50_blend_state_bind;
1251 pipe->delete_blend_state = nv50_blend_state_delete;
1252
1253 pipe->create_rasterizer_state = nv50_rasterizer_state_create;
1254 pipe->bind_rasterizer_state = nv50_rasterizer_state_bind;
1255 pipe->delete_rasterizer_state = nv50_rasterizer_state_delete;
1256
1257 pipe->create_depth_stencil_alpha_state = nv50_zsa_state_create;
1258 pipe->bind_depth_stencil_alpha_state = nv50_zsa_state_bind;
1259 pipe->delete_depth_stencil_alpha_state = nv50_zsa_state_delete;
1260
1261 pipe->create_sampler_state = nv50_sampler_state_create;
1262 pipe->delete_sampler_state = nv50_sampler_state_delete;
1263 pipe->bind_sampler_states = nv50_bind_sampler_states;
1264
1265 pipe->create_sampler_view = nv50_create_sampler_view;
1266 pipe->sampler_view_destroy = nv50_sampler_view_destroy;
1267 pipe->set_sampler_views = nv50_set_sampler_views;
1268
1269 pipe->create_vs_state = nv50_vp_state_create;
1270 pipe->create_fs_state = nv50_fp_state_create;
1271 pipe->create_gs_state = nv50_gp_state_create;
1272 pipe->create_compute_state = nv50_cp_state_create;
1273 pipe->bind_vs_state = nv50_vp_state_bind;
1274 pipe->bind_fs_state = nv50_fp_state_bind;
1275 pipe->bind_gs_state = nv50_gp_state_bind;
1276 pipe->bind_compute_state = nv50_cp_state_bind;
1277 pipe->delete_vs_state = nv50_sp_state_delete;
1278 pipe->delete_fs_state = nv50_sp_state_delete;
1279 pipe->delete_gs_state = nv50_sp_state_delete;
1280 pipe->delete_compute_state = nv50_sp_state_delete;
1281
1282 pipe->set_blend_color = nv50_set_blend_color;
1283 pipe->set_stencil_ref = nv50_set_stencil_ref;
1284 pipe->set_clip_state = nv50_set_clip_state;
1285 pipe->set_sample_mask = nv50_set_sample_mask;
1286 pipe->set_min_samples = nv50_set_min_samples;
1287 pipe->set_constant_buffer = nv50_set_constant_buffer;
1288 pipe->set_framebuffer_state = nv50_set_framebuffer_state;
1289 pipe->set_polygon_stipple = nv50_set_polygon_stipple;
1290 pipe->set_scissor_states = nv50_set_scissor_states;
1291 pipe->set_viewport_states = nv50_set_viewport_states;
1292
1293 pipe->create_vertex_elements_state = nv50_vertex_state_create;
1294 pipe->delete_vertex_elements_state = nv50_vertex_state_delete;
1295 pipe->bind_vertex_elements_state = nv50_vertex_state_bind;
1296
1297 pipe->set_vertex_buffers = nv50_set_vertex_buffers;
1298 pipe->set_index_buffer = nv50_set_index_buffer;
1299
1300 pipe->create_stream_output_target = nv50_so_target_create;
1301 pipe->stream_output_target_destroy = nv50_so_target_destroy;
1302 pipe->set_stream_output_targets = nv50_set_stream_output_targets;
1303
1304 pipe->set_global_binding = nv50_set_global_bindings;
1305 pipe->set_compute_resources = nv50_set_compute_resources;
1306
1307 nv50->sample_mask = ~0;
1308 nv50->min_samples = 1;
1309 }