Merge commit 'origin/gallium-master-merge'
[mesa.git] / src / gallium / drivers / nv10 / nv10_state.c
1 #include "draw/draw_context.h"
2 #include "pipe/p_state.h"
3 #include "pipe/p_defines.h"
4 #include "pipe/p_shader_tokens.h"
5
6 #include "tgsi/tgsi_parse.h"
7
8 #include "nv10_context.h"
9 #include "nv10_state.h"
10
11 static void *
12 nv10_blend_state_create(struct pipe_context *pipe,
13 const struct pipe_blend_state *cso)
14 {
15 struct nv10_blend_state *cb;
16
17 cb = MALLOC(sizeof(struct nv10_blend_state));
18
19 cb->b_enable = cso->blend_enable ? 1 : 0;
20 cb->b_srcfunc = ((nvgl_blend_func(cso->alpha_src_factor)<<16) |
21 (nvgl_blend_func(cso->rgb_src_factor)));
22 cb->b_dstfunc = ((nvgl_blend_func(cso->alpha_dst_factor)<<16) |
23 (nvgl_blend_func(cso->rgb_dst_factor)));
24
25 cb->c_mask = (((cso->colormask & PIPE_MASK_A) ? (0x01<<24) : 0) |
26 ((cso->colormask & PIPE_MASK_R) ? (0x01<<16) : 0) |
27 ((cso->colormask & PIPE_MASK_G) ? (0x01<< 8) : 0) |
28 ((cso->colormask & PIPE_MASK_B) ? (0x01<< 0) : 0));
29
30 cb->d_enable = cso->dither ? 1 : 0;
31
32 return (void *)cb;
33 }
34
35 static void
36 nv10_blend_state_bind(struct pipe_context *pipe, void *blend)
37 {
38 struct nv10_context *nv10 = nv10_context(pipe);
39
40 nv10->blend = (struct nv10_blend_state*)blend;
41
42 nv10->dirty |= NV10_NEW_BLEND;
43 }
44
45 static void
46 nv10_blend_state_delete(struct pipe_context *pipe, void *hwcso)
47 {
48 FREE(hwcso);
49 }
50
51
52 static INLINE unsigned
53 wrap_mode(unsigned wrap) {
54 unsigned ret;
55
56 switch (wrap) {
57 case PIPE_TEX_WRAP_REPEAT:
58 ret = NV10TCL_TX_FORMAT_WRAP_S_REPEAT;
59 break;
60 case PIPE_TEX_WRAP_MIRROR_REPEAT:
61 ret = NV10TCL_TX_FORMAT_WRAP_S_MIRRORED_REPEAT;
62 break;
63 case PIPE_TEX_WRAP_CLAMP_TO_EDGE:
64 ret = NV10TCL_TX_FORMAT_WRAP_S_CLAMP_TO_EDGE;
65 break;
66 case PIPE_TEX_WRAP_CLAMP_TO_BORDER:
67 ret = NV10TCL_TX_FORMAT_WRAP_S_CLAMP_TO_BORDER;
68 break;
69 case PIPE_TEX_WRAP_CLAMP:
70 ret = NV10TCL_TX_FORMAT_WRAP_S_CLAMP;
71 break;
72 case PIPE_TEX_WRAP_MIRROR_CLAMP_TO_EDGE:
73 case PIPE_TEX_WRAP_MIRROR_CLAMP_TO_BORDER:
74 case PIPE_TEX_WRAP_MIRROR_CLAMP:
75 default:
76 NOUVEAU_ERR("unknown wrap mode: %d\n", wrap);
77 ret = NV10TCL_TX_FORMAT_WRAP_S_REPEAT;
78 break;
79 }
80
81 return ret >> NV10TCL_TX_FORMAT_WRAP_S_SHIFT;
82 }
83
84 static void *
85 nv10_sampler_state_create(struct pipe_context *pipe,
86 const struct pipe_sampler_state *cso)
87 {
88 struct nv10_sampler_state *ps;
89 uint32_t filter = 0;
90
91 ps = MALLOC(sizeof(struct nv10_sampler_state));
92
93 ps->wrap = ((wrap_mode(cso->wrap_s) << NV10TCL_TX_FORMAT_WRAP_S_SHIFT) |
94 (wrap_mode(cso->wrap_t) << NV10TCL_TX_FORMAT_WRAP_T_SHIFT));
95
96 ps->en = 0;
97 if (cso->max_anisotropy > 1.0) {
98 /* no idea, binary driver sets it, works without it.. meh.. */
99 ps->wrap |= (1 << 5);
100
101 /* if (cso->max_anisotropy >= 16.0) {
102 ps->en |= NV10TCL_TX_ENABLE_ANISO_16X;
103 } else
104 if (cso->max_anisotropy >= 12.0) {
105 ps->en |= NV10TCL_TX_ENABLE_ANISO_12X;
106 } else
107 if (cso->max_anisotropy >= 10.0) {
108 ps->en |= NV10TCL_TX_ENABLE_ANISO_10X;
109 } else
110 if (cso->max_anisotropy >= 8.0) {
111 ps->en |= NV10TCL_TX_ENABLE_ANISO_8X;
112 } else
113 if (cso->max_anisotropy >= 6.0) {
114 ps->en |= NV10TCL_TX_ENABLE_ANISO_6X;
115 } else
116 if (cso->max_anisotropy >= 4.0) {
117 ps->en |= NV10TCL_TX_ENABLE_ANISO_4X;
118 } else {
119 ps->en |= NV10TCL_TX_ENABLE_ANISO_2X;
120 }*/
121 }
122
123 switch (cso->mag_img_filter) {
124 case PIPE_TEX_FILTER_LINEAR:
125 filter |= NV10TCL_TX_FILTER_MAGNIFY_LINEAR;
126 break;
127 case PIPE_TEX_FILTER_NEAREST:
128 default:
129 filter |= NV10TCL_TX_FILTER_MAGNIFY_NEAREST;
130 break;
131 }
132
133 switch (cso->min_img_filter) {
134 case PIPE_TEX_FILTER_LINEAR:
135 switch (cso->min_mip_filter) {
136 case PIPE_TEX_MIPFILTER_NEAREST:
137 filter |= NV10TCL_TX_FILTER_MINIFY_LINEAR_MIPMAP_NEAREST;
138 break;
139 case PIPE_TEX_MIPFILTER_LINEAR:
140 filter |= NV10TCL_TX_FILTER_MINIFY_LINEAR_MIPMAP_LINEAR;
141 break;
142 case PIPE_TEX_MIPFILTER_NONE:
143 default:
144 filter |= NV10TCL_TX_FILTER_MINIFY_LINEAR;
145 break;
146 }
147 break;
148 case PIPE_TEX_FILTER_NEAREST:
149 default:
150 switch (cso->min_mip_filter) {
151 case PIPE_TEX_MIPFILTER_NEAREST:
152 filter |= NV10TCL_TX_FILTER_MINIFY_NEAREST_MIPMAP_NEAREST;
153 break;
154 case PIPE_TEX_MIPFILTER_LINEAR:
155 filter |= NV10TCL_TX_FILTER_MINIFY_NEAREST_MIPMAP_LINEAR;
156 break;
157 case PIPE_TEX_MIPFILTER_NONE:
158 default:
159 filter |= NV10TCL_TX_FILTER_MINIFY_NEAREST;
160 break;
161 }
162 break;
163 }
164
165 ps->filt = filter;
166
167 /* if (cso->compare_mode == PIPE_TEX_COMPARE_R_TO_TEXTURE) {
168 switch (cso->compare_func) {
169 case PIPE_FUNC_NEVER:
170 ps->wrap |= NV10TCL_TX_WRAP_RCOMP_NEVER;
171 break;
172 case PIPE_FUNC_GREATER:
173 ps->wrap |= NV10TCL_TX_WRAP_RCOMP_GREATER;
174 break;
175 case PIPE_FUNC_EQUAL:
176 ps->wrap |= NV10TCL_TX_WRAP_RCOMP_EQUAL;
177 break;
178 case PIPE_FUNC_GEQUAL:
179 ps->wrap |= NV10TCL_TX_WRAP_RCOMP_GEQUAL;
180 break;
181 case PIPE_FUNC_LESS:
182 ps->wrap |= NV10TCL_TX_WRAP_RCOMP_LESS;
183 break;
184 case PIPE_FUNC_NOTEQUAL:
185 ps->wrap |= NV10TCL_TX_WRAP_RCOMP_NOTEQUAL;
186 break;
187 case PIPE_FUNC_LEQUAL:
188 ps->wrap |= NV10TCL_TX_WRAP_RCOMP_LEQUAL;
189 break;
190 case PIPE_FUNC_ALWAYS:
191 ps->wrap |= NV10TCL_TX_WRAP_RCOMP_ALWAYS;
192 break;
193 default:
194 break;
195 }
196 }*/
197
198 ps->bcol = ((float_to_ubyte(cso->border_color[3]) << 24) |
199 (float_to_ubyte(cso->border_color[0]) << 16) |
200 (float_to_ubyte(cso->border_color[1]) << 8) |
201 (float_to_ubyte(cso->border_color[2]) << 0));
202
203 return (void *)ps;
204 }
205
206 static void
207 nv10_sampler_state_bind(struct pipe_context *pipe, unsigned nr, void **sampler)
208 {
209 struct nv10_context *nv10 = nv10_context(pipe);
210 unsigned unit;
211
212 for (unit = 0; unit < nr; unit++) {
213 nv10->tex_sampler[unit] = sampler[unit];
214 nv10->dirty_samplers |= (1 << unit);
215 }
216 }
217
218 static void
219 nv10_sampler_state_delete(struct pipe_context *pipe, void *hwcso)
220 {
221 FREE(hwcso);
222 }
223
224 static void
225 nv10_set_sampler_texture(struct pipe_context *pipe, unsigned nr,
226 struct pipe_texture **miptree)
227 {
228 struct nv10_context *nv10 = nv10_context(pipe);
229 unsigned unit;
230
231 for (unit = 0; unit < nr; unit++) {
232 nv10->tex_miptree[unit] = (struct nv10_miptree *)miptree[unit];
233 nv10->dirty_samplers |= (1 << unit);
234 }
235 }
236
237 static void *
238 nv10_rasterizer_state_create(struct pipe_context *pipe,
239 const struct pipe_rasterizer_state *cso)
240 {
241 struct nv10_rasterizer_state *rs;
242 int i;
243
244 /*XXX: ignored:
245 * light_twoside
246 * offset_cw/ccw -nohw
247 * scissor
248 * point_smooth -nohw
249 * multisample
250 * offset_units / offset_scale
251 */
252 rs = MALLOC(sizeof(struct nv10_rasterizer_state));
253
254 rs->templ = cso;
255
256 rs->shade_model = cso->flatshade ? 0x1d00 : 0x1d01;
257
258 rs->line_width = (unsigned char)(cso->line_width * 8.0) & 0xff;
259 rs->line_smooth_en = cso->line_smooth ? 1 : 0;
260
261 rs->point_size = *(uint32_t*)&cso->point_size;
262
263 rs->poly_smooth_en = cso->poly_smooth ? 1 : 0;
264
265 if (cso->front_winding == PIPE_WINDING_CCW) {
266 rs->front_face = NV10TCL_FRONT_FACE_CCW;
267 rs->poly_mode_front = nvgl_polygon_mode(cso->fill_ccw);
268 rs->poly_mode_back = nvgl_polygon_mode(cso->fill_cw);
269 } else {
270 rs->front_face = NV10TCL_FRONT_FACE_CW;
271 rs->poly_mode_front = nvgl_polygon_mode(cso->fill_cw);
272 rs->poly_mode_back = nvgl_polygon_mode(cso->fill_ccw);
273 }
274
275 switch (cso->cull_mode) {
276 case PIPE_WINDING_CCW:
277 rs->cull_face_en = 1;
278 if (cso->front_winding == PIPE_WINDING_CCW)
279 rs->cull_face = NV10TCL_CULL_FACE_FRONT;
280 else
281 rs->cull_face = NV10TCL_CULL_FACE_BACK;
282 break;
283 case PIPE_WINDING_CW:
284 rs->cull_face_en = 1;
285 if (cso->front_winding == PIPE_WINDING_CW)
286 rs->cull_face = NV10TCL_CULL_FACE_FRONT;
287 else
288 rs->cull_face = NV10TCL_CULL_FACE_BACK;
289 break;
290 case PIPE_WINDING_BOTH:
291 rs->cull_face_en = 1;
292 rs->cull_face = NV10TCL_CULL_FACE_FRONT_AND_BACK;
293 break;
294 case PIPE_WINDING_NONE:
295 default:
296 rs->cull_face_en = 0;
297 rs->cull_face = 0;
298 break;
299 }
300
301 if (cso->point_sprite) {
302 rs->point_sprite = (1 << 0);
303 for (i = 0; i < 8; i++) {
304 if (cso->sprite_coord_mode[i] != PIPE_SPRITE_COORD_NONE)
305 rs->point_sprite |= (1 << (8 + i));
306 }
307 } else {
308 rs->point_sprite = 0;
309 }
310
311 return (void *)rs;
312 }
313
314 static void
315 nv10_rasterizer_state_bind(struct pipe_context *pipe, void *rast)
316 {
317 struct nv10_context *nv10 = nv10_context(pipe);
318
319 nv10->rast = (struct nv10_rasterizer_state*)rast;
320
321 draw_set_rasterizer_state(nv10->draw, (nv10->rast ? nv10->rast->templ : NULL));
322
323 nv10->dirty |= NV10_NEW_RAST;
324 }
325
326 static void
327 nv10_rasterizer_state_delete(struct pipe_context *pipe, void *hwcso)
328 {
329 FREE(hwcso);
330 }
331
332 static void *
333 nv10_depth_stencil_alpha_state_create(struct pipe_context *pipe,
334 const struct pipe_depth_stencil_alpha_state *cso)
335 {
336 struct nv10_depth_stencil_alpha_state *hw;
337
338 hw = MALLOC(sizeof(struct nv10_depth_stencil_alpha_state));
339
340 hw->depth.func = nvgl_comparison_op(cso->depth.func);
341 hw->depth.write_enable = cso->depth.writemask ? 1 : 0;
342 hw->depth.test_enable = cso->depth.enabled ? 1 : 0;
343
344 hw->stencil.enable = cso->stencil[0].enabled ? 1 : 0;
345 hw->stencil.wmask = cso->stencil[0].writemask;
346 hw->stencil.func = nvgl_comparison_op(cso->stencil[0].func);
347 hw->stencil.ref = cso->stencil[0].ref_value;
348 hw->stencil.vmask = cso->stencil[0].valuemask;
349 hw->stencil.fail = nvgl_stencil_op(cso->stencil[0].fail_op);
350 hw->stencil.zfail = nvgl_stencil_op(cso->stencil[0].zfail_op);
351 hw->stencil.zpass = nvgl_stencil_op(cso->stencil[0].zpass_op);
352
353 hw->alpha.enabled = cso->alpha.enabled ? 1 : 0;
354 hw->alpha.func = nvgl_comparison_op(cso->alpha.func);
355 hw->alpha.ref = float_to_ubyte(cso->alpha.ref_value);
356
357 return (void *)hw;
358 }
359
360 static void
361 nv10_depth_stencil_alpha_state_bind(struct pipe_context *pipe, void *dsa)
362 {
363 struct nv10_context *nv10 = nv10_context(pipe);
364
365 nv10->dsa = (struct nv10_depth_stencil_alpha_state*)dsa;
366
367 nv10->dirty |= NV10_NEW_DSA;
368 }
369
370 static void
371 nv10_depth_stencil_alpha_state_delete(struct pipe_context *pipe, void *hwcso)
372 {
373 FREE(hwcso);
374 }
375
376 static void *
377 nv10_vp_state_create(struct pipe_context *pipe,
378 const struct pipe_shader_state *templ)
379 {
380 struct nv10_context *nv10 = nv10_context(pipe);
381
382 return draw_create_vertex_shader(nv10->draw, templ);
383 }
384
385 static void
386 nv10_vp_state_bind(struct pipe_context *pipe, void *shader)
387 {
388 struct nv10_context *nv10 = nv10_context(pipe);
389
390 draw_bind_vertex_shader(nv10->draw, (struct draw_vertex_shader *) shader);
391
392 nv10->dirty |= NV10_NEW_VERTPROG;
393 }
394
395 static void
396 nv10_vp_state_delete(struct pipe_context *pipe, void *shader)
397 {
398 struct nv10_context *nv10 = nv10_context(pipe);
399
400 draw_delete_vertex_shader(nv10->draw, (struct draw_vertex_shader *) shader);
401 }
402
403 static void *
404 nv10_fp_state_create(struct pipe_context *pipe,
405 const struct pipe_shader_state *cso)
406 {
407 struct nv10_fragment_program *fp;
408
409 fp = CALLOC(1, sizeof(struct nv10_fragment_program));
410 fp->pipe.tokens = tgsi_dup_tokens(cso->tokens);
411
412 tgsi_scan_shader(cso->tokens, &fp->info);
413
414 return (void *)fp;
415 }
416
417 static void
418 nv10_fp_state_bind(struct pipe_context *pipe, void *hwcso)
419 {
420 struct nv10_context *nv10 = nv10_context(pipe);
421 struct nv10_fragment_program *fp = hwcso;
422
423 nv10->fragprog.current = fp;
424 nv10->dirty |= NV10_NEW_FRAGPROG;
425 }
426
427 static void
428 nv10_fp_state_delete(struct pipe_context *pipe, void *hwcso)
429 {
430 struct nv10_context *nv10 = nv10_context(pipe);
431 struct nv10_fragment_program *fp = hwcso;
432
433 nv10_fragprog_destroy(nv10, fp);
434 FREE((void*)fp->pipe.tokens);
435 FREE(fp);
436 }
437
438 static void
439 nv10_set_blend_color(struct pipe_context *pipe,
440 const struct pipe_blend_color *bcol)
441 {
442 struct nv10_context *nv10 = nv10_context(pipe);
443
444 nv10->blend_color = (struct pipe_blend_color*)bcol;
445
446 nv10->dirty |= NV10_NEW_BLENDCOL;
447 }
448
449 static void
450 nv10_set_clip_state(struct pipe_context *pipe,
451 const struct pipe_clip_state *clip)
452 {
453 struct nv10_context *nv10 = nv10_context(pipe);
454
455 draw_set_clip_state(nv10->draw, clip);
456 }
457
458 static void
459 nv10_set_constant_buffer(struct pipe_context *pipe, uint shader, uint index,
460 const struct pipe_constant_buffer *buf )
461 {
462 struct nv10_context *nv10 = nv10_context(pipe);
463 struct pipe_winsys *ws = pipe->winsys;
464
465 assert(shader < PIPE_SHADER_TYPES);
466 assert(index == 0);
467
468 if (buf) {
469 void *mapped;
470 if (buf->buffer && buf->buffer->size &&
471 (mapped = ws->buffer_map(ws, buf->buffer, PIPE_BUFFER_USAGE_CPU_READ)))
472 {
473 memcpy(nv10->constbuf[shader], mapped, buf->buffer->size);
474 nv10->constbuf_nr[shader] =
475 buf->buffer->size / (4 * sizeof(float));
476 ws->buffer_unmap(ws, buf->buffer);
477 }
478 }
479 }
480
481 static void
482 nv10_set_framebuffer_state(struct pipe_context *pipe,
483 const struct pipe_framebuffer_state *fb)
484 {
485 struct nv10_context *nv10 = nv10_context(pipe);
486
487 nv10->framebuffer = (struct pipe_framebuffer_state*)fb;
488
489 nv10->dirty |= NV10_NEW_FRAMEBUFFER;
490 }
491
492 static void
493 nv10_set_polygon_stipple(struct pipe_context *pipe,
494 const struct pipe_poly_stipple *stipple)
495 {
496 NOUVEAU_ERR("line stipple hahaha\n");
497 }
498
499 static void
500 nv10_set_scissor_state(struct pipe_context *pipe,
501 const struct pipe_scissor_state *s)
502 {
503 struct nv10_context *nv10 = nv10_context(pipe);
504
505 nv10->scissor = (struct pipe_scissor_state*)s;
506
507 nv10->dirty |= NV10_NEW_SCISSOR;
508 }
509
510 static void
511 nv10_set_viewport_state(struct pipe_context *pipe,
512 const struct pipe_viewport_state *vpt)
513 {
514 struct nv10_context *nv10 = nv10_context(pipe);
515
516 nv10->viewport = (struct pipe_viewport_state*)vpt;
517
518 draw_set_viewport_state(nv10->draw, nv10->viewport);
519
520 nv10->dirty |= NV10_NEW_VIEWPORT;
521 }
522
523 static void
524 nv10_set_vertex_buffers(struct pipe_context *pipe, unsigned count,
525 const struct pipe_vertex_buffer *vb)
526 {
527 struct nv10_context *nv10 = nv10_context(pipe);
528
529 memcpy(nv10->vtxbuf, vb, sizeof(*vb) * count);
530 nv10->dirty |= NV10_NEW_VTXARRAYS;
531
532 draw_set_vertex_buffers(nv10->draw, count, vb);
533 }
534
535 static void
536 nv10_set_vertex_elements(struct pipe_context *pipe, unsigned count,
537 const struct pipe_vertex_element *ve)
538 {
539 struct nv10_context *nv10 = nv10_context(pipe);
540
541 memcpy(nv10->vtxelt, ve, sizeof(*ve) * count);
542 nv10->dirty |= NV10_NEW_VTXARRAYS;
543
544 draw_set_vertex_elements(nv10->draw, count, ve);
545 }
546
547 void
548 nv10_init_state_functions(struct nv10_context *nv10)
549 {
550 nv10->pipe.create_blend_state = nv10_blend_state_create;
551 nv10->pipe.bind_blend_state = nv10_blend_state_bind;
552 nv10->pipe.delete_blend_state = nv10_blend_state_delete;
553
554 nv10->pipe.create_sampler_state = nv10_sampler_state_create;
555 nv10->pipe.bind_sampler_states = nv10_sampler_state_bind;
556 nv10->pipe.delete_sampler_state = nv10_sampler_state_delete;
557 nv10->pipe.set_sampler_textures = nv10_set_sampler_texture;
558
559 nv10->pipe.create_rasterizer_state = nv10_rasterizer_state_create;
560 nv10->pipe.bind_rasterizer_state = nv10_rasterizer_state_bind;
561 nv10->pipe.delete_rasterizer_state = nv10_rasterizer_state_delete;
562
563 nv10->pipe.create_depth_stencil_alpha_state =
564 nv10_depth_stencil_alpha_state_create;
565 nv10->pipe.bind_depth_stencil_alpha_state =
566 nv10_depth_stencil_alpha_state_bind;
567 nv10->pipe.delete_depth_stencil_alpha_state =
568 nv10_depth_stencil_alpha_state_delete;
569
570 nv10->pipe.create_vs_state = nv10_vp_state_create;
571 nv10->pipe.bind_vs_state = nv10_vp_state_bind;
572 nv10->pipe.delete_vs_state = nv10_vp_state_delete;
573
574 nv10->pipe.create_fs_state = nv10_fp_state_create;
575 nv10->pipe.bind_fs_state = nv10_fp_state_bind;
576 nv10->pipe.delete_fs_state = nv10_fp_state_delete;
577
578 nv10->pipe.set_blend_color = nv10_set_blend_color;
579 nv10->pipe.set_clip_state = nv10_set_clip_state;
580 nv10->pipe.set_constant_buffer = nv10_set_constant_buffer;
581 nv10->pipe.set_framebuffer_state = nv10_set_framebuffer_state;
582 nv10->pipe.set_polygon_stipple = nv10_set_polygon_stipple;
583 nv10->pipe.set_scissor_state = nv10_set_scissor_state;
584 nv10->pipe.set_viewport_state = nv10_set_viewport_state;
585
586 nv10->pipe.set_vertex_buffers = nv10_set_vertex_buffers;
587 nv10->pipe.set_vertex_elements = nv10_set_vertex_elements;
588 }
589