gallium: adapt drivers to pipe_constant_buffer removal
[mesa.git] / src / gallium / drivers / nv10 / nv10_state.c
1 #include "draw/draw_context.h"
2 #include "pipe/p_state.h"
3 #include "pipe/p_defines.h"
4 #include "pipe/p_shader_tokens.h"
5 #include "pipe/p_inlines.h"
6
7 #include "tgsi/tgsi_parse.h"
8
9 #include "nv10_context.h"
10 #include "nv10_state.h"
11
12 static void *
13 nv10_blend_state_create(struct pipe_context *pipe,
14 const struct pipe_blend_state *cso)
15 {
16 struct nv10_blend_state *cb;
17
18 cb = MALLOC(sizeof(struct nv10_blend_state));
19
20 cb->b_enable = cso->blend_enable ? 1 : 0;
21 cb->b_srcfunc = ((nvgl_blend_func(cso->alpha_src_factor)<<16) |
22 (nvgl_blend_func(cso->rgb_src_factor)));
23 cb->b_dstfunc = ((nvgl_blend_func(cso->alpha_dst_factor)<<16) |
24 (nvgl_blend_func(cso->rgb_dst_factor)));
25
26 cb->c_mask = (((cso->colormask & PIPE_MASK_A) ? (0x01<<24) : 0) |
27 ((cso->colormask & PIPE_MASK_R) ? (0x01<<16) : 0) |
28 ((cso->colormask & PIPE_MASK_G) ? (0x01<< 8) : 0) |
29 ((cso->colormask & PIPE_MASK_B) ? (0x01<< 0) : 0));
30
31 cb->d_enable = cso->dither ? 1 : 0;
32
33 return (void *)cb;
34 }
35
36 static void
37 nv10_blend_state_bind(struct pipe_context *pipe, void *blend)
38 {
39 struct nv10_context *nv10 = nv10_context(pipe);
40
41 nv10->blend = (struct nv10_blend_state*)blend;
42
43 nv10->dirty |= NV10_NEW_BLEND;
44 }
45
46 static void
47 nv10_blend_state_delete(struct pipe_context *pipe, void *hwcso)
48 {
49 FREE(hwcso);
50 }
51
52
53 static INLINE unsigned
54 wrap_mode(unsigned wrap) {
55 unsigned ret;
56
57 switch (wrap) {
58 case PIPE_TEX_WRAP_REPEAT:
59 ret = NV10TCL_TX_FORMAT_WRAP_S_REPEAT;
60 break;
61 case PIPE_TEX_WRAP_MIRROR_REPEAT:
62 ret = NV10TCL_TX_FORMAT_WRAP_S_MIRRORED_REPEAT;
63 break;
64 case PIPE_TEX_WRAP_CLAMP_TO_EDGE:
65 ret = NV10TCL_TX_FORMAT_WRAP_S_CLAMP_TO_EDGE;
66 break;
67 case PIPE_TEX_WRAP_CLAMP_TO_BORDER:
68 ret = NV10TCL_TX_FORMAT_WRAP_S_CLAMP_TO_BORDER;
69 break;
70 case PIPE_TEX_WRAP_CLAMP:
71 ret = NV10TCL_TX_FORMAT_WRAP_S_CLAMP;
72 break;
73 case PIPE_TEX_WRAP_MIRROR_CLAMP_TO_EDGE:
74 case PIPE_TEX_WRAP_MIRROR_CLAMP_TO_BORDER:
75 case PIPE_TEX_WRAP_MIRROR_CLAMP:
76 default:
77 NOUVEAU_ERR("unknown wrap mode: %d\n", wrap);
78 ret = NV10TCL_TX_FORMAT_WRAP_S_REPEAT;
79 break;
80 }
81
82 return ret >> NV10TCL_TX_FORMAT_WRAP_S_SHIFT;
83 }
84
85 static void *
86 nv10_sampler_state_create(struct pipe_context *pipe,
87 const struct pipe_sampler_state *cso)
88 {
89 struct nv10_sampler_state *ps;
90 uint32_t filter = 0;
91
92 ps = MALLOC(sizeof(struct nv10_sampler_state));
93
94 ps->wrap = ((wrap_mode(cso->wrap_s) << NV10TCL_TX_FORMAT_WRAP_S_SHIFT) |
95 (wrap_mode(cso->wrap_t) << NV10TCL_TX_FORMAT_WRAP_T_SHIFT));
96
97 ps->en = 0;
98 if (cso->max_anisotropy > 1.0) {
99 /* no idea, binary driver sets it, works without it.. meh.. */
100 ps->wrap |= (1 << 5);
101
102 /* if (cso->max_anisotropy >= 16.0) {
103 ps->en |= NV10TCL_TX_ENABLE_ANISO_16X;
104 } else
105 if (cso->max_anisotropy >= 12.0) {
106 ps->en |= NV10TCL_TX_ENABLE_ANISO_12X;
107 } else
108 if (cso->max_anisotropy >= 10.0) {
109 ps->en |= NV10TCL_TX_ENABLE_ANISO_10X;
110 } else
111 if (cso->max_anisotropy >= 8.0) {
112 ps->en |= NV10TCL_TX_ENABLE_ANISO_8X;
113 } else
114 if (cso->max_anisotropy >= 6.0) {
115 ps->en |= NV10TCL_TX_ENABLE_ANISO_6X;
116 } else
117 if (cso->max_anisotropy >= 4.0) {
118 ps->en |= NV10TCL_TX_ENABLE_ANISO_4X;
119 } else {
120 ps->en |= NV10TCL_TX_ENABLE_ANISO_2X;
121 }*/
122 }
123
124 switch (cso->mag_img_filter) {
125 case PIPE_TEX_FILTER_LINEAR:
126 filter |= NV10TCL_TX_FILTER_MAGNIFY_LINEAR;
127 break;
128 case PIPE_TEX_FILTER_NEAREST:
129 default:
130 filter |= NV10TCL_TX_FILTER_MAGNIFY_NEAREST;
131 break;
132 }
133
134 switch (cso->min_img_filter) {
135 case PIPE_TEX_FILTER_LINEAR:
136 switch (cso->min_mip_filter) {
137 case PIPE_TEX_MIPFILTER_NEAREST:
138 filter |= NV10TCL_TX_FILTER_MINIFY_LINEAR_MIPMAP_NEAREST;
139 break;
140 case PIPE_TEX_MIPFILTER_LINEAR:
141 filter |= NV10TCL_TX_FILTER_MINIFY_LINEAR_MIPMAP_LINEAR;
142 break;
143 case PIPE_TEX_MIPFILTER_NONE:
144 default:
145 filter |= NV10TCL_TX_FILTER_MINIFY_LINEAR;
146 break;
147 }
148 break;
149 case PIPE_TEX_FILTER_NEAREST:
150 default:
151 switch (cso->min_mip_filter) {
152 case PIPE_TEX_MIPFILTER_NEAREST:
153 filter |= NV10TCL_TX_FILTER_MINIFY_NEAREST_MIPMAP_NEAREST;
154 break;
155 case PIPE_TEX_MIPFILTER_LINEAR:
156 filter |= NV10TCL_TX_FILTER_MINIFY_NEAREST_MIPMAP_LINEAR;
157 break;
158 case PIPE_TEX_MIPFILTER_NONE:
159 default:
160 filter |= NV10TCL_TX_FILTER_MINIFY_NEAREST;
161 break;
162 }
163 break;
164 }
165
166 ps->filt = filter;
167
168 /* if (cso->compare_mode == PIPE_TEX_COMPARE_R_TO_TEXTURE) {
169 switch (cso->compare_func) {
170 case PIPE_FUNC_NEVER:
171 ps->wrap |= NV10TCL_TX_WRAP_RCOMP_NEVER;
172 break;
173 case PIPE_FUNC_GREATER:
174 ps->wrap |= NV10TCL_TX_WRAP_RCOMP_GREATER;
175 break;
176 case PIPE_FUNC_EQUAL:
177 ps->wrap |= NV10TCL_TX_WRAP_RCOMP_EQUAL;
178 break;
179 case PIPE_FUNC_GEQUAL:
180 ps->wrap |= NV10TCL_TX_WRAP_RCOMP_GEQUAL;
181 break;
182 case PIPE_FUNC_LESS:
183 ps->wrap |= NV10TCL_TX_WRAP_RCOMP_LESS;
184 break;
185 case PIPE_FUNC_NOTEQUAL:
186 ps->wrap |= NV10TCL_TX_WRAP_RCOMP_NOTEQUAL;
187 break;
188 case PIPE_FUNC_LEQUAL:
189 ps->wrap |= NV10TCL_TX_WRAP_RCOMP_LEQUAL;
190 break;
191 case PIPE_FUNC_ALWAYS:
192 ps->wrap |= NV10TCL_TX_WRAP_RCOMP_ALWAYS;
193 break;
194 default:
195 break;
196 }
197 }*/
198
199 ps->bcol = ((float_to_ubyte(cso->border_color[3]) << 24) |
200 (float_to_ubyte(cso->border_color[0]) << 16) |
201 (float_to_ubyte(cso->border_color[1]) << 8) |
202 (float_to_ubyte(cso->border_color[2]) << 0));
203
204 return (void *)ps;
205 }
206
207 static void
208 nv10_sampler_state_bind(struct pipe_context *pipe, unsigned nr, void **sampler)
209 {
210 struct nv10_context *nv10 = nv10_context(pipe);
211 unsigned unit;
212
213 for (unit = 0; unit < nr; unit++) {
214 nv10->tex_sampler[unit] = sampler[unit];
215 nv10->dirty_samplers |= (1 << unit);
216 }
217 }
218
219 static void
220 nv10_sampler_state_delete(struct pipe_context *pipe, void *hwcso)
221 {
222 FREE(hwcso);
223 }
224
225 static void
226 nv10_set_sampler_texture(struct pipe_context *pipe, unsigned nr,
227 struct pipe_texture **miptree)
228 {
229 struct nv10_context *nv10 = nv10_context(pipe);
230 unsigned unit;
231
232 for (unit = 0; unit < nr; unit++) {
233 nv10->tex_miptree[unit] = (struct nv10_miptree *)miptree[unit];
234 nv10->dirty_samplers |= (1 << unit);
235 }
236 }
237
238 static void *
239 nv10_rasterizer_state_create(struct pipe_context *pipe,
240 const struct pipe_rasterizer_state *cso)
241 {
242 struct nv10_rasterizer_state *rs;
243 int i;
244
245 /*XXX: ignored:
246 * light_twoside
247 * offset_cw/ccw -nohw
248 * scissor
249 * point_smooth -nohw
250 * multisample
251 * offset_units / offset_scale
252 */
253 rs = MALLOC(sizeof(struct nv10_rasterizer_state));
254
255 rs->templ = cso;
256
257 rs->shade_model = cso->flatshade ? 0x1d00 : 0x1d01;
258
259 rs->line_width = (unsigned char)(cso->line_width * 8.0) & 0xff;
260 rs->line_smooth_en = cso->line_smooth ? 1 : 0;
261
262 rs->point_size = *(uint32_t*)&cso->point_size;
263
264 rs->poly_smooth_en = cso->poly_smooth ? 1 : 0;
265
266 if (cso->front_winding == PIPE_WINDING_CCW) {
267 rs->front_face = NV10TCL_FRONT_FACE_CCW;
268 rs->poly_mode_front = nvgl_polygon_mode(cso->fill_ccw);
269 rs->poly_mode_back = nvgl_polygon_mode(cso->fill_cw);
270 } else {
271 rs->front_face = NV10TCL_FRONT_FACE_CW;
272 rs->poly_mode_front = nvgl_polygon_mode(cso->fill_cw);
273 rs->poly_mode_back = nvgl_polygon_mode(cso->fill_ccw);
274 }
275
276 switch (cso->cull_mode) {
277 case PIPE_WINDING_CCW:
278 rs->cull_face_en = 1;
279 if (cso->front_winding == PIPE_WINDING_CCW)
280 rs->cull_face = NV10TCL_CULL_FACE_FRONT;
281 else
282 rs->cull_face = NV10TCL_CULL_FACE_BACK;
283 break;
284 case PIPE_WINDING_CW:
285 rs->cull_face_en = 1;
286 if (cso->front_winding == PIPE_WINDING_CW)
287 rs->cull_face = NV10TCL_CULL_FACE_FRONT;
288 else
289 rs->cull_face = NV10TCL_CULL_FACE_BACK;
290 break;
291 case PIPE_WINDING_BOTH:
292 rs->cull_face_en = 1;
293 rs->cull_face = NV10TCL_CULL_FACE_FRONT_AND_BACK;
294 break;
295 case PIPE_WINDING_NONE:
296 default:
297 rs->cull_face_en = 0;
298 rs->cull_face = 0;
299 break;
300 }
301
302 if (cso->point_sprite) {
303 rs->point_sprite = (1 << 0);
304 for (i = 0; i < 8; i++) {
305 if (cso->sprite_coord_mode[i] != PIPE_SPRITE_COORD_NONE)
306 rs->point_sprite |= (1 << (8 + i));
307 }
308 } else {
309 rs->point_sprite = 0;
310 }
311
312 return (void *)rs;
313 }
314
315 static void
316 nv10_rasterizer_state_bind(struct pipe_context *pipe, void *rast)
317 {
318 struct nv10_context *nv10 = nv10_context(pipe);
319
320 nv10->rast = (struct nv10_rasterizer_state*)rast;
321
322 draw_set_rasterizer_state(nv10->draw, (nv10->rast ? nv10->rast->templ : NULL));
323
324 nv10->dirty |= NV10_NEW_RAST;
325 }
326
327 static void
328 nv10_rasterizer_state_delete(struct pipe_context *pipe, void *hwcso)
329 {
330 FREE(hwcso);
331 }
332
333 static void *
334 nv10_depth_stencil_alpha_state_create(struct pipe_context *pipe,
335 const struct pipe_depth_stencil_alpha_state *cso)
336 {
337 struct nv10_depth_stencil_alpha_state *hw;
338
339 hw = MALLOC(sizeof(struct nv10_depth_stencil_alpha_state));
340
341 hw->depth.func = nvgl_comparison_op(cso->depth.func);
342 hw->depth.write_enable = cso->depth.writemask ? 1 : 0;
343 hw->depth.test_enable = cso->depth.enabled ? 1 : 0;
344
345 hw->stencil.enable = cso->stencil[0].enabled ? 1 : 0;
346 hw->stencil.wmask = cso->stencil[0].writemask;
347 hw->stencil.func = nvgl_comparison_op(cso->stencil[0].func);
348 hw->stencil.ref = cso->stencil[0].ref_value;
349 hw->stencil.vmask = cso->stencil[0].valuemask;
350 hw->stencil.fail = nvgl_stencil_op(cso->stencil[0].fail_op);
351 hw->stencil.zfail = nvgl_stencil_op(cso->stencil[0].zfail_op);
352 hw->stencil.zpass = nvgl_stencil_op(cso->stencil[0].zpass_op);
353
354 hw->alpha.enabled = cso->alpha.enabled ? 1 : 0;
355 hw->alpha.func = nvgl_comparison_op(cso->alpha.func);
356 hw->alpha.ref = float_to_ubyte(cso->alpha.ref_value);
357
358 return (void *)hw;
359 }
360
361 static void
362 nv10_depth_stencil_alpha_state_bind(struct pipe_context *pipe, void *dsa)
363 {
364 struct nv10_context *nv10 = nv10_context(pipe);
365
366 nv10->dsa = (struct nv10_depth_stencil_alpha_state*)dsa;
367
368 nv10->dirty |= NV10_NEW_DSA;
369 }
370
371 static void
372 nv10_depth_stencil_alpha_state_delete(struct pipe_context *pipe, void *hwcso)
373 {
374 FREE(hwcso);
375 }
376
377 static void *
378 nv10_vp_state_create(struct pipe_context *pipe,
379 const struct pipe_shader_state *templ)
380 {
381 struct nv10_context *nv10 = nv10_context(pipe);
382
383 return draw_create_vertex_shader(nv10->draw, templ);
384 }
385
386 static void
387 nv10_vp_state_bind(struct pipe_context *pipe, void *shader)
388 {
389 struct nv10_context *nv10 = nv10_context(pipe);
390
391 draw_bind_vertex_shader(nv10->draw, (struct draw_vertex_shader *) shader);
392
393 nv10->dirty |= NV10_NEW_VERTPROG;
394 }
395
396 static void
397 nv10_vp_state_delete(struct pipe_context *pipe, void *shader)
398 {
399 struct nv10_context *nv10 = nv10_context(pipe);
400
401 draw_delete_vertex_shader(nv10->draw, (struct draw_vertex_shader *) shader);
402 }
403
404 static void *
405 nv10_fp_state_create(struct pipe_context *pipe,
406 const struct pipe_shader_state *cso)
407 {
408 struct nv10_fragment_program *fp;
409
410 fp = CALLOC(1, sizeof(struct nv10_fragment_program));
411 fp->pipe.tokens = tgsi_dup_tokens(cso->tokens);
412
413 tgsi_scan_shader(cso->tokens, &fp->info);
414
415 return (void *)fp;
416 }
417
418 static void
419 nv10_fp_state_bind(struct pipe_context *pipe, void *hwcso)
420 {
421 struct nv10_context *nv10 = nv10_context(pipe);
422 struct nv10_fragment_program *fp = hwcso;
423
424 nv10->fragprog.current = fp;
425 nv10->dirty |= NV10_NEW_FRAGPROG;
426 }
427
428 static void
429 nv10_fp_state_delete(struct pipe_context *pipe, void *hwcso)
430 {
431 struct nv10_context *nv10 = nv10_context(pipe);
432 struct nv10_fragment_program *fp = hwcso;
433
434 nv10_fragprog_destroy(nv10, fp);
435 FREE((void*)fp->pipe.tokens);
436 FREE(fp);
437 }
438
439 static void
440 nv10_set_blend_color(struct pipe_context *pipe,
441 const struct pipe_blend_color *bcol)
442 {
443 struct nv10_context *nv10 = nv10_context(pipe);
444
445 nv10->blend_color = (struct pipe_blend_color*)bcol;
446
447 nv10->dirty |= NV10_NEW_BLENDCOL;
448 }
449
450 static void
451 nv10_set_clip_state(struct pipe_context *pipe,
452 const struct pipe_clip_state *clip)
453 {
454 struct nv10_context *nv10 = nv10_context(pipe);
455
456 draw_set_clip_state(nv10->draw, clip);
457 }
458
459 static void
460 nv10_set_constant_buffer(struct pipe_context *pipe, uint shader, uint index,
461 const struct pipe_buffer *buf )
462 {
463 struct nv10_context *nv10 = nv10_context(pipe);
464 struct pipe_screen *pscreen = pipe->screen;
465
466 assert(shader < PIPE_SHADER_TYPES);
467 assert(index == 0);
468
469 if (buf) {
470 void *mapped;
471 if (buf->size &&
472 (mapped = pipe_buffer_map(pscreen, buf, PIPE_BUFFER_USAGE_CPU_READ)))
473 {
474 memcpy(nv10->constbuf[shader], mapped, buf->size);
475 nv10->constbuf_nr[shader] =
476 buf->size / (4 * sizeof(float));
477 pipe_buffer_unmap(pscreen, buf);
478 }
479 }
480 }
481
482 static void
483 nv10_set_framebuffer_state(struct pipe_context *pipe,
484 const struct pipe_framebuffer_state *fb)
485 {
486 struct nv10_context *nv10 = nv10_context(pipe);
487
488 nv10->framebuffer = (struct pipe_framebuffer_state*)fb;
489
490 nv10->dirty |= NV10_NEW_FRAMEBUFFER;
491 }
492
493 static void
494 nv10_set_polygon_stipple(struct pipe_context *pipe,
495 const struct pipe_poly_stipple *stipple)
496 {
497 NOUVEAU_ERR("line stipple hahaha\n");
498 }
499
500 static void
501 nv10_set_scissor_state(struct pipe_context *pipe,
502 const struct pipe_scissor_state *s)
503 {
504 struct nv10_context *nv10 = nv10_context(pipe);
505
506 nv10->scissor = (struct pipe_scissor_state*)s;
507
508 nv10->dirty |= NV10_NEW_SCISSOR;
509 }
510
511 static void
512 nv10_set_viewport_state(struct pipe_context *pipe,
513 const struct pipe_viewport_state *vpt)
514 {
515 struct nv10_context *nv10 = nv10_context(pipe);
516
517 nv10->viewport = (struct pipe_viewport_state*)vpt;
518
519 draw_set_viewport_state(nv10->draw, nv10->viewport);
520
521 nv10->dirty |= NV10_NEW_VIEWPORT;
522 }
523
524 static void
525 nv10_set_vertex_buffers(struct pipe_context *pipe, unsigned count,
526 const struct pipe_vertex_buffer *vb)
527 {
528 struct nv10_context *nv10 = nv10_context(pipe);
529
530 memcpy(nv10->vtxbuf, vb, sizeof(*vb) * count);
531 nv10->dirty |= NV10_NEW_VTXARRAYS;
532
533 draw_set_vertex_buffers(nv10->draw, count, vb);
534 }
535
536 static void
537 nv10_set_vertex_elements(struct pipe_context *pipe, unsigned count,
538 const struct pipe_vertex_element *ve)
539 {
540 struct nv10_context *nv10 = nv10_context(pipe);
541
542 memcpy(nv10->vtxelt, ve, sizeof(*ve) * count);
543 nv10->dirty |= NV10_NEW_VTXARRAYS;
544
545 draw_set_vertex_elements(nv10->draw, count, ve);
546 }
547
548 void
549 nv10_init_state_functions(struct nv10_context *nv10)
550 {
551 nv10->pipe.create_blend_state = nv10_blend_state_create;
552 nv10->pipe.bind_blend_state = nv10_blend_state_bind;
553 nv10->pipe.delete_blend_state = nv10_blend_state_delete;
554
555 nv10->pipe.create_sampler_state = nv10_sampler_state_create;
556 nv10->pipe.bind_fragment_sampler_states = nv10_sampler_state_bind;
557 nv10->pipe.delete_sampler_state = nv10_sampler_state_delete;
558 nv10->pipe.set_fragment_sampler_textures = nv10_set_sampler_texture;
559
560 nv10->pipe.create_rasterizer_state = nv10_rasterizer_state_create;
561 nv10->pipe.bind_rasterizer_state = nv10_rasterizer_state_bind;
562 nv10->pipe.delete_rasterizer_state = nv10_rasterizer_state_delete;
563
564 nv10->pipe.create_depth_stencil_alpha_state =
565 nv10_depth_stencil_alpha_state_create;
566 nv10->pipe.bind_depth_stencil_alpha_state =
567 nv10_depth_stencil_alpha_state_bind;
568 nv10->pipe.delete_depth_stencil_alpha_state =
569 nv10_depth_stencil_alpha_state_delete;
570
571 nv10->pipe.create_vs_state = nv10_vp_state_create;
572 nv10->pipe.bind_vs_state = nv10_vp_state_bind;
573 nv10->pipe.delete_vs_state = nv10_vp_state_delete;
574
575 nv10->pipe.create_fs_state = nv10_fp_state_create;
576 nv10->pipe.bind_fs_state = nv10_fp_state_bind;
577 nv10->pipe.delete_fs_state = nv10_fp_state_delete;
578
579 nv10->pipe.set_blend_color = nv10_set_blend_color;
580 nv10->pipe.set_clip_state = nv10_set_clip_state;
581 nv10->pipe.set_constant_buffer = nv10_set_constant_buffer;
582 nv10->pipe.set_framebuffer_state = nv10_set_framebuffer_state;
583 nv10->pipe.set_polygon_stipple = nv10_set_polygon_stipple;
584 nv10->pipe.set_scissor_state = nv10_set_scissor_state;
585 nv10->pipe.set_viewport_state = nv10_set_viewport_state;
586
587 nv10->pipe.set_vertex_buffers = nv10_set_vertex_buffers;
588 nv10->pipe.set_vertex_elements = nv10_set_vertex_elements;
589 }
590