1 #include "nv30_context.h"
2 #include "nouveau/nouveau_util.h"
5 nv30_state_framebuffer_validate(struct nv30_context
*nv30
)
7 struct pipe_framebuffer_state
*fb
= &nv30
->framebuffer
;
8 struct nouveau_channel
*chan
= nv30
->screen
->base
.channel
;
9 struct nouveau_grobj
*rankine
= nv30
->screen
->rankine
;
10 struct nv04_surface
*rt
[2], *zeta
= NULL
;
11 uint32_t rt_enable
, rt_format
;
12 int i
, colour_format
= 0, zeta_format
= 0;
13 struct nouveau_stateobj
*so
= so_new(64, 10);
14 unsigned rt_flags
= NOUVEAU_BO_RDWR
| NOUVEAU_BO_VRAM
;
15 unsigned w
= fb
->width
;
16 unsigned h
= fb
->height
;
17 struct nv30_miptree
*nv30mt
;
20 for (i
= 0; i
< fb
->nr_cbufs
; i
++) {
22 assert(colour_format
== fb
->cbufs
[i
]->format
);
24 colour_format
= fb
->cbufs
[i
]->format
;
25 rt_enable
|= (NV34TCL_RT_ENABLE_COLOR0
<< i
);
26 rt
[i
] = (struct nv04_surface
*)fb
->cbufs
[i
];
30 if (rt_enable
& NV34TCL_RT_ENABLE_COLOR1
)
31 rt_enable
|= NV34TCL_RT_ENABLE_MRT
;
34 zeta_format
= fb
->zsbuf
->format
;
35 zeta
= (struct nv04_surface
*)fb
->zsbuf
;
38 if (!(rt
[0]->base
.texture
->tex_usage
& NOUVEAU_TEXTURE_USAGE_LINEAR
)) {
39 assert(!(fb
->width
& (fb
->width
- 1)) && !(fb
->height
& (fb
->height
- 1)));
40 for (i
= 1; i
< fb
->nr_cbufs
; i
++)
41 assert(!(rt
[i
]->base
.texture
->tex_usage
& NOUVEAU_TEXTURE_USAGE_LINEAR
));
43 /* FIXME: NV34TCL_RT_FORMAT_LOG2_[WIDTH/HEIGHT] */
44 rt_format
= NV34TCL_RT_FORMAT_TYPE_SWIZZLED
|
45 log2i(fb
->width
) << 16 /*NV34TCL_RT_FORMAT_LOG2_WIDTH_SHIFT*/ |
46 log2i(fb
->height
) << 24 /*NV34TCL_RT_FORMAT_LOG2_HEIGHT_SHIFT*/;
49 rt_format
= NV34TCL_RT_FORMAT_TYPE_LINEAR
;
51 switch (colour_format
) {
52 case PIPE_FORMAT_A8R8G8B8_UNORM
:
54 rt_format
|= NV34TCL_RT_FORMAT_COLOR_A8R8G8B8
;
56 case PIPE_FORMAT_R5G6B5_UNORM
:
57 rt_format
|= NV34TCL_RT_FORMAT_COLOR_R5G6B5
;
63 switch (zeta_format
) {
64 case PIPE_FORMAT_Z16_UNORM
:
65 rt_format
|= NV34TCL_RT_FORMAT_ZETA_Z16
;
67 case PIPE_FORMAT_Z24S8_UNORM
:
68 case PIPE_FORMAT_Z24X8_UNORM
:
70 rt_format
|= NV34TCL_RT_FORMAT_ZETA_Z24S8
;
76 if (rt_enable
& NV34TCL_RT_ENABLE_COLOR0
) {
77 uint32_t pitch
= rt
[0]->pitch
;
79 pitch
|= (zeta
->pitch
<< 16);
81 pitch
|= (pitch
<< 16);
84 nv30mt
= (struct nv30_miptree
*)rt
[0]->base
.texture
;
85 so_method(so
, rankine
, NV34TCL_DMA_COLOR0
, 1);
86 so_reloc (so
, nouveau_bo(nv30mt
->buffer
), 0, rt_flags
| NOUVEAU_BO_OR
,
87 chan
->vram
->handle
, chan
->gart
->handle
);
88 so_method(so
, rankine
, NV34TCL_COLOR0_PITCH
, 2);
90 so_reloc (so
, nouveau_bo(nv30mt
->buffer
), rt
[0]->base
.offset
,
91 rt_flags
| NOUVEAU_BO_LOW
, 0, 0);
94 if (rt_enable
& NV34TCL_RT_ENABLE_COLOR1
) {
95 nv30mt
= (struct nv30_miptree
*)rt
[1]->base
.texture
;
96 so_method(so
, rankine
, NV34TCL_DMA_COLOR1
, 1);
97 so_reloc (so
, nouveau_bo(nv30mt
->buffer
), 0, rt_flags
| NOUVEAU_BO_OR
,
98 chan
->vram
->handle
, chan
->gart
->handle
);
99 so_method(so
, rankine
, NV34TCL_COLOR1_OFFSET
, 2);
100 so_reloc (so
, nouveau_bo(nv30mt
->buffer
), rt
[1]->base
.offset
,
101 rt_flags
| NOUVEAU_BO_LOW
, 0, 0);
102 so_data (so
, rt
[1]->pitch
);
106 nv30mt
= (struct nv30_miptree
*)zeta
->base
.texture
;
107 so_method(so
, rankine
, NV34TCL_DMA_ZETA
, 1);
108 so_reloc (so
, nouveau_bo(nv30mt
->buffer
), 0, rt_flags
| NOUVEAU_BO_OR
,
109 chan
->vram
->handle
, chan
->gart
->handle
);
110 so_method(so
, rankine
, NV34TCL_ZETA_OFFSET
, 1);
111 so_reloc (so
, nouveau_bo(nv30mt
->buffer
), zeta
->base
.offset
,
112 rt_flags
| NOUVEAU_BO_LOW
, 0, 0);
113 /* TODO: allocate LMA depth buffer */
116 so_method(so
, rankine
, NV34TCL_RT_ENABLE
, 1);
117 so_data (so
, rt_enable
);
118 so_method(so
, rankine
, NV34TCL_RT_HORIZ
, 3);
119 so_data (so
, (w
<< 16) | 0);
120 so_data (so
, (h
<< 16) | 0);
121 so_data (so
, rt_format
);
122 so_method(so
, rankine
, NV34TCL_VIEWPORT_HORIZ
, 2);
123 so_data (so
, (w
<< 16) | 0);
124 so_data (so
, (h
<< 16) | 0);
125 so_method(so
, rankine
, NV34TCL_VIEWPORT_CLIP_HORIZ(0), 2);
126 so_data (so
, ((w
- 1) << 16) | 0);
127 so_data (so
, ((h
- 1) << 16) | 0);
128 so_method(so
, rankine
, 0x1d88, 1);
129 so_data (so
, (1 << 12) | h
);
130 /* Wonder why this is needed, context should all be set to zero on init */
131 so_method(so
, rankine
, NV34TCL_VIEWPORT_TX_ORIGIN
, 1);
134 so_ref(so
, &nv30
->state
.hw
[NV30_STATE_FB
]);
139 struct nv30_state_entry nv30_state_framebuffer
= {
140 .validate
= nv30_state_framebuffer_validate
,