src/gallium/drivers/nv40/nv40_screen.c

   1 #include "pipe/p_screen.h"
   2
   3 #include "nv40_context.h"
   4 #include "nvfx_screen.h"
   5
   6 #define NV4X_GRCLASS4097_CHIPSETS 0x00000baf
   7 #define NV4X_GRCLASS4497_CHIPSETS 0x00005450
   8 #define NV6X_GRCLASS4497_CHIPSETS 0x00000088
   9
  10 static int
  11 nv40_screen_get_param(struct pipe_screen *pscreen, int param)
  12 {
  13         struct nvfx_screen *screen = nvfx_screen(pscreen);
  14
  15         switch (param) {
  16         case PIPE_CAP_MAX_TEXTURE_IMAGE_UNITS:
  17                 return 16;
  18         case PIPE_CAP_NPOT_TEXTURES:
  19                 return 1;
  20         case PIPE_CAP_TWO_SIDED_STENCIL:
  21                 return 1;
  22         case PIPE_CAP_GLSL:
  23                 return 0;
  24         case PIPE_CAP_ANISOTROPIC_FILTER:
  25                 return 1;
  26         case PIPE_CAP_POINT_SPRITE:
  27                 return 1;
  28         case PIPE_CAP_MAX_RENDER_TARGETS:
  29                 return 4;
  30         case PIPE_CAP_OCCLUSION_QUERY:
  31                 return 1;
  32         case PIPE_CAP_TEXTURE_SHADOW_MAP:
  33                 return 1;
  34         case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
  35                 return 13;
  36         case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
  37                 return 10;
  38         case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
  39                 return 13;
  40         case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
  41         case PIPE_CAP_TEXTURE_MIRROR_REPEAT:
  42                 return 1;
  43         case PIPE_CAP_MAX_VERTEX_TEXTURE_UNITS:
  44                 return 0; /* We have 4 - but unsupported currently */
  45         case PIPE_CAP_TGSI_CONT_SUPPORTED:
  46                 return 0;
  47         case PIPE_CAP_BLEND_EQUATION_SEPARATE:
  48                 return 1;
  49         case NOUVEAU_CAP_HW_VTXBUF:
  50                 return 1;
  51         case NOUVEAU_CAP_HW_IDXBUF:
  52                 if (screen->eng3d->grclass == NV40TCL)
  53                         return 1;
  54                 return 0;
  55         case PIPE_CAP_INDEP_BLEND_ENABLE:
  56                 return 0;
  57         case PIPE_CAP_INDEP_BLEND_FUNC:
  58                 return 0;
  59         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
  60         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
  61                 return 1;
  62         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
  63         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
  64                 return 0;
  65         case PIPE_CAP_MAX_COMBINED_SAMPLERS:
  66                 return 16;
  67         default:
  68                 NOUVEAU_ERR("Unknown PIPE_CAP %d\n", param);
  69                 return 0;
  70         }
  71 }
  72
  73 static float
  74 nv40_screen_get_paramf(struct pipe_screen *pscreen, int param)
  75 {
  76         switch (param) {
  77         case PIPE_CAP_MAX_LINE_WIDTH:
  78         case PIPE_CAP_MAX_LINE_WIDTH_AA:
  79                 return 10.0;
  80         case PIPE_CAP_MAX_POINT_WIDTH:
  81         case PIPE_CAP_MAX_POINT_WIDTH_AA:
  82                 return 64.0;
  83         case PIPE_CAP_MAX_TEXTURE_ANISOTROPY:
  84                 return 16.0;
  85         case PIPE_CAP_MAX_TEXTURE_LOD_BIAS:
  86                 return 16.0;
  87         default:
  88                 NOUVEAU_ERR("Unknown PIPE_CAP %d\n", param);
  89                 return 0.0;
  90         }
  91 }
  92
  93 static boolean
  94 nv40_screen_surface_format_supported(struct pipe_screen *pscreen,
  95                                      enum pipe_format format,
  96                                      enum pipe_texture_target target,
  97                                      unsigned tex_usage, unsigned geom_flags)
  98 {
  99         if (tex_usage & PIPE_TEXTURE_USAGE_RENDER_TARGET) {
 100                 switch (format) {
 101                 case PIPE_FORMAT_B8G8R8A8_UNORM:
 102                 case PIPE_FORMAT_B5G6R5_UNORM:
 103                         return TRUE;
 104                 default:
 105                         break;
 106                 }
 107         } else
 108         if (tex_usage & PIPE_TEXTURE_USAGE_DEPTH_STENCIL) {
 109                 switch (format) {
 110                 case PIPE_FORMAT_S8Z24_UNORM:
 111                 case PIPE_FORMAT_X8Z24_UNORM:
 112                 case PIPE_FORMAT_Z16_UNORM:
 113                         return TRUE;
 114                 default:
 115                         break;
 116                 }
 117         } else {
 118                 switch (format) {
 119                 case PIPE_FORMAT_B8G8R8A8_UNORM:
 120                 case PIPE_FORMAT_B5G5R5A1_UNORM:
 121                 case PIPE_FORMAT_B4G4R4A4_UNORM:
 122                 case PIPE_FORMAT_B5G6R5_UNORM:
 123                 case PIPE_FORMAT_R16_SNORM:
 124                 case PIPE_FORMAT_L8_UNORM:
 125                 case PIPE_FORMAT_A8_UNORM:
 126                 case PIPE_FORMAT_I8_UNORM:
 127                 case PIPE_FORMAT_L8A8_UNORM:
 128                 case PIPE_FORMAT_Z16_UNORM:
 129                 case PIPE_FORMAT_S8Z24_UNORM:
 130                 case PIPE_FORMAT_DXT1_RGB:
 131                 case PIPE_FORMAT_DXT1_RGBA:
 132                 case PIPE_FORMAT_DXT3_RGBA:
 133                 case PIPE_FORMAT_DXT5_RGBA:
 134                         return TRUE;
 135                 default:
 136                         break;
 137                 }
 138         }
 139
 140         return FALSE;
 141 }
 142
 143 static struct pipe_buffer *
 144 nv40_surface_buffer(struct pipe_surface *surf)
 145 {
 146         struct nvfx_miptree *mt = (struct nvfx_miptree *)surf->texture;
 147
 148         return mt->buffer;
 149 }
 150
 151 static void
 152 nv40_screen_destroy(struct pipe_screen *pscreen)
 153 {
 154         struct nvfx_screen *screen = nvfx_screen(pscreen);
 155         unsigned i;
 156
 157         for (i = 0; i < NVFX_STATE_MAX; i++) {
 158                 if (screen->state[i])
 159                         so_ref(NULL, &screen->state[i]);
 160         }
 161
 162         nouveau_resource_destroy(&screen->vp_exec_heap);
 163         nouveau_resource_destroy(&screen->vp_data_heap);
 164         nouveau_resource_destroy(&screen->query_heap);
 165         nouveau_notifier_free(&screen->query);
 166         nouveau_notifier_free(&screen->sync);
 167         nouveau_grobj_free(&screen->eng3d);
 168         nv04_surface_2d_takedown(&screen->eng2d);
 169
 170         nouveau_screen_fini(&screen->base);
 171
 172         FREE(pscreen);
 173 }
 174
 175 struct pipe_screen *
 176 nv40_screen_create(struct pipe_winsys *ws, struct nouveau_device *dev)
 177 {
 178         struct nvfx_screen *screen = CALLOC_STRUCT(nvfx_screen);
 179         struct nouveau_channel *chan;
 180         struct pipe_screen *pscreen;
 181         struct nouveau_stateobj *so;
 182         unsigned eng3d_class = 0;
 183         int ret;
 184
 185         if (!screen)
 186                 return NULL;
 187
 188         screen->is_nv4x = ~0;
 189
 190         pscreen = &screen->base.base;
 191
 192         ret = nouveau_screen_init(&screen->base, dev);
 193         if (ret) {
 194                 nv40_screen_destroy(pscreen);
 195                 return NULL;
 196         }
 197         chan = screen->base.channel;
 198
 199         pscreen->winsys = ws;
 200         pscreen->destroy = nv40_screen_destroy;
 201         pscreen->get_param = nv40_screen_get_param;
 202         pscreen->get_paramf = nv40_screen_get_paramf;
 203         pscreen->is_format_supported = nv40_screen_surface_format_supported;
 204         pscreen->context_create = nv40_create;
 205
 206         nvfx_screen_init_miptree_functions(pscreen);
 207
 208         /* 3D object */
 209         switch (dev->chipset & 0xf0) {
 210         case 0x40:
 211                 if (NV4X_GRCLASS4097_CHIPSETS & (1 << (dev->chipset & 0x0f)))
 212                         eng3d_class = NV40TCL;
 213                 else
 214                 if (NV4X_GRCLASS4497_CHIPSETS & (1 << (dev->chipset & 0x0f)))
 215                         eng3d_class = NV44TCL;
 216                 break;
 217         case 0x60:
 218                 if (NV6X_GRCLASS4497_CHIPSETS & (1 << (dev->chipset & 0x0f)))
 219                         eng3d_class = NV44TCL;
 220                 break;
 221         }
 222
 223         if (!eng3d_class) {
 224                 NOUVEAU_ERR("Unknown nv4x chipset: nv%02x\n", dev->chipset);
 225                 return NULL;
 226         }
 227
 228         ret = nouveau_grobj_alloc(chan, 0xbeef3097, eng3d_class, &screen->eng3d);
 229         if (ret) {
 230                 NOUVEAU_ERR("Error creating 3D object: %d\n", ret);
 231                 return FALSE;
 232         }
 233
 234         /* 2D engine setup */
 235         screen->eng2d = nv04_surface_2d_init(&screen->base);
 236         screen->eng2d->buf = nv40_surface_buffer;
 237
 238         /* Notifier for sync purposes */
 239         ret = nouveau_notifier_alloc(chan, 0xbeef0301, 1, &screen->sync);
 240         if (ret) {
 241                 NOUVEAU_ERR("Error creating notifier object: %d\n", ret);
 242                 nv40_screen_destroy(pscreen);
 243                 return NULL;
 244         }
 245
 246         /* Query objects */
 247         ret = nouveau_notifier_alloc(chan, 0xbeef0302, 32, &screen->query);
 248         if (ret) {
 249                 NOUVEAU_ERR("Error initialising query objects: %d\n", ret);
 250                 nv40_screen_destroy(pscreen);
 251                 return NULL;
 252         }
 253
 254         nouveau_resource_init(&screen->query_heap, 0, 32);
 255         if (ret) {
 256                 NOUVEAU_ERR("Error initialising query object heap: %d\n", ret);
 257                 nv40_screen_destroy(pscreen);
 258                 return NULL;
 259         }
 260
 261         /* Vtxprog resources */
 262         if (nouveau_resource_init(&screen->vp_exec_heap, 0, 512) ||
 263             nouveau_resource_init(&screen->vp_data_heap, 0, 256)) {
 264                 nv40_screen_destroy(pscreen);
 265                 return NULL;
 266         }
 267
 268         /* Static eng3d initialisation */
 269         so = so_new(16, 25, 0);
 270         so_method(so, screen->eng3d, NV34TCL_DMA_NOTIFY, 1);
 271         so_data  (so, screen->sync->handle);
 272         so_method(so, screen->eng3d, NV34TCL_DMA_TEXTURE0, 2);
 273         so_data  (so, chan->vram->handle);
 274         so_data  (so, chan->gart->handle);
 275         so_method(so, screen->eng3d, NV34TCL_DMA_COLOR1, 1);
 276         so_data  (so, chan->vram->handle);
 277         so_method(so, screen->eng3d, NV34TCL_DMA_COLOR0, 2);
 278         so_data  (so, chan->vram->handle);
 279         so_data  (so, chan->vram->handle);
 280         so_method(so, screen->eng3d, NV34TCL_DMA_VTXBUF0, 2);
 281         so_data  (so, chan->vram->handle);
 282         so_data  (so, chan->gart->handle);
 283         so_method(so, screen->eng3d, NV34TCL_DMA_FENCE, 2);
 284         so_data  (so, 0);
 285         so_data  (so, screen->query->handle);
 286         so_method(so, screen->eng3d, NV34TCL_DMA_IN_MEMORY7, 2);
 287         so_data  (so, chan->vram->handle);
 288         so_data  (so, chan->vram->handle);
 289         so_method(so, screen->eng3d, NV40TCL_DMA_COLOR2, 2);
 290         so_data  (so, chan->vram->handle);
 291         so_data  (so, chan->vram->handle);
 292
 293         so_method(so, screen->eng3d, 0x1ea4, 3);
 294         so_data  (so, 0x00000010);
 295         so_data  (so, 0x01000100);
 296         so_data  (so, 0xff800006);
 297
 298         /* vtxprog output routing */
 299         so_method(so, screen->eng3d, 0x1fc4, 1);
 300         so_data  (so, 0x06144321);
 301         so_method(so, screen->eng3d, 0x1fc8, 2);
 302         so_data  (so, 0xedcba987);
 303         so_data  (so, 0x00000021);
 304         so_method(so, screen->eng3d, 0x1fd0, 1);
 305         so_data  (so, 0x00171615);
 306         so_method(so, screen->eng3d, 0x1fd4, 1);
 307         so_data  (so, 0x001b1a19);
 308
 309         so_method(so, screen->eng3d, 0x1ef8, 1);
 310         so_data  (so, 0x0020ffff);
 311         so_method(so, screen->eng3d, 0x1d64, 1);
 312         so_data  (so, 0x00d30000);
 313         so_method(so, screen->eng3d, 0x1e94, 1);
 314         so_data  (so, 0x00000001);
 315
 316         so_emit(chan, so);
 317         so_ref(NULL, &so);
 318         nouveau_pushbuf_flush(chan, 0);
 319
 320         return pscreen;
 321 }
 322