1 #include "pipe/p_screen.h"
2 #include "pipe/p_util.h"
4 #include "nv40_context.h"
5 #include "nv40_screen.h"
7 #define NV4X_GRCLASS4097_CHIPSETS 0x00000baf
8 #define NV4X_GRCLASS4497_CHIPSETS 0x00005450
9 #define NV6X_GRCLASS4497_CHIPSETS 0x00000088
12 nv40_screen_get_name(struct pipe_screen
*pscreen
)
14 struct nv40_screen
*screen
= nv40_screen(pscreen
);
15 static char buffer
[128];
17 snprintf(buffer
, sizeof(buffer
), "NV%02X", screen
->chipset
);
22 nv40_screen_get_vendor(struct pipe_screen
*pscreen
)
28 nv40_screen_get_param(struct pipe_screen
*pscreen
, int param
)
30 struct nv40_screen
*screen
= nv40_screen(pscreen
);
33 case PIPE_CAP_MAX_TEXTURE_IMAGE_UNITS
:
35 case PIPE_CAP_NPOT_TEXTURES
:
37 case PIPE_CAP_TWO_SIDED_STENCIL
:
43 case PIPE_CAP_ANISOTROPIC_FILTER
:
45 case PIPE_CAP_POINT_SPRITE
:
47 case PIPE_CAP_MAX_RENDER_TARGETS
:
49 case PIPE_CAP_OCCLUSION_QUERY
:
51 case PIPE_CAP_TEXTURE_SHADOW_MAP
:
53 case PIPE_CAP_MAX_TEXTURE_2D_LEVELS
:
55 case PIPE_CAP_MAX_TEXTURE_3D_LEVELS
:
57 case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS
:
59 case NOUVEAU_CAP_HW_VTXBUF
:
61 case NOUVEAU_CAP_HW_IDXBUF
:
62 if (screen
->curie
->grclass
== NV40TCL
)
66 NOUVEAU_ERR("Unknown PIPE_CAP %d\n", param
);
72 nv40_screen_get_paramf(struct pipe_screen
*pscreen
, int param
)
75 case PIPE_CAP_MAX_LINE_WIDTH
:
76 case PIPE_CAP_MAX_LINE_WIDTH_AA
:
78 case PIPE_CAP_MAX_POINT_WIDTH
:
79 case PIPE_CAP_MAX_POINT_WIDTH_AA
:
81 case PIPE_CAP_MAX_TEXTURE_ANISOTROPY
:
83 case PIPE_CAP_MAX_TEXTURE_LOD_BIAS
:
85 case PIPE_CAP_BITMAP_TEXCOORD_BIAS
:
88 NOUVEAU_ERR("Unknown PIPE_CAP %d\n", param
);
94 nv40_screen_surface_format_supported(struct pipe_screen
*pscreen
,
95 enum pipe_format format
, uint type
)
100 case PIPE_FORMAT_A8R8G8B8_UNORM
:
101 case PIPE_FORMAT_R5G6B5_UNORM
:
102 case PIPE_FORMAT_Z24S8_UNORM
:
103 case PIPE_FORMAT_Z16_UNORM
:
111 case PIPE_FORMAT_A8R8G8B8_UNORM
:
112 case PIPE_FORMAT_A1R5G5B5_UNORM
:
113 case PIPE_FORMAT_A4R4G4B4_UNORM
:
114 case PIPE_FORMAT_R5G6B5_UNORM
:
115 case PIPE_FORMAT_U_L8
:
116 case PIPE_FORMAT_U_A8
:
117 case PIPE_FORMAT_U_I8
:
118 case PIPE_FORMAT_U_A8_L8
:
119 case PIPE_FORMAT_Z16_UNORM
:
120 case PIPE_FORMAT_Z24S8_UNORM
:
121 #if 0 /* state tracker not up to the task just yet. */
122 case PIPE_FORMAT_DXT1_RGB
:
123 case PIPE_FORMAT_DXT1_RGBA
:
124 case PIPE_FORMAT_DXT3_RGBA
:
125 case PIPE_FORMAT_DXT5_RGBA
:
140 nv40_screen_destroy(struct pipe_screen
*pscreen
)
142 struct nv40_screen
*screen
= nv40_screen(pscreen
);
143 struct nouveau_winsys
*nvws
= screen
->nvws
;
145 nvws
->res_free(&screen
->vp_exec_heap
);
146 nvws
->res_free(&screen
->vp_data_heap
);
147 nvws
->res_free(&screen
->query_heap
);
148 nvws
->notifier_free(&screen
->query
);
149 nvws
->notifier_free(&screen
->sync
);
150 nvws
->grobj_free(&screen
->curie
);
156 nv40_screen_create(struct pipe_winsys
*ws
, struct nouveau_winsys
*nvws
,
159 struct nv40_screen
*screen
= CALLOC_STRUCT(nv40_screen
);
160 struct nouveau_stateobj
*so
;
161 unsigned curie_class
;
166 screen
->chipset
= chipset
;
170 switch (chipset
& 0xf0) {
172 if (NV4X_GRCLASS4097_CHIPSETS
& (1 << (chipset
& 0x0f)))
173 curie_class
= NV40TCL
;
175 if (NV4X_GRCLASS4497_CHIPSETS
& (1 << (chipset
& 0x0f)))
176 curie_class
= NV44TCL
;
179 if (NV6X_GRCLASS4497_CHIPSETS
& (1 << (chipset
& 0x0f)))
180 curie_class
= NV44TCL
;
187 NOUVEAU_ERR("Unknown nv4x chipset: nv%02x\n", chipset
);
191 ret
= nvws
->grobj_alloc(nvws
, curie_class
, &screen
->curie
);
193 NOUVEAU_ERR("Error creating 3D object: %d\n", ret
);
197 /* Notifier for sync purposes */
198 ret
= nvws
->notifier_alloc(nvws
, 1, &screen
->sync
);
200 NOUVEAU_ERR("Error creating notifier object: %d\n", ret
);
201 nv40_screen_destroy(&screen
->pipe
);
206 ret
= nvws
->notifier_alloc(nvws
, 32, &screen
->query
);
208 NOUVEAU_ERR("Error initialising query objects: %d\n", ret
);
209 nv40_screen_destroy(&screen
->pipe
);
213 ret
= nvws
->res_init(&screen
->query_heap
, 0, 32);
215 NOUVEAU_ERR("Error initialising query object heap: %d\n", ret
);
216 nv40_screen_destroy(&screen
->pipe
);
220 /* Vtxprog resources */
221 if (nvws
->res_init(&screen
->vp_exec_heap
, 0, 512) ||
222 nvws
->res_init(&screen
->vp_data_heap
, 0, 256)) {
223 nv40_screen_destroy(&screen
->pipe
);
227 /* Static curie initialisation */
229 so_method(so
, screen
->curie
, NV40TCL_DMA_NOTIFY
, 1);
230 so_data (so
, screen
->sync
->handle
);
231 so_method(so
, screen
->curie
, NV40TCL_DMA_TEXTURE0
, 2);
232 so_data (so
, nvws
->channel
->vram
->handle
);
233 so_data (so
, nvws
->channel
->gart
->handle
);
234 so_method(so
, screen
->curie
, NV40TCL_DMA_COLOR1
, 1);
235 so_data (so
, nvws
->channel
->vram
->handle
);
236 so_method(so
, screen
->curie
, NV40TCL_DMA_COLOR0
, 2);
237 so_data (so
, nvws
->channel
->vram
->handle
);
238 so_data (so
, nvws
->channel
->vram
->handle
);
239 so_method(so
, screen
->curie
, NV40TCL_DMA_VTXBUF0
, 2);
240 so_data (so
, nvws
->channel
->vram
->handle
);
241 so_data (so
, nvws
->channel
->gart
->handle
);
242 so_method(so
, screen
->curie
, NV40TCL_DMA_FENCE
, 2);
244 so_data (so
, screen
->query
->handle
);
245 so_method(so
, screen
->curie
, NV40TCL_DMA_UNK01AC
, 2);
246 so_data (so
, nvws
->channel
->vram
->handle
);
247 so_data (so
, nvws
->channel
->vram
->handle
);
248 so_method(so
, screen
->curie
, NV40TCL_DMA_COLOR2
, 2);
249 so_data (so
, nvws
->channel
->vram
->handle
);
250 so_data (so
, nvws
->channel
->vram
->handle
);
252 so_method(so
, screen
->curie
, 0x1ea4, 3);
253 so_data (so
, 0x00000010);
254 so_data (so
, 0x01000100);
255 so_data (so
, 0xff800006);
257 /* vtxprog output routing */
258 so_method(so
, screen
->curie
, 0x1fc4, 1);
259 so_data (so
, 0x06144321);
260 so_method(so
, screen
->curie
, 0x1fc8, 2);
261 so_data (so
, 0xedcba987);
262 so_data (so
, 0x00000021);
263 so_method(so
, screen
->curie
, 0x1fd0, 1);
264 so_data (so
, 0x00171615);
265 so_method(so
, screen
->curie
, 0x1fd4, 1);
266 so_data (so
, 0x001b1a19);
268 so_method(so
, screen
->curie
, 0x1ef8, 1);
269 so_data (so
, 0x0020ffff);
270 so_method(so
, screen
->curie
, 0x1d64, 1);
271 so_data (so
, 0x00d30000);
272 so_method(so
, screen
->curie
, 0x1e94, 1);
273 so_data (so
, 0x00000001);
277 nvws
->push_flush(nvws
, 0, NULL
);
279 screen
->pipe
.winsys
= ws
;
280 screen
->pipe
.destroy
= nv40_screen_destroy
;
282 screen
->pipe
.get_name
= nv40_screen_get_name
;
283 screen
->pipe
.get_vendor
= nv40_screen_get_vendor
;
284 screen
->pipe
.get_param
= nv40_screen_get_param
;
285 screen
->pipe
.get_paramf
= nv40_screen_get_paramf
;
287 screen
->pipe
.is_format_supported
= nv40_screen_surface_format_supported
;
289 nv40_screen_init_miptree_functions(&screen
->pipe
);
291 return &screen
->pipe
;