src/gallium/drivers/nv50/nv50_program.h

   1 #ifndef __NV50_PROGRAM_H__
   2 #define __NV50_PROGRAM_H__
   3
   4 #include "pipe/p_state.h"
   5 #include "tgsi/tgsi_scan.h"
   6
   7 struct nv50_program_exec {
   8         struct nv50_program_exec *next;
   9
  10         unsigned inst[2];
  11         struct {
  12                 int index;
  13                 unsigned mask;
  14                 unsigned shift;
  15         } param;
  16 };
  17
  18 struct nv50_sreg4 {
  19         uint8_t hw;
  20         uint8_t id_vp;
  21         uint8_t id_fp;
  22
  23         uint8_t mask;
  24         boolean linear;
  25 };
  26
  27 struct nv50_program {
  28         struct pipe_shader_state pipe;
  29         struct tgsi_shader_info info;
  30         boolean translated;
  31
  32         unsigned type;
  33         struct nv50_program_exec *exec_head;
  34         struct nv50_program_exec *exec_tail;
  35         unsigned exec_size;
  36         struct nouveau_resource *data[1];
  37         unsigned data_start[1];
  38
  39         struct nouveau_bo *bo;
  40
  41         float *immd;
  42         unsigned immd_nr;
  43         unsigned param_nr;
  44
  45         struct {
  46                 unsigned high_temp;
  47                 unsigned high_result;
  48
  49                 uint32_t attr[2];
  50                 uint32_t regs[4];
  51
  52                 /* for VPs, io_nr doesn't count 'private' results (PSIZ etc.) */
  53                 unsigned io_nr;
  54                 struct nv50_sreg4 io[PIPE_MAX_SHADER_OUTPUTS];
  55
  56                 /* FP colour inputs, VP/GP back colour outputs */
  57                 struct nv50_sreg4 two_side[2];
  58
  59                 /* VP only */
  60                 uint8_t clpd, clpd_nr;
  61                 uint8_t psiz;
  62         } cfg;
  63 };
  64
  65 #endif