1 #include "pipe/p_context.h"
2 #include "pipe/p_state.h"
3 #include "util/u_inlines.h"
4 #include "util/u_format.h"
6 #include "nouveau/nouveau_util.h"
7 #include "nv50_context.h"
8 #include "nv50_resource.h"
11 struct nv50_context
*nv50
;
26 void (*push
)(struct nouveau_channel
*, void *);
32 emit_b32_1(struct nouveau_channel
*chan
, void *data
)
40 emit_b32_2(struct nouveau_channel
*chan
, void *data
)
49 emit_b32_3(struct nouveau_channel
*chan
, void *data
)
59 emit_b32_4(struct nouveau_channel
*chan
, void *data
)
70 emit_b16_1(struct nouveau_channel
*chan
, void *data
)
78 emit_b16_3(struct nouveau_channel
*chan
, void *data
)
82 OUT_RING(chan
, (v
[1] << 16) | v
[0]);
87 emit_b08_1(struct nouveau_channel
*chan
, void *data
)
95 emit_b08_3(struct nouveau_channel
*chan
, void *data
)
99 OUT_RING(chan
, (v
[2] << 16) | (v
[1] << 8) | v
[0]);
103 emit_vertex(struct push_context
*ctx
, unsigned n
)
105 struct nouveau_grobj
*tesla
= ctx
->nv50
->screen
->tesla
;
106 struct nouveau_channel
*chan
= tesla
->channel
;
109 if (ctx
->edgeflag_attr
< 16) {
110 float *edgeflag
= ctx
->attr
[ctx
->edgeflag_attr
].map
+
111 ctx
->attr
[ctx
->edgeflag_attr
].stride
* n
;
113 if (*edgeflag
!= ctx
->edgeflag
) {
114 BEGIN_RING(chan
, tesla
, NV50TCL_EDGEFLAG_ENABLE
, 1);
115 OUT_RING (chan
, *edgeflag
? 1 : 0);
116 ctx
->edgeflag
= *edgeflag
;
120 BEGIN_RING_NI(chan
, tesla
, NV50TCL_VERTEX_DATA
, ctx
->vtx_size
);
121 for (i
= 0; i
< ctx
->attr_nr
; i
++)
122 ctx
->attr
[i
].push(chan
, ctx
->attr
[i
].map
+ ctx
->attr
[i
].stride
* n
);
126 emit_edgeflag(void *priv
, boolean enabled
)
128 struct push_context
*ctx
= priv
;
129 struct nouveau_grobj
*tesla
= ctx
->nv50
->screen
->tesla
;
130 struct nouveau_channel
*chan
= tesla
->channel
;
132 BEGIN_RING(chan
, tesla
, NV50TCL_EDGEFLAG_ENABLE
, 1);
133 OUT_RING (chan
, enabled
? 1 : 0);
137 emit_elt08(void *priv
, unsigned start
, unsigned count
)
139 struct push_context
*ctx
= priv
;
140 uint8_t *idxbuf
= ctx
->idxbuf
;
143 emit_vertex(ctx
, idxbuf
[start
++]);
147 emit_elt16(void *priv
, unsigned start
, unsigned count
)
149 struct push_context
*ctx
= priv
;
150 uint16_t *idxbuf
= ctx
->idxbuf
;
153 emit_vertex(ctx
, idxbuf
[start
++]);
157 emit_elt32(void *priv
, unsigned start
, unsigned count
)
159 struct push_context
*ctx
= priv
;
160 uint32_t *idxbuf
= ctx
->idxbuf
;
163 emit_vertex(ctx
, idxbuf
[start
++]);
167 emit_verts(void *priv
, unsigned start
, unsigned count
)
170 emit_vertex(priv
, start
++);
174 nv50_push_elements_instanced(struct pipe_context
*pipe
,
175 struct pipe_resource
*idxbuf
,
176 unsigned idxsize
, int idxbias
,
177 unsigned mode
, unsigned start
, unsigned count
,
178 unsigned i_start
, unsigned i_count
)
180 struct nv50_context
*nv50
= nv50_context(pipe
);
181 struct nouveau_grobj
*tesla
= nv50
->screen
->tesla
;
182 struct nouveau_channel
*chan
= tesla
->channel
;
183 struct push_context ctx
;
184 const unsigned p_overhead
= 4 + /* begin/end */
185 4; /* potential edgeflag enable/disable */
186 const unsigned v_overhead
= 1 + /* VERTEX_DATA packet header */
187 2; /* potential edgeflag modification */
188 struct u_split_prim s
;
198 ctx
.edgeflag_attr
= nv50
->vertprog
->cfg
.edgeflag_in
;
200 /* map vertex buffers, determine vertex size */
201 for (i
= 0; i
< nv50
->vtxelt
->num_elements
; i
++) {
202 struct pipe_vertex_element
*ve
= &nv50
->vtxelt
->pipe
[i
];
203 struct pipe_vertex_buffer
*vb
= &nv50
->vtxbuf
[ve
->vertex_buffer_index
];
204 struct nouveau_bo
*bo
= nv50_resource(vb
->buffer
)->bo
;
205 unsigned size
, nr_components
, n
;
207 if (!(nv50
->vbo_fifo
& (1 << i
)))
211 if (nouveau_bo_map(bo
, NOUVEAU_BO_RD
)) {
215 ctx
.attr
[n
].map
= bo
->map
+ vb
->buffer_offset
+ ve
->src_offset
;
216 nouveau_bo_unmap(bo
);
218 ctx
.attr
[n
].stride
= vb
->stride
;
219 ctx
.attr
[n
].divisor
= ve
->instance_divisor
;
220 if (ctx
.attr
[n
].divisor
) {
221 ctx
.attr
[n
].step
= i_start
% ve
->instance_divisor
;
222 ctx
.attr
[n
].map
+= i_start
* vb
->stride
;
225 size
= util_format_get_component_bits(ve
->src_format
,
226 UTIL_FORMAT_COLORSPACE_RGB
, 0);
227 nr_components
= util_format_get_nr_components(ve
->src_format
);
230 switch (nr_components
) {
231 case 1: ctx
.attr
[n
].push
= emit_b08_1
; break;
232 case 2: ctx
.attr
[n
].push
= emit_b16_1
; break;
233 case 3: ctx
.attr
[n
].push
= emit_b08_3
; break;
234 case 4: ctx
.attr
[n
].push
= emit_b32_1
; break;
239 switch (nr_components
) {
240 case 1: ctx
.attr
[n
].push
= emit_b16_1
; break;
241 case 2: ctx
.attr
[n
].push
= emit_b32_1
; break;
242 case 3: ctx
.attr
[n
].push
= emit_b16_3
; break;
243 case 4: ctx
.attr
[n
].push
= emit_b32_2
; break;
245 ctx
.vtx_size
+= (nr_components
+ 1) >> 1;
248 switch (nr_components
) {
249 case 1: ctx
.attr
[n
].push
= emit_b32_1
; break;
250 case 2: ctx
.attr
[n
].push
= emit_b32_2
; break;
251 case 3: ctx
.attr
[n
].push
= emit_b32_3
; break;
252 case 4: ctx
.attr
[n
].push
= emit_b32_4
; break;
254 ctx
.vtx_size
+= nr_components
;
261 vtx_size
= ctx
.vtx_size
+ v_overhead
;
263 /* map index buffer, if present */
265 struct nouveau_bo
*bo
= nv50_resource(idxbuf
)->bo
;
267 if (nouveau_bo_map(bo
, NOUVEAU_BO_RD
)) {
271 ctx
.idxbuf
= bo
->map
;
272 ctx
.idxsize
= idxsize
;
273 assert(idxbias
== 0);
274 nouveau_bo_unmap(bo
);
278 s
.edge
= emit_edgeflag
;
290 /* per-instance loop */
291 BEGIN_RING(chan
, tesla
, NV50TCL_CB_ADDR
, 2);
292 OUT_RING (chan
, NV50_CB_AUX
| (24 << 8));
293 OUT_RING (chan
, i_start
);
298 for (i
= 0; i
< ctx
.attr_nr
; i
++) {
299 if (!ctx
.attr
[i
].divisor
||
300 ctx
.attr
[i
].divisor
!= ++ctx
.attr
[i
].step
)
302 ctx
.attr
[i
].step
= 0;
303 ctx
.attr
[i
].map
+= ctx
.attr
[i
].stride
;
306 u_split_prim_init(&s
, mode
, start
, count
);
308 if (AVAIL_RING(chan
) < p_overhead
+ (6 * vtx_size
)) {
310 if (!nv50_state_validate(nv50
, p_overhead
+ (6 * vtx_size
))) {
316 max_verts
= AVAIL_RING(chan
);
317 max_verts
-= p_overhead
;
318 max_verts
/= vtx_size
;
320 BEGIN_RING(chan
, tesla
, NV50TCL_VERTEX_BEGIN
, 1);
321 OUT_RING (chan
, nv50_prim(s
.mode
) | (nzi
? (1 << 28) : 0));
322 done
= u_split_prim_next(&s
, max_verts
);
323 BEGIN_RING(chan
, tesla
, NV50TCL_VERTEX_END
, 1);