src/gallium/drivers/nv50/nv50_screen.c

   1 /*
   2  * Copyright 2008 Ben Skeggs
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
  18  * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
  19  * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  20  * SOFTWARE.
  21  */
  22
  23 #include "pipe/p_screen.h"
  24
  25 #include "nv50_context.h"
  26 #include "nv50_screen.h"
  27
  28 #include "nouveau/nouveau_stateobj.h"
  29
  30 #define NV5X_GRCLASS5097_CHIPSETS 0x00000001
  31 #define NV8X_GRCLASS8297_CHIPSETS 0x00000050
  32 #define NV9X_GRCLASS8297_CHIPSETS 0x00000014
  33
  34 static boolean
  35 nv50_screen_is_format_supported(struct pipe_screen *pscreen,
  36                                 enum pipe_format format,
  37                                 enum pipe_texture_target target,
  38                                 unsigned tex_usage, unsigned geom_flags)
  39 {
  40         if (tex_usage & PIPE_TEXTURE_USAGE_RENDER_TARGET) {
  41                 switch (format) {
  42                 case PIPE_FORMAT_A8R8G8B8_UNORM:
  43                 case PIPE_FORMAT_R5G6B5_UNORM:
  44                 case PIPE_FORMAT_Z24S8_UNORM:
  45                 case PIPE_FORMAT_Z16_UNORM:
  46                         return TRUE;
  47                 default:
  48                         break;
  49                 }
  50         } else {
  51                 switch (format) {
  52                 case PIPE_FORMAT_A8R8G8B8_UNORM:
  53                 case PIPE_FORMAT_A1R5G5B5_UNORM:
  54                 case PIPE_FORMAT_A4R4G4B4_UNORM:
  55                 case PIPE_FORMAT_R5G6B5_UNORM:
  56                 case PIPE_FORMAT_L8_UNORM:
  57                 case PIPE_FORMAT_A8_UNORM:
  58                 case PIPE_FORMAT_I8_UNORM:
  59                 case PIPE_FORMAT_A8L8_UNORM:
  60                         return TRUE;
  61                 default:
  62                         break;
  63                 }
  64         }
  65
  66         return FALSE;
  67 }
  68
  69 static const char *
  70 nv50_screen_get_name(struct pipe_screen *pscreen)
  71 {
  72         struct nv50_screen *screen = nv50_screen(pscreen);
  73         struct nouveau_device *dev = screen->nvws->channel->device;
  74         static char buffer[128];
  75
  76         snprintf(buffer, sizeof(buffer), "NV%02X", dev->chipset);
  77         return buffer;
  78 }
  79
  80 static const char *
  81 nv50_screen_get_vendor(struct pipe_screen *pscreen)
  82 {
  83         return "nouveau";
  84 }
  85
  86 static int
  87 nv50_screen_get_param(struct pipe_screen *pscreen, int param)
  88 {
  89         switch (param) {
  90         case PIPE_CAP_MAX_TEXTURE_IMAGE_UNITS:
  91                 return 32;
  92         case PIPE_CAP_NPOT_TEXTURES:
  93                 return 0;
  94         case PIPE_CAP_TWO_SIDED_STENCIL:
  95                 return 1;
  96         case PIPE_CAP_GLSL:
  97                 return 0;
  98         case PIPE_CAP_S3TC:
  99                 return 0;
 100         case PIPE_CAP_ANISOTROPIC_FILTER:
 101                 return 0;
 102         case PIPE_CAP_POINT_SPRITE:
 103                 return 0;
 104         case PIPE_CAP_MAX_RENDER_TARGETS:
 105                 return 8;
 106         case PIPE_CAP_OCCLUSION_QUERY:
 107                 return 0;
 108         case PIPE_CAP_TEXTURE_SHADOW_MAP:
 109                 return 0;
 110         case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
 111                 return 13;
 112         case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
 113                 return 10;
 114         case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
 115                 return 13;
 116         case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
 117         case PIPE_CAP_TEXTURE_MIRROR_REPEAT:
 118                 return 1;
 119         case NOUVEAU_CAP_HW_VTXBUF:
 120                 return 1;
 121         case NOUVEAU_CAP_HW_IDXBUF:
 122                 return 0;
 123         default:
 124                 NOUVEAU_ERR("Unknown PIPE_CAP %d\n", param);
 125                 return 0;
 126         }
 127 }
 128
 129 static float
 130 nv50_screen_get_paramf(struct pipe_screen *pscreen, int param)
 131 {
 132         switch (param) {
 133         case PIPE_CAP_MAX_LINE_WIDTH:
 134         case PIPE_CAP_MAX_LINE_WIDTH_AA:
 135                 return 10.0;
 136         case PIPE_CAP_MAX_POINT_WIDTH:
 137         case PIPE_CAP_MAX_POINT_WIDTH_AA:
 138                 return 64.0;
 139         case PIPE_CAP_MAX_TEXTURE_ANISOTROPY:
 140                 return 16.0;
 141         case PIPE_CAP_MAX_TEXTURE_LOD_BIAS:
 142                 return 4.0;
 143         default:
 144                 NOUVEAU_ERR("Unknown PIPE_CAP %d\n", param);
 145                 return 0.0;
 146         }
 147 }
 148
 149 static void
 150 nv50_screen_destroy(struct pipe_screen *pscreen)
 151 {
 152         FREE(pscreen);
 153 }
 154
 155 struct pipe_screen *
 156 nv50_screen_create(struct pipe_winsys *ws, struct nouveau_winsys *nvws)
 157 {
 158         struct nv50_screen *screen = CALLOC_STRUCT(nv50_screen);
 159         struct nouveau_stateobj *so;
 160         unsigned tesla_class = 0, ret;
 161         unsigned chipset = nvws->channel->device->chipset;
 162         int i;
 163
 164         if (!screen)
 165                 return NULL;
 166         screen->nvws = nvws;
 167
 168         /* 3D object */
 169         if ((chipset & 0xf0) != 0x50 && (chipset & 0xf0) != 0x80) {
 170                 NOUVEAU_ERR("Not a G8x chipset\n");
 171                 nv50_screen_destroy(&screen->pipe);
 172                 return NULL;
 173         }
 174
 175         switch (chipset & 0xf0) {
 176         case 0x50:
 177                 if (NV5X_GRCLASS5097_CHIPSETS & (1 << (chipset & 0x0f)))
 178                         tesla_class = 0x5097;
 179                 break;
 180         case 0x80:
 181                 if (NV8X_GRCLASS8297_CHIPSETS & (1 << (chipset & 0x0f)))
 182                         tesla_class = 0x8297;
 183                 break;
 184         case 0x90:
 185                 if (NV9X_GRCLASS8297_CHIPSETS & (1 << (chipset & 0x0f)))
 186                         tesla_class = 0x8297;
 187                 break;
 188         default:
 189                 break;
 190         }
 191
 192         if (tesla_class == 0) {
 193                 NOUVEAU_ERR("Unknown G8x chipset: NV%02x\n", chipset);
 194                 nv50_screen_destroy(&screen->pipe);
 195                 return NULL;
 196         }
 197
 198         ret = nvws->grobj_alloc(nvws, tesla_class, &screen->tesla);
 199         if (ret) {
 200                 NOUVEAU_ERR("Error creating 3D object: %d\n", ret);
 201                 nv50_screen_destroy(&screen->pipe);
 202                 return NULL;
 203         }
 204
 205         /* Sync notifier */
 206         ret = nvws->notifier_alloc(nvws, 1, &screen->sync);
 207         if (ret) {
 208                 NOUVEAU_ERR("Error creating notifier object: %d\n", ret);
 209                 nv50_screen_destroy(&screen->pipe);
 210                 return NULL;
 211         }
 212
 213         /* Static tesla init */
 214         so = so_new(256, 20);
 215
 216         so_method(so, screen->tesla, 0x1558, 1);
 217         so_data  (so, 1);
 218         so_method(so, screen->tesla, NV50TCL_DMA_NOTIFY, 1);
 219         so_data  (so, screen->sync->handle);
 220         so_method(so, screen->tesla, NV50TCL_DMA_UNK0(0),
 221                                      NV50TCL_DMA_UNK0__SIZE);
 222         for (i = 0; i < NV50TCL_DMA_UNK0__SIZE; i++)
 223                 so_data(so, nvws->channel->vram->handle);
 224         so_method(so, screen->tesla, NV50TCL_DMA_UNK1(0),
 225                                      NV50TCL_DMA_UNK1__SIZE);
 226         for (i = 0; i < NV50TCL_DMA_UNK1__SIZE; i++)
 227                 so_data(so, nvws->channel->vram->handle);
 228         so_method(so, screen->tesla, 0x121c, 1);
 229         so_data  (so, 1);
 230
 231         so_method(so, screen->tesla, 0x13bc, 1);
 232         so_data  (so, 0x54);
 233         so_method(so, screen->tesla, 0x13ac, 1);
 234         so_data  (so, 1);
 235         so_method(so, screen->tesla, 0x16b8, 1);
 236         so_data  (so, 8);
 237
 238         /* Shared constant buffer */
 239         screen->constbuf = ws->buffer_create(ws, 0, 0, 128 * 4 * 4);
 240         if (nvws->res_init(&screen->vp_data_heap, 0, 128)) {
 241                 NOUVEAU_ERR("Error initialising constant buffer\n");
 242                 nv50_screen_destroy(&screen->pipe);
 243                 return NULL;
 244         }
 245
 246         so_method(so, screen->tesla, 0x1280, 3);
 247         so_reloc (so, screen->constbuf, 0, NOUVEAU_BO_VRAM |
 248                   NOUVEAU_BO_RD | NOUVEAU_BO_HIGH, 0, 0);
 249         so_reloc (so, screen->constbuf, 0, NOUVEAU_BO_VRAM |
 250                   NOUVEAU_BO_RD | NOUVEAU_BO_LOW, 0, 0);
 251         so_data  (so, (NV50_CB_PMISC << 16) | 0x00001000);
 252
 253         /* Texture sampler/image unit setup - we abuse the constant buffer
 254          * upload mechanism for the moment to upload data to the tex config
 255          * blocks.  At some point we *may* want to go the NVIDIA way of doing
 256          * things?
 257          */
 258         screen->tic = ws->buffer_create(ws, 0, 0, 32 * 8 * 4);
 259         so_method(so, screen->tesla, 0x1280, 3);
 260         so_reloc (so, screen->tic, 0, NOUVEAU_BO_VRAM |
 261                   NOUVEAU_BO_RD | NOUVEAU_BO_HIGH, 0, 0);
 262         so_reloc (so, screen->tic, 0, NOUVEAU_BO_VRAM |
 263                   NOUVEAU_BO_RD | NOUVEAU_BO_LOW, 0, 0);
 264         so_data  (so, (NV50_CB_TIC << 16) | 0x0800);
 265         so_method(so, screen->tesla, 0x1574, 3);
 266         so_reloc (so, screen->tic, 0, NOUVEAU_BO_VRAM |
 267                   NOUVEAU_BO_RD | NOUVEAU_BO_HIGH, 0, 0);
 268         so_reloc (so, screen->tic, 0, NOUVEAU_BO_VRAM |
 269                   NOUVEAU_BO_RD | NOUVEAU_BO_LOW, 0, 0);
 270         so_data  (so, 0x00000800);
 271
 272         screen->tsc = ws->buffer_create(ws, 0, 0, 32 * 8 * 4);
 273         so_method(so, screen->tesla, 0x1280, 3);
 274         so_reloc (so, screen->tsc, 0, NOUVEAU_BO_VRAM |
 275                   NOUVEAU_BO_RD | NOUVEAU_BO_HIGH, 0, 0);
 276         so_reloc (so, screen->tsc, 0, NOUVEAU_BO_VRAM |
 277                   NOUVEAU_BO_RD | NOUVEAU_BO_LOW, 0, 0);
 278         so_data  (so, (NV50_CB_TSC << 16) | 0x0800);
 279         so_method(so, screen->tesla, 0x155c, 3);
 280         so_reloc (so, screen->tsc, 0, NOUVEAU_BO_VRAM |
 281                   NOUVEAU_BO_RD | NOUVEAU_BO_HIGH, 0, 0);
 282         so_reloc (so, screen->tsc, 0, NOUVEAU_BO_VRAM |
 283                   NOUVEAU_BO_RD | NOUVEAU_BO_LOW, 0, 0);
 284         so_data  (so, 0x00000800);
 285
 286
 287         /* Vertex array limits - max them out */
 288         for (i = 0; i < 16; i++) {
 289                 so_method(so, screen->tesla, 0x1080 + (i * 8), 2);
 290                 so_data  (so, 0x000000ff);
 291                 so_data  (so, 0xffffffff);
 292         }
 293
 294         so_method(so, screen->tesla, NV50TCL_DEPTH_RANGE_NEAR, 2);
 295         so_data  (so, fui(0.0));
 296         so_data  (so, fui(1.0));
 297
 298         so_method(so, screen->tesla, 0x1234, 1);
 299         so_data  (so, 1);
 300         so_method(so, screen->tesla, 0x1458, 1);
 301         so_data  (so, 1);
 302
 303         so_emit(nvws, so);
 304         so_ref(so, &screen->static_init);
 305         nvws->push_flush(nvws, 0, NULL);
 306
 307         screen->pipe.winsys = ws;
 308
 309         screen->pipe.destroy = nv50_screen_destroy;
 310
 311         screen->pipe.get_name = nv50_screen_get_name;
 312         screen->pipe.get_vendor = nv50_screen_get_vendor;
 313         screen->pipe.get_param = nv50_screen_get_param;
 314         screen->pipe.get_paramf = nv50_screen_get_paramf;
 315
 316         screen->pipe.is_format_supported = nv50_screen_is_format_supported;
 317
 318         nv50_screen_init_miptree_functions(&screen->pipe);
 319         nv50_surface_init_screen_functions(&screen->pipe);
 320
 321         return &screen->pipe;
 322 }
 323