2 * © Copyright 2018 Alyssa Rosenzweig
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
29 #include "pan_context.h"
30 #include "pan_format.h"
33 #include "compiler/nir/nir.h"
34 #include "nir/tgsi_to_nir.h"
35 #include "midgard/midgard_compile.h"
36 #include "util/u_dynarray.h"
38 #include "tgsi/tgsi_dump.h"
41 panfrost_shader_compile(
42 struct panfrost_context
*ctx
,
43 struct mali_shader_meta
*meta
,
44 enum pipe_shader_ir ir_type
,
46 gl_shader_stage stage
,
47 struct panfrost_shader_state
*state
,
48 uint64_t *outputs_written
)
50 struct panfrost_screen
*screen
= pan_screen(ctx
->base
.screen
);
55 if (ir_type
== PIPE_SHADER_IR_NIR
) {
56 s
= nir_shader_clone(NULL
, ir
);
58 assert (ir_type
== PIPE_SHADER_IR_TGSI
);
59 s
= tgsi_to_nir(ir
, ctx
->base
.screen
);
62 s
->info
.stage
= stage
;
64 /* Call out to Midgard compiler given the above NIR */
66 midgard_program program
= {
67 .alpha_ref
= state
->alpha_state
.ref_value
70 midgard_compile_shader_nir(s
, &program
, false, 0, screen
->gpu_id
,
71 pan_debug
& PAN_DBG_PRECOMPILE
);
73 /* Prepare the compiled binary for upload */
74 int size
= program
.compiled
.size
;
75 dst
= program
.compiled
.data
;
77 /* Upload the shader. The lookahead tag is ORed on as a tagged pointer.
78 * I bet someone just thought that would be a cute pun. At least,
79 * that's how I'd do it. */
82 state
->bo
= panfrost_bo_create(screen
, size
, PAN_BO_EXECUTE
);
83 memcpy(state
->bo
->cpu
, dst
, size
);
84 meta
->shader
= state
->bo
->gpu
| program
.first_tag
;
86 /* No shader. Use dummy tag to avoid INSTR_INVALID_ENC */
87 meta
->shader
= 0x0 | 1;
90 util_dynarray_fini(&program
.compiled
);
92 /* Sysvals are prepended */
93 program
.uniform_count
+= program
.sysval_count
;
94 state
->sysval_count
= program
.sysval_count
;
95 memcpy(state
->sysval
, program
.sysvals
, sizeof(state
->sysval
[0]) * state
->sysval_count
);
97 meta
->midgard1
.uniform_count
= MIN2(program
.uniform_count
, program
.uniform_cutoff
);
98 meta
->midgard1
.work_count
= program
.work_register_count
;
100 bool vertex_id
= s
->info
.system_values_read
& (1 << SYSTEM_VALUE_VERTEX_ID
);
101 bool instance_id
= s
->info
.system_values_read
& (1 << SYSTEM_VALUE_INSTANCE_ID
);
104 case MESA_SHADER_VERTEX
:
105 meta
->attribute_count
= util_bitcount64(s
->info
.inputs_read
);
106 meta
->varying_count
= util_bitcount64(s
->info
.outputs_written
);
109 meta
->attribute_count
= MAX2(meta
->attribute_count
, PAN_VERTEX_ID
+ 1);
112 meta
->attribute_count
= MAX2(meta
->attribute_count
, PAN_INSTANCE_ID
+ 1);
115 case MESA_SHADER_FRAGMENT
:
116 meta
->attribute_count
= 0;
117 meta
->varying_count
= util_bitcount64(s
->info
.inputs_read
);
118 if (s
->info
.outputs_written
& BITFIELD64_BIT(FRAG_RESULT_DEPTH
))
119 state
->writes_depth
= true;
120 if (s
->info
.outputs_written
& BITFIELD64_BIT(FRAG_RESULT_STENCIL
))
121 state
->writes_stencil
= true;
123 case MESA_SHADER_COMPUTE
:
125 meta
->attribute_count
= 0;
126 meta
->varying_count
= 0;
127 state
->shared_size
= s
->info
.cs
.shared_size
;
130 unreachable("Unknown shader state");
133 state
->can_discard
= s
->info
.fs
.uses_discard
;
134 state
->writes_point_size
= program
.writes_point_size
;
135 state
->reads_point_coord
= false;
136 state
->helper_invocations
= s
->info
.fs
.needs_helper_invocations
;
137 state
->stack_size
= program
.tls_size
;
140 *outputs_written
= s
->info
.outputs_written
;
142 /* Separate as primary uniform count is truncated */
143 state
->uniform_count
= program
.uniform_count
;
145 meta
->midgard1
.flags_hi
= 8; /* XXX */
147 unsigned default_vec1_swizzle
= panfrost_get_default_swizzle(1);
148 unsigned default_vec2_swizzle
= panfrost_get_default_swizzle(2);
149 unsigned default_vec4_swizzle
= panfrost_get_default_swizzle(4);
151 /* Iterate the varyings and emit the corresponding descriptor */
152 for (unsigned i
= 0; i
< meta
->varying_count
; ++i
) {
153 unsigned location
= program
.varyings
[i
];
155 /* Default to a vec4 varying */
156 struct mali_attr_meta v
= {
157 .format
= program
.varying_type
[i
],
158 .swizzle
= default_vec4_swizzle
,
162 /* Check for special cases, otherwise assume general varying */
164 if (location
== VARYING_SLOT_POS
) {
165 if (stage
== MESA_SHADER_FRAGMENT
)
166 state
->reads_frag_coord
= true;
168 v
.format
= MALI_VARYING_POS
;
169 } else if (location
== VARYING_SLOT_PSIZ
) {
170 v
.format
= MALI_R16F
;
171 v
.swizzle
= default_vec1_swizzle
;
173 state
->writes_point_size
= true;
174 } else if (location
== VARYING_SLOT_PNTC
) {
175 v
.format
= MALI_RG16F
;
176 v
.swizzle
= default_vec2_swizzle
;
178 state
->reads_point_coord
= true;
179 } else if (location
== VARYING_SLOT_FACE
) {
180 v
.format
= MALI_R32I
;
181 v
.swizzle
= default_vec1_swizzle
;
183 state
->reads_face
= true;
186 state
->varyings
[i
] = v
;
187 state
->varyings_loc
[i
] = location
;