2 * © Copyright 2018 Alyssa Rosenzweig
3 * Copyright © 2014-2017 Broadcom
4 * Copyright (C) 2017 Intel Corporation
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
31 #include "pan_context.h"
32 #include "pan_minmax_cache.h"
33 #include "panfrost-quirks.h"
35 #include "util/macros.h"
36 #include "util/format/u_format.h"
37 #include "util/u_inlines.h"
38 #include "util/u_upload_mgr.h"
39 #include "util/u_memory.h"
40 #include "util/u_vbuf.h"
41 #include "util/half_float.h"
42 #include "util/u_helpers.h"
43 #include "util/format/u_format.h"
44 #include "util/u_prim.h"
45 #include "util/u_prim_restart.h"
46 #include "indices/u_primconvert.h"
47 #include "tgsi/tgsi_parse.h"
48 #include "tgsi/tgsi_from_mesa.h"
49 #include "util/u_math.h"
51 #include "pan_screen.h"
52 #include "pan_blending.h"
53 #include "pan_blend_shaders.h"
54 #include "pan_cmdstream.h"
57 #include "util/pan_lower_framebuffer.h"
59 struct midgard_tiler_descriptor
60 panfrost_emit_midg_tiler(struct panfrost_batch
*batch
, unsigned vertex_count
)
62 struct panfrost_device
*device
= pan_device(batch
->ctx
->base
.screen
);
63 bool hierarchy
= !(device
->quirks
& MIDGARD_NO_HIER_TILING
);
64 struct midgard_tiler_descriptor t
= {0};
65 unsigned height
= batch
->key
.height
;
66 unsigned width
= batch
->key
.width
;
69 panfrost_choose_hierarchy_mask(width
, height
, vertex_count
, hierarchy
);
71 /* Compute the polygon header size and use that to offset the body */
73 unsigned header_size
= panfrost_tiler_header_size(
74 width
, height
, t
.hierarchy_mask
, hierarchy
);
76 t
.polygon_list_size
= panfrost_tiler_full_size(
77 width
, height
, t
.hierarchy_mask
, hierarchy
);
80 t
.polygon_list
= panfrost_batch_get_polygon_list(batch
,
85 t
.heap_start
= device
->tiler_heap
->gpu
;
86 t
.heap_end
= device
->tiler_heap
->gpu
+ device
->tiler_heap
->size
;
88 struct panfrost_bo
*tiler_dummy
;
90 tiler_dummy
= panfrost_batch_get_tiler_dummy(batch
);
91 header_size
= MALI_TILER_MINIMUM_HEADER_SIZE
;
93 /* The tiler is disabled, so don't allow the tiler heap */
94 t
.heap_start
= tiler_dummy
->gpu
;
95 t
.heap_end
= t
.heap_start
;
97 /* Use a dummy polygon list */
98 t
.polygon_list
= tiler_dummy
->gpu
;
100 /* Disable the tiler */
102 t
.hierarchy_mask
|= MALI_TILER_DISABLED
;
104 t
.hierarchy_mask
= MALI_TILER_USER
;
105 t
.polygon_list_size
= MALI_TILER_MINIMUM_HEADER_SIZE
+ 4;
107 /* We don't have a WRITE_VALUE job, so write the polygon list manually */
108 uint32_t *polygon_list_body
= (uint32_t *) (tiler_dummy
->cpu
+ header_size
);
109 polygon_list_body
[0] = 0xa0000000; /* TODO: Just that? */
113 t
.polygon_list_body
=
114 t
.polygon_list
+ header_size
;
121 struct pipe_context
*pipe
,
123 const struct pipe_scissor_state
*scissor_state
,
124 const union pipe_color_union
*color
,
125 double depth
, unsigned stencil
)
127 struct panfrost_context
*ctx
= pan_context(pipe
);
129 /* TODO: panfrost_get_fresh_batch_for_fbo() instantiates a new batch if
130 * the existing batch targeting this FBO has draws. We could probably
131 * avoid that by replacing plain clears by quad-draws with a specific
132 * color/depth/stencil value, thus avoiding the generation of extra
135 struct panfrost_batch
*batch
= panfrost_get_fresh_batch_for_fbo(ctx
);
136 panfrost_batch_clear(batch
, buffers
, color
, depth
, stencil
);
140 panfrost_writes_point_size(struct panfrost_context
*ctx
)
142 assert(ctx
->shader
[PIPE_SHADER_VERTEX
]);
143 struct panfrost_shader_state
*vs
= panfrost_get_shader_state(ctx
, PIPE_SHADER_VERTEX
);
145 return vs
->writes_point_size
&& ctx
->active_prim
== PIPE_PRIM_POINTS
;
148 /* Compute number of UBOs active (more specifically, compute the highest UBO
149 * number addressable -- if there are gaps, include them in the count anyway).
150 * We always include UBO #0 in the count, since we *need* uniforms enabled for
154 panfrost_ubo_count(struct panfrost_context
*ctx
, enum pipe_shader_type stage
)
156 unsigned mask
= ctx
->constant_buffer
[stage
].enabled_mask
| 1;
157 return 32 - __builtin_clz(mask
);
160 /* The entire frame is in memory -- send it off to the kernel! */
164 struct pipe_context
*pipe
,
165 struct pipe_fence_handle
**fence
,
168 struct panfrost_context
*ctx
= pan_context(pipe
);
169 struct panfrost_device
*dev
= pan_device(pipe
->screen
);
170 uint32_t syncobj
= 0;
173 drmSyncobjCreate(dev
->fd
, 0, &syncobj
);
175 /* Submit all pending jobs */
176 panfrost_flush_all_batches(ctx
, syncobj
);
179 struct panfrost_fence
*f
= panfrost_fence_create(ctx
, syncobj
);
180 pipe
->screen
->fence_reference(pipe
->screen
, fence
, NULL
);
181 *fence
= (struct pipe_fence_handle
*)f
;
184 if (dev
->debug
& PAN_DBG_TRACE
)
185 pandecode_next_frame();
189 panfrost_texture_barrier(struct pipe_context
*pipe
, unsigned flags
)
191 struct panfrost_context
*ctx
= pan_context(pipe
);
192 panfrost_flush_all_batches(ctx
, 0);
195 #define DEFINE_CASE(c) case PIPE_PRIM_##c: return MALI_DRAW_MODE_##c;
198 g2m_draw_mode(enum pipe_prim_type mode
)
203 DEFINE_CASE(LINE_LOOP
);
204 DEFINE_CASE(LINE_STRIP
);
205 DEFINE_CASE(TRIANGLES
);
206 DEFINE_CASE(TRIANGLE_STRIP
);
207 DEFINE_CASE(TRIANGLE_FAN
);
209 DEFINE_CASE(QUAD_STRIP
);
210 DEFINE_CASE(POLYGON
);
213 unreachable("Invalid draw mode");
220 panfrost_scissor_culls_everything(struct panfrost_context
*ctx
)
222 const struct pipe_scissor_state
*ss
= &ctx
->scissor
;
224 /* Check if we're scissoring at all */
226 if (!ctx
->rasterizer
->base
.scissor
)
229 return (ss
->minx
== ss
->maxx
) || (ss
->miny
== ss
->maxy
);
232 /* Count generated primitives (when there is no geom/tess shaders) for
233 * transform feedback */
236 panfrost_statistics_record(
237 struct panfrost_context
*ctx
,
238 const struct pipe_draw_info
*info
)
240 if (!ctx
->active_queries
)
243 uint32_t prims
= u_prims_for_vertices(info
->mode
, info
->count
);
244 ctx
->prims_generated
+= prims
;
246 if (!ctx
->streamout
.num_targets
)
249 ctx
->tf_prims_generated
+= prims
;
253 panfrost_update_streamout_offsets(struct panfrost_context
*ctx
)
255 for (unsigned i
= 0; i
< ctx
->streamout
.num_targets
; ++i
) {
258 count
= u_stream_outputs_for_vertices(ctx
->active_prim
,
260 ctx
->streamout
.offsets
[i
] += count
;
266 struct pipe_context
*pipe
,
267 const struct pipe_draw_info
*info
)
269 struct panfrost_context
*ctx
= pan_context(pipe
);
271 /* First of all, check the scissor to see if anything is drawn at all.
272 * If it's not, we drop the draw (mostly a conformance issue;
273 * well-behaved apps shouldn't hit this) */
275 if (panfrost_scissor_culls_everything(ctx
))
278 int mode
= info
->mode
;
280 /* Fallback unsupported restart index */
281 unsigned primitive_index
= (1 << (info
->index_size
* 8)) - 1;
283 if (info
->primitive_restart
&& info
->index_size
284 && info
->restart_index
!= primitive_index
) {
285 util_draw_vbo_without_prim_restart(pipe
, info
);
289 /* Fallback for unsupported modes */
291 assert(ctx
->rasterizer
!= NULL
);
293 if (!(ctx
->draw_modes
& (1 << mode
))) {
294 if (info
->count
< 4) {
295 /* Degenerate case? */
299 util_primconvert_save_rasterizer_state(ctx
->primconvert
, &ctx
->rasterizer
->base
);
300 util_primconvert_draw_vbo(ctx
->primconvert
, info
);
304 /* Now that we have a guaranteed terminating path, find the job. */
306 struct panfrost_batch
*batch
= panfrost_get_batch_for_fbo(ctx
);
307 panfrost_batch_set_requirements(batch
);
309 /* Take into account a negative bias */
310 ctx
->vertex_count
= info
->count
+ abs(info
->index_bias
);
311 ctx
->instance_count
= info
->instance_count
;
312 ctx
->active_prim
= info
->mode
;
314 struct mali_vertex_tiler_prefix vertex_prefix
, tiler_prefix
;
315 struct mali_vertex_tiler_postfix vertex_postfix
, tiler_postfix
;
316 union midgard_primitive_size primitive_size
;
317 unsigned vertex_count
;
319 panfrost_vt_init(ctx
, PIPE_SHADER_VERTEX
, &vertex_prefix
, &vertex_postfix
);
320 panfrost_vt_init(ctx
, PIPE_SHADER_FRAGMENT
, &tiler_prefix
, &tiler_postfix
);
322 panfrost_vt_set_draw_info(ctx
, info
, g2m_draw_mode(mode
),
323 &vertex_postfix
, &tiler_prefix
,
324 &tiler_postfix
, &vertex_count
,
327 panfrost_statistics_record(ctx
, info
);
329 panfrost_pack_work_groups_fused(&vertex_prefix
, &tiler_prefix
,
330 1, vertex_count
, info
->instance_count
,
333 /* Emit all sort of descriptors. */
334 panfrost_emit_vertex_data(batch
, &vertex_postfix
);
335 panfrost_emit_varying_descriptor(batch
,
338 &vertex_postfix
, &tiler_postfix
,
340 panfrost_emit_shader_meta(batch
, PIPE_SHADER_VERTEX
, &vertex_postfix
);
341 panfrost_emit_shader_meta(batch
, PIPE_SHADER_FRAGMENT
, &tiler_postfix
);
342 panfrost_emit_sampler_descriptors(batch
, PIPE_SHADER_VERTEX
, &vertex_postfix
);
343 panfrost_emit_sampler_descriptors(batch
, PIPE_SHADER_FRAGMENT
, &tiler_postfix
);
344 panfrost_emit_texture_descriptors(batch
, PIPE_SHADER_VERTEX
, &vertex_postfix
);
345 panfrost_emit_texture_descriptors(batch
, PIPE_SHADER_FRAGMENT
, &tiler_postfix
);
346 panfrost_emit_const_buf(batch
, PIPE_SHADER_VERTEX
, &vertex_postfix
);
347 panfrost_emit_const_buf(batch
, PIPE_SHADER_FRAGMENT
, &tiler_postfix
);
348 panfrost_emit_viewport(batch
, &tiler_postfix
);
350 panfrost_vt_update_primitive_size(ctx
, &tiler_prefix
, &primitive_size
);
352 /* Fire off the draw itself */
353 panfrost_emit_vertex_tiler_jobs(batch
, &vertex_prefix
, &vertex_postfix
,
354 &tiler_prefix
, &tiler_postfix
,
357 /* Adjust the batch stack size based on the new shader stack sizes. */
358 panfrost_batch_adjust_stack_size(batch
);
360 /* Increment transform feedback offsets */
361 panfrost_update_streamout_offsets(ctx
);
367 panfrost_generic_cso_delete(struct pipe_context
*pctx
, void *hwcso
)
373 panfrost_create_rasterizer_state(
374 struct pipe_context
*pctx
,
375 const struct pipe_rasterizer_state
*cso
)
377 struct panfrost_rasterizer
*so
= CALLOC_STRUCT(panfrost_rasterizer
);
381 /* Gauranteed with the core GL call, so don't expose ARB_polygon_offset */
382 assert(cso
->offset_clamp
== 0.0);
388 panfrost_bind_rasterizer_state(
389 struct pipe_context
*pctx
,
392 struct panfrost_context
*ctx
= pan_context(pctx
);
394 ctx
->rasterizer
= hwcso
;
399 /* Point sprites are emulated */
401 struct panfrost_shader_state
*variant
= panfrost_get_shader_state(ctx
, PIPE_SHADER_FRAGMENT
);
403 if (ctx
->rasterizer
->base
.sprite_coord_enable
|| (variant
&& variant
->point_sprite_mask
))
404 ctx
->base
.bind_fs_state(&ctx
->base
, ctx
->shader
[PIPE_SHADER_FRAGMENT
]);
408 panfrost_create_vertex_elements_state(
409 struct pipe_context
*pctx
,
410 unsigned num_elements
,
411 const struct pipe_vertex_element
*elements
)
413 struct panfrost_vertex_state
*so
= CALLOC_STRUCT(panfrost_vertex_state
);
414 struct panfrost_device
*dev
= pan_device(pctx
->screen
);
416 so
->num_elements
= num_elements
;
417 memcpy(so
->pipe
, elements
, sizeof(*elements
) * num_elements
);
419 for (int i
= 0; i
< num_elements
; ++i
) {
420 enum pipe_format fmt
= elements
[i
].src_format
;
421 const struct util_format_description
*desc
= util_format_description(fmt
);
422 unsigned swizzle
= 0;
423 if (dev
->quirks
& HAS_SWIZZLES
)
424 swizzle
= panfrost_translate_swizzle_4(desc
->swizzle
);
426 swizzle
= panfrost_bifrost_swizzle(desc
->nr_channels
);
428 enum mali_format hw_format
= panfrost_pipe_format_table
[desc
->format
].hw
;
429 so
->formats
[i
] = (hw_format
<< 12) | swizzle
;
433 /* Let's also prepare vertex builtins */
434 if (dev
->quirks
& HAS_SWIZZLES
)
435 so
->formats
[PAN_VERTEX_ID
] = (MALI_R32UI
<< 12) | panfrost_get_default_swizzle(1);
437 so
->formats
[PAN_VERTEX_ID
] = (MALI_R32UI
<< 12) | panfrost_bifrost_swizzle(1);
439 if (dev
->quirks
& HAS_SWIZZLES
)
440 so
->formats
[PAN_INSTANCE_ID
] = (MALI_R32UI
<< 12) | panfrost_get_default_swizzle(1);
442 so
->formats
[PAN_INSTANCE_ID
] = (MALI_R32UI
<< 12) | panfrost_bifrost_swizzle(1);
448 panfrost_bind_vertex_elements_state(
449 struct pipe_context
*pctx
,
452 struct panfrost_context
*ctx
= pan_context(pctx
);
457 panfrost_create_shader_state(
458 struct pipe_context
*pctx
,
459 const struct pipe_shader_state
*cso
,
460 enum pipe_shader_type stage
)
462 struct panfrost_shader_variants
*so
= CALLOC_STRUCT(panfrost_shader_variants
);
463 struct panfrost_device
*dev
= pan_device(pctx
->screen
);
466 /* Token deep copy to prevent memory corruption */
468 if (cso
->type
== PIPE_SHADER_IR_TGSI
)
469 so
->base
.tokens
= tgsi_dup_tokens(so
->base
.tokens
);
471 /* Precompile for shader-db if we need to */
472 if (unlikely((dev
->debug
& PAN_DBG_PRECOMPILE
) && cso
->type
== PIPE_SHADER_IR_NIR
)) {
473 struct panfrost_context
*ctx
= pan_context(pctx
);
475 struct panfrost_shader_state state
;
476 uint64_t outputs_written
;
478 panfrost_shader_compile(ctx
, PIPE_SHADER_IR_NIR
,
480 tgsi_processor_to_shader_stage(stage
),
481 &state
, &outputs_written
);
488 panfrost_delete_shader_state(
489 struct pipe_context
*pctx
,
492 struct panfrost_shader_variants
*cso
= (struct panfrost_shader_variants
*) so
;
494 if (cso
->base
.type
== PIPE_SHADER_IR_TGSI
) {
495 /* TODO: leaks TGSI tokens! */
498 for (unsigned i
= 0; i
< cso
->variant_count
; ++i
) {
499 struct panfrost_shader_state
*shader_state
= &cso
->variants
[i
];
500 panfrost_bo_unreference(shader_state
->bo
);
501 shader_state
->bo
= NULL
;
509 panfrost_create_sampler_state(
510 struct pipe_context
*pctx
,
511 const struct pipe_sampler_state
*cso
)
513 struct panfrost_sampler_state
*so
= CALLOC_STRUCT(panfrost_sampler_state
);
514 struct panfrost_device
*device
= pan_device(pctx
->screen
);
518 if (device
->quirks
& IS_BIFROST
)
519 panfrost_sampler_desc_init_bifrost(cso
, (struct mali_bifrost_sampler_packed
*) &so
->hw
);
521 panfrost_sampler_desc_init(cso
, &so
->hw
);
527 panfrost_bind_sampler_states(
528 struct pipe_context
*pctx
,
529 enum pipe_shader_type shader
,
530 unsigned start_slot
, unsigned num_sampler
,
533 assert(start_slot
== 0);
535 struct panfrost_context
*ctx
= pan_context(pctx
);
537 /* XXX: Should upload, not just copy? */
538 ctx
->sampler_count
[shader
] = num_sampler
;
539 memcpy(ctx
->samplers
[shader
], sampler
, num_sampler
* sizeof (void *));
543 panfrost_variant_matches(
544 struct panfrost_context
*ctx
,
545 struct panfrost_shader_state
*variant
,
546 enum pipe_shader_type type
)
548 struct panfrost_device
*dev
= pan_device(ctx
->base
.screen
);
549 struct pipe_rasterizer_state
*rasterizer
= &ctx
->rasterizer
->base
;
551 bool is_fragment
= (type
== PIPE_SHADER_FRAGMENT
);
553 if (variant
->outputs_read
) {
554 struct pipe_framebuffer_state
*fb
= &ctx
->pipe_framebuffer
;
557 BITSET_FOREACH_SET(i
, &variant
->outputs_read
, 8) {
558 enum pipe_format fmt
= PIPE_FORMAT_R8G8B8A8_UNORM
;
560 if ((fb
->nr_cbufs
> i
) && fb
->cbufs
[i
])
561 fmt
= fb
->cbufs
[i
]->format
;
563 const struct util_format_description
*desc
=
564 util_format_description(fmt
);
566 if (pan_format_class_load(desc
, dev
->quirks
) == PAN_FORMAT_NATIVE
)
567 fmt
= PIPE_FORMAT_NONE
;
569 if (variant
->rt_formats
[i
] != fmt
)
574 /* Point sprites TODO on bifrost, always pass */
575 if (is_fragment
&& rasterizer
&& (rasterizer
->sprite_coord_enable
|
576 variant
->point_sprite_mask
)
577 && !(dev
->quirks
& IS_BIFROST
)) {
578 /* Ensure the same varyings are turned to point sprites */
579 if (rasterizer
->sprite_coord_enable
!= variant
->point_sprite_mask
)
582 /* Ensure the orientation is correct */
584 rasterizer
->sprite_coord_mode
==
585 PIPE_SPRITE_COORD_UPPER_LEFT
;
587 if (variant
->point_sprite_upper_left
!= upper_left
)
591 /* Otherwise, we're good to go */
596 * Fix an uncompiled shader's stream output info, and produce a bitmask
597 * of which VARYING_SLOT_* are captured for stream output.
599 * Core Gallium stores output->register_index as a "slot" number, where
600 * slots are assigned consecutively to all outputs in info->outputs_written.
601 * This naive packing of outputs doesn't work for us - we too have slots,
602 * but the layout is defined by the VUE map, which we won't have until we
603 * compile a specific shader variant. So, we remap these and simply store
604 * VARYING_SLOT_* in our copy's output->register_index fields.
606 * We then produce a bitmask of outputs which are used for SO.
608 * Implementation from iris.
612 update_so_info(struct pipe_stream_output_info
*so_info
,
613 uint64_t outputs_written
)
615 uint64_t so_outputs
= 0;
616 uint8_t reverse_map
[64] = {0};
619 while (outputs_written
)
620 reverse_map
[slot
++] = u_bit_scan64(&outputs_written
);
622 for (unsigned i
= 0; i
< so_info
->num_outputs
; i
++) {
623 struct pipe_stream_output
*output
= &so_info
->output
[i
];
625 /* Map Gallium's condensed "slots" back to real VARYING_SLOT_* enums */
626 output
->register_index
= reverse_map
[output
->register_index
];
628 so_outputs
|= 1ull << output
->register_index
;
635 panfrost_bind_shader_state(
636 struct pipe_context
*pctx
,
638 enum pipe_shader_type type
)
640 struct panfrost_context
*ctx
= pan_context(pctx
);
641 struct panfrost_device
*dev
= pan_device(ctx
->base
.screen
);
642 ctx
->shader
[type
] = hwcso
;
646 /* Match the appropriate variant */
649 struct panfrost_shader_variants
*variants
= (struct panfrost_shader_variants
*) hwcso
;
651 for (unsigned i
= 0; i
< variants
->variant_count
; ++i
) {
652 if (panfrost_variant_matches(ctx
, &variants
->variants
[i
], type
)) {
659 /* No variant matched, so create a new one */
660 variant
= variants
->variant_count
++;
662 if (variants
->variant_count
> variants
->variant_space
) {
663 unsigned old_space
= variants
->variant_space
;
665 variants
->variant_space
*= 2;
666 if (variants
->variant_space
== 0)
667 variants
->variant_space
= 1;
669 /* Arbitrary limit to stop runaway programs from
670 * creating an unbounded number of shader variants. */
671 assert(variants
->variant_space
< 1024);
673 unsigned msize
= sizeof(struct panfrost_shader_state
);
674 variants
->variants
= realloc(variants
->variants
,
675 variants
->variant_space
* msize
);
677 memset(&variants
->variants
[old_space
], 0,
678 (variants
->variant_space
- old_space
) * msize
);
681 struct panfrost_shader_state
*v
=
682 &variants
->variants
[variant
];
684 if (type
== PIPE_SHADER_FRAGMENT
) {
685 struct pipe_framebuffer_state
*fb
= &ctx
->pipe_framebuffer
;
686 for (unsigned i
= 0; i
< fb
->nr_cbufs
; ++i
) {
687 enum pipe_format fmt
= PIPE_FORMAT_R8G8B8A8_UNORM
;
689 if ((fb
->nr_cbufs
> i
) && fb
->cbufs
[i
])
690 fmt
= fb
->cbufs
[i
]->format
;
692 const struct util_format_description
*desc
=
693 util_format_description(fmt
);
695 if (pan_format_class_load(desc
, dev
->quirks
) == PAN_FORMAT_NATIVE
)
696 fmt
= PIPE_FORMAT_NONE
;
698 v
->rt_formats
[i
] = fmt
;
701 /* Point sprites are TODO on Bifrost */
702 if (ctx
->rasterizer
&& !(dev
->quirks
& IS_BIFROST
)) {
703 v
->point_sprite_mask
= ctx
->rasterizer
->base
.sprite_coord_enable
;
704 v
->point_sprite_upper_left
=
705 ctx
->rasterizer
->base
.sprite_coord_mode
==
706 PIPE_SPRITE_COORD_UPPER_LEFT
;
711 /* Select this variant */
712 variants
->active_variant
= variant
;
714 struct panfrost_shader_state
*shader_state
= &variants
->variants
[variant
];
715 assert(panfrost_variant_matches(ctx
, shader_state
, type
));
717 /* We finally have a variant, so compile it */
719 if (!shader_state
->compiled
) {
720 uint64_t outputs_written
= 0;
722 panfrost_shader_compile(ctx
, variants
->base
.type
,
723 variants
->base
.type
== PIPE_SHADER_IR_NIR
?
724 variants
->base
.ir
.nir
:
725 variants
->base
.tokens
,
726 tgsi_processor_to_shader_stage(type
),
730 shader_state
->compiled
= true;
732 /* Fixup the stream out information, since what Gallium returns
733 * normally is mildly insane */
735 shader_state
->stream_output
= variants
->base
.stream_output
;
736 shader_state
->so_mask
=
737 update_so_info(&shader_state
->stream_output
, outputs_written
);
742 panfrost_create_vs_state(struct pipe_context
*pctx
, const struct pipe_shader_state
*hwcso
)
744 return panfrost_create_shader_state(pctx
, hwcso
, PIPE_SHADER_VERTEX
);
748 panfrost_create_fs_state(struct pipe_context
*pctx
, const struct pipe_shader_state
*hwcso
)
750 return panfrost_create_shader_state(pctx
, hwcso
, PIPE_SHADER_FRAGMENT
);
754 panfrost_bind_vs_state(struct pipe_context
*pctx
, void *hwcso
)
756 panfrost_bind_shader_state(pctx
, hwcso
, PIPE_SHADER_VERTEX
);
760 panfrost_bind_fs_state(struct pipe_context
*pctx
, void *hwcso
)
762 panfrost_bind_shader_state(pctx
, hwcso
, PIPE_SHADER_FRAGMENT
);
766 panfrost_set_vertex_buffers(
767 struct pipe_context
*pctx
,
769 unsigned num_buffers
,
770 const struct pipe_vertex_buffer
*buffers
)
772 struct panfrost_context
*ctx
= pan_context(pctx
);
774 util_set_vertex_buffers_mask(ctx
->vertex_buffers
, &ctx
->vb_mask
, buffers
, start_slot
, num_buffers
);
778 panfrost_set_constant_buffer(
779 struct pipe_context
*pctx
,
780 enum pipe_shader_type shader
, uint index
,
781 const struct pipe_constant_buffer
*buf
)
783 struct panfrost_context
*ctx
= pan_context(pctx
);
784 struct panfrost_constant_buffer
*pbuf
= &ctx
->constant_buffer
[shader
];
786 util_copy_constant_buffer(&pbuf
->cb
[index
], buf
);
788 unsigned mask
= (1 << index
);
790 if (unlikely(!buf
)) {
791 pbuf
->enabled_mask
&= ~mask
;
792 pbuf
->dirty_mask
&= ~mask
;
796 pbuf
->enabled_mask
|= mask
;
797 pbuf
->dirty_mask
|= mask
;
801 panfrost_set_stencil_ref(
802 struct pipe_context
*pctx
,
803 const struct pipe_stencil_ref
*ref
)
805 struct panfrost_context
*ctx
= pan_context(pctx
);
806 ctx
->stencil_ref
= *ref
;
810 panfrost_create_sampler_view_bo(struct panfrost_sampler_view
*so
,
811 struct pipe_context
*pctx
,
812 struct pipe_resource
*texture
)
814 struct panfrost_device
*device
= pan_device(pctx
->screen
);
815 struct panfrost_resource
*prsrc
= (struct panfrost_resource
*)texture
;
816 enum pipe_format format
= so
->base
.format
;
819 /* Format to access the stencil portion of a Z32_S8 texture */
820 if (format
== PIPE_FORMAT_X32_S8X24_UINT
) {
821 assert(prsrc
->separate_stencil
);
822 texture
= &prsrc
->separate_stencil
->base
;
823 prsrc
= (struct panfrost_resource
*)texture
;
824 format
= texture
->format
;
827 const struct util_format_description
*desc
= util_format_description(format
);
829 bool fake_rgtc
= !panfrost_supports_compressed_format(device
, MALI_BC4_UNORM
);
831 if (desc
->layout
== UTIL_FORMAT_LAYOUT_RGTC
&& fake_rgtc
) {
833 format
= PIPE_FORMAT_R8G8B8A8_SNORM
;
835 format
= PIPE_FORMAT_R8G8B8A8_UNORM
;
836 desc
= util_format_description(format
);
839 so
->texture_bo
= prsrc
->bo
->gpu
;
840 so
->modifier
= prsrc
->modifier
;
842 unsigned char user_swizzle
[4] = {
849 /* In the hardware, array_size refers specifically to array textures,
850 * whereas in Gallium, it also covers cubemaps */
852 unsigned array_size
= texture
->array_size
;
853 unsigned depth
= texture
->depth0
;
855 if (so
->base
.target
== PIPE_TEXTURE_CUBE
) {
856 /* TODO: Cubemap arrays */
857 assert(array_size
== 6);
861 /* MSAA only supported for 2D textures (and 2D texture arrays via an
862 * extension currently unimplemented */
864 if (so
->base
.target
== PIPE_TEXTURE_2D
) {
866 depth
= texture
->nr_samples
;
868 /* MSAA only supported for 2D textures */
869 assert(texture
->nr_samples
<= 1);
872 enum mali_texture_dimension type
=
873 panfrost_translate_texture_dimension(so
->base
.target
);
875 if (device
->quirks
& IS_BIFROST
) {
876 unsigned char composed_swizzle
[4];
877 util_format_compose_swizzles(desc
->swizzle
, user_swizzle
, composed_swizzle
);
879 unsigned size
= panfrost_estimate_texture_payload_size(
880 so
->base
.u
.tex
.first_level
,
881 so
->base
.u
.tex
.last_level
,
882 so
->base
.u
.tex
.first_layer
,
883 so
->base
.u
.tex
.last_layer
,
885 type
, prsrc
->modifier
);
887 so
->bo
= panfrost_bo_create(device
, size
, 0);
889 panfrost_new_texture_bifrost(
890 &so
->bifrost_descriptor
,
891 texture
->width0
, texture
->height0
,
894 type
, prsrc
->modifier
,
895 so
->base
.u
.tex
.first_level
,
896 so
->base
.u
.tex
.last_level
,
897 so
->base
.u
.tex
.first_layer
,
898 so
->base
.u
.tex
.last_layer
,
900 prsrc
->cubemap_stride
,
901 panfrost_translate_swizzle_4(composed_swizzle
),
906 unsigned size
= panfrost_estimate_texture_payload_size(
907 so
->base
.u
.tex
.first_level
,
908 so
->base
.u
.tex
.last_level
,
909 so
->base
.u
.tex
.first_layer
,
910 so
->base
.u
.tex
.last_layer
,
912 type
, prsrc
->modifier
);
913 size
+= MALI_MIDGARD_TEXTURE_LENGTH
;
915 so
->bo
= panfrost_bo_create(device
, size
, 0);
917 panfrost_new_texture(
919 texture
->width0
, texture
->height0
,
922 type
, prsrc
->modifier
,
923 so
->base
.u
.tex
.first_level
,
924 so
->base
.u
.tex
.last_level
,
925 so
->base
.u
.tex
.first_layer
,
926 so
->base
.u
.tex
.last_layer
,
928 prsrc
->cubemap_stride
,
929 panfrost_translate_swizzle_4(user_swizzle
),
935 static struct pipe_sampler_view
*
936 panfrost_create_sampler_view(
937 struct pipe_context
*pctx
,
938 struct pipe_resource
*texture
,
939 const struct pipe_sampler_view
*template)
941 struct panfrost_sampler_view
*so
= rzalloc(pctx
, struct panfrost_sampler_view
);
943 pipe_reference(NULL
, &texture
->reference
);
945 so
->base
= *template;
946 so
->base
.texture
= texture
;
947 so
->base
.reference
.count
= 1;
948 so
->base
.context
= pctx
;
950 panfrost_create_sampler_view_bo(so
, pctx
, texture
);
952 return (struct pipe_sampler_view
*) so
;
956 panfrost_set_sampler_views(
957 struct pipe_context
*pctx
,
958 enum pipe_shader_type shader
,
959 unsigned start_slot
, unsigned num_views
,
960 struct pipe_sampler_view
**views
)
962 struct panfrost_context
*ctx
= pan_context(pctx
);
966 assert(start_slot
== 0);
968 for (i
= 0; i
< num_views
; ++i
) {
971 pipe_sampler_view_reference((struct pipe_sampler_view
**)&ctx
->sampler_views
[shader
][i
],
975 for (; i
< ctx
->sampler_view_count
[shader
]; i
++) {
976 pipe_sampler_view_reference((struct pipe_sampler_view
**)&ctx
->sampler_views
[shader
][i
],
979 ctx
->sampler_view_count
[shader
] = new_nr
;
983 panfrost_sampler_view_destroy(
984 struct pipe_context
*pctx
,
985 struct pipe_sampler_view
*pview
)
987 struct panfrost_sampler_view
*view
= (struct panfrost_sampler_view
*) pview
;
989 pipe_resource_reference(&pview
->texture
, NULL
);
990 panfrost_bo_unreference(view
->bo
);
995 panfrost_set_shader_buffers(
996 struct pipe_context
*pctx
,
997 enum pipe_shader_type shader
,
998 unsigned start
, unsigned count
,
999 const struct pipe_shader_buffer
*buffers
,
1000 unsigned writable_bitmask
)
1002 struct panfrost_context
*ctx
= pan_context(pctx
);
1004 util_set_shader_buffers_mask(ctx
->ssbo
[shader
], &ctx
->ssbo_mask
[shader
],
1005 buffers
, start
, count
);
1009 panfrost_set_framebuffer_state(struct pipe_context
*pctx
,
1010 const struct pipe_framebuffer_state
*fb
)
1012 struct panfrost_context
*ctx
= pan_context(pctx
);
1014 util_copy_framebuffer_state(&ctx
->pipe_framebuffer
, fb
);
1017 /* We may need to generate a new variant if the fragment shader is
1018 * keyed to the framebuffer format (due to EXT_framebuffer_fetch) */
1019 struct panfrost_shader_variants
*fs
= ctx
->shader
[PIPE_SHADER_FRAGMENT
];
1021 if (fs
&& fs
->variant_count
&& fs
->variants
[fs
->active_variant
].outputs_read
)
1022 ctx
->base
.bind_fs_state(&ctx
->base
, fs
);
1025 static inline unsigned
1026 pan_pipe_to_stencil_op(enum pipe_stencil_op in
)
1029 case PIPE_STENCIL_OP_KEEP
: return MALI_STENCIL_OP_KEEP
;
1030 case PIPE_STENCIL_OP_ZERO
: return MALI_STENCIL_OP_ZERO
;
1031 case PIPE_STENCIL_OP_REPLACE
: return MALI_STENCIL_OP_REPLACE
;
1032 case PIPE_STENCIL_OP_INCR
: return MALI_STENCIL_OP_INCR_SAT
;
1033 case PIPE_STENCIL_OP_DECR
: return MALI_STENCIL_OP_DECR_SAT
;
1034 case PIPE_STENCIL_OP_INCR_WRAP
: return MALI_STENCIL_OP_INCR_WRAP
;
1035 case PIPE_STENCIL_OP_DECR_WRAP
: return MALI_STENCIL_OP_DECR_WRAP
;
1036 case PIPE_STENCIL_OP_INVERT
: return MALI_STENCIL_OP_INVERT
;
1037 default: unreachable("Invalid stencil op");
1042 pan_pipe_to_stencil(const struct pipe_stencil_state
*in
, void *out
)
1044 pan_pack(out
, STENCIL
, cfg
) {
1045 cfg
.mask
= in
->valuemask
;
1046 cfg
.compare_function
= panfrost_translate_compare_func(in
->func
);
1047 cfg
.stencil_fail
= pan_pipe_to_stencil_op(in
->fail_op
);
1048 cfg
.depth_fail
= pan_pipe_to_stencil_op(in
->zfail_op
);
1049 cfg
.depth_pass
= pan_pipe_to_stencil_op(in
->zpass_op
);
1054 panfrost_create_depth_stencil_state(struct pipe_context
*pipe
,
1055 const struct pipe_depth_stencil_alpha_state
*zsa
)
1057 struct panfrost_zsa_state
*so
= CALLOC_STRUCT(panfrost_zsa_state
);
1060 pan_pipe_to_stencil(&zsa
->stencil
[0], &so
->stencil_front
);
1061 pan_pipe_to_stencil(&zsa
->stencil
[1], &so
->stencil_back
);
1063 so
->stencil_mask_front
= zsa
->stencil
[0].writemask
;
1065 if (zsa
->stencil
[1].enabled
)
1066 so
->stencil_mask_back
= zsa
->stencil
[1].writemask
;
1068 so
->stencil_mask_back
= so
->stencil_mask_front
;
1070 /* Alpha lowered by frontend */
1071 assert(!zsa
->alpha
.enabled
);
1073 /* TODO: Bounds test should be easy */
1074 assert(!zsa
->depth
.bounds_test
);
1080 panfrost_bind_depth_stencil_state(struct pipe_context
*pipe
,
1083 struct panfrost_context
*ctx
= pan_context(pipe
);
1084 struct panfrost_zsa_state
*zsa
= cso
;
1085 ctx
->depth_stencil
= zsa
;
1089 panfrost_delete_depth_stencil_state(struct pipe_context
*pipe
, void *depth
)
1095 panfrost_set_sample_mask(struct pipe_context
*pipe
,
1096 unsigned sample_mask
)
1098 struct panfrost_context
*ctx
= pan_context(pipe
);
1099 ctx
->sample_mask
= sample_mask
;
1103 panfrost_set_min_samples(struct pipe_context
*pipe
,
1104 unsigned min_samples
)
1106 struct panfrost_context
*ctx
= pan_context(pipe
);
1107 ctx
->min_samples
= min_samples
;
1112 panfrost_set_clip_state(struct pipe_context
*pipe
,
1113 const struct pipe_clip_state
*clip
)
1115 //struct panfrost_context *panfrost = pan_context(pipe);
1119 panfrost_set_viewport_states(struct pipe_context
*pipe
,
1120 unsigned start_slot
,
1121 unsigned num_viewports
,
1122 const struct pipe_viewport_state
*viewports
)
1124 struct panfrost_context
*ctx
= pan_context(pipe
);
1126 assert(start_slot
== 0);
1127 assert(num_viewports
== 1);
1129 ctx
->pipe_viewport
= *viewports
;
1133 panfrost_set_scissor_states(struct pipe_context
*pipe
,
1134 unsigned start_slot
,
1135 unsigned num_scissors
,
1136 const struct pipe_scissor_state
*scissors
)
1138 struct panfrost_context
*ctx
= pan_context(pipe
);
1140 assert(start_slot
== 0);
1141 assert(num_scissors
== 1);
1143 ctx
->scissor
= *scissors
;
1147 panfrost_set_polygon_stipple(struct pipe_context
*pipe
,
1148 const struct pipe_poly_stipple
*stipple
)
1150 //struct panfrost_context *panfrost = pan_context(pipe);
1154 panfrost_set_active_query_state(struct pipe_context
*pipe
,
1157 struct panfrost_context
*ctx
= pan_context(pipe
);
1158 ctx
->active_queries
= enable
;
1162 panfrost_destroy(struct pipe_context
*pipe
)
1164 struct panfrost_context
*panfrost
= pan_context(pipe
);
1166 if (panfrost
->blitter
)
1167 util_blitter_destroy(panfrost
->blitter
);
1169 if (panfrost
->blitter_wallpaper
)
1170 util_blitter_destroy(panfrost
->blitter_wallpaper
);
1172 util_unreference_framebuffer_state(&panfrost
->pipe_framebuffer
);
1173 u_upload_destroy(pipe
->stream_uploader
);
1178 static struct pipe_query
*
1179 panfrost_create_query(struct pipe_context
*pipe
,
1183 struct panfrost_query
*q
= rzalloc(pipe
, struct panfrost_query
);
1188 return (struct pipe_query
*) q
;
1192 panfrost_destroy_query(struct pipe_context
*pipe
, struct pipe_query
*q
)
1194 struct panfrost_query
*query
= (struct panfrost_query
*) q
;
1197 panfrost_bo_unreference(query
->bo
);
1205 panfrost_begin_query(struct pipe_context
*pipe
, struct pipe_query
*q
)
1207 struct panfrost_context
*ctx
= pan_context(pipe
);
1208 struct panfrost_query
*query
= (struct panfrost_query
*) q
;
1210 switch (query
->type
) {
1211 case PIPE_QUERY_OCCLUSION_COUNTER
:
1212 case PIPE_QUERY_OCCLUSION_PREDICATE
:
1213 case PIPE_QUERY_OCCLUSION_PREDICATE_CONSERVATIVE
:
1214 /* Allocate a bo for the query results to be stored */
1216 query
->bo
= panfrost_bo_create(
1217 pan_device(ctx
->base
.screen
),
1218 sizeof(unsigned), 0);
1221 unsigned *result
= (unsigned *)query
->bo
->cpu
;
1222 *result
= 0; /* Default to 0 if nothing at all drawn. */
1223 ctx
->occlusion_query
= query
;
1226 /* Geometry statistics are computed in the driver. XXX: geom/tess
1229 case PIPE_QUERY_PRIMITIVES_GENERATED
:
1230 query
->start
= ctx
->prims_generated
;
1232 case PIPE_QUERY_PRIMITIVES_EMITTED
:
1233 query
->start
= ctx
->tf_prims_generated
;
1237 /* TODO: timestamp queries, etc? */
1245 panfrost_end_query(struct pipe_context
*pipe
, struct pipe_query
*q
)
1247 struct panfrost_context
*ctx
= pan_context(pipe
);
1248 struct panfrost_query
*query
= (struct panfrost_query
*) q
;
1250 switch (query
->type
) {
1251 case PIPE_QUERY_OCCLUSION_COUNTER
:
1252 case PIPE_QUERY_OCCLUSION_PREDICATE
:
1253 case PIPE_QUERY_OCCLUSION_PREDICATE_CONSERVATIVE
:
1254 ctx
->occlusion_query
= NULL
;
1256 case PIPE_QUERY_PRIMITIVES_GENERATED
:
1257 query
->end
= ctx
->prims_generated
;
1259 case PIPE_QUERY_PRIMITIVES_EMITTED
:
1260 query
->end
= ctx
->tf_prims_generated
;
1268 panfrost_get_query_result(struct pipe_context
*pipe
,
1269 struct pipe_query
*q
,
1271 union pipe_query_result
*vresult
)
1273 struct panfrost_query
*query
= (struct panfrost_query
*) q
;
1274 struct panfrost_context
*ctx
= pan_context(pipe
);
1277 switch (query
->type
) {
1278 case PIPE_QUERY_OCCLUSION_COUNTER
:
1279 case PIPE_QUERY_OCCLUSION_PREDICATE
:
1280 case PIPE_QUERY_OCCLUSION_PREDICATE_CONSERVATIVE
:
1281 panfrost_flush_batches_accessing_bo(ctx
, query
->bo
, false);
1282 panfrost_bo_wait(query
->bo
, INT64_MAX
, false);
1284 /* Read back the query results */
1285 unsigned *result
= (unsigned *) query
->bo
->cpu
;
1286 unsigned passed
= *result
;
1288 if (query
->type
== PIPE_QUERY_OCCLUSION_COUNTER
) {
1289 vresult
->u64
= passed
;
1291 vresult
->b
= !!passed
;
1296 case PIPE_QUERY_PRIMITIVES_GENERATED
:
1297 case PIPE_QUERY_PRIMITIVES_EMITTED
:
1298 panfrost_flush_all_batches(ctx
, 0);
1299 vresult
->u64
= query
->end
- query
->start
;
1303 /* TODO: more queries */
1310 static struct pipe_stream_output_target
*
1311 panfrost_create_stream_output_target(struct pipe_context
*pctx
,
1312 struct pipe_resource
*prsc
,
1313 unsigned buffer_offset
,
1314 unsigned buffer_size
)
1316 struct pipe_stream_output_target
*target
;
1318 target
= rzalloc(pctx
, struct pipe_stream_output_target
);
1323 pipe_reference_init(&target
->reference
, 1);
1324 pipe_resource_reference(&target
->buffer
, prsc
);
1326 target
->context
= pctx
;
1327 target
->buffer_offset
= buffer_offset
;
1328 target
->buffer_size
= buffer_size
;
1334 panfrost_stream_output_target_destroy(struct pipe_context
*pctx
,
1335 struct pipe_stream_output_target
*target
)
1337 pipe_resource_reference(&target
->buffer
, NULL
);
1338 ralloc_free(target
);
1342 panfrost_set_stream_output_targets(struct pipe_context
*pctx
,
1343 unsigned num_targets
,
1344 struct pipe_stream_output_target
**targets
,
1345 const unsigned *offsets
)
1347 struct panfrost_context
*ctx
= pan_context(pctx
);
1348 struct panfrost_streamout
*so
= &ctx
->streamout
;
1350 assert(num_targets
<= ARRAY_SIZE(so
->targets
));
1352 for (unsigned i
= 0; i
< num_targets
; i
++) {
1353 if (offsets
[i
] != -1)
1354 so
->offsets
[i
] = offsets
[i
];
1356 pipe_so_target_reference(&so
->targets
[i
], targets
[i
]);
1359 for (unsigned i
= 0; i
< so
->num_targets
; i
++)
1360 pipe_so_target_reference(&so
->targets
[i
], NULL
);
1362 so
->num_targets
= num_targets
;
1365 struct pipe_context
*
1366 panfrost_create_context(struct pipe_screen
*screen
, void *priv
, unsigned flags
)
1368 struct panfrost_context
*ctx
= rzalloc(screen
, struct panfrost_context
);
1369 struct pipe_context
*gallium
= (struct pipe_context
*) ctx
;
1370 struct panfrost_device
*dev
= pan_device(screen
);
1372 gallium
->screen
= screen
;
1374 gallium
->destroy
= panfrost_destroy
;
1376 gallium
->set_framebuffer_state
= panfrost_set_framebuffer_state
;
1378 gallium
->flush
= panfrost_flush
;
1379 gallium
->clear
= panfrost_clear
;
1380 gallium
->draw_vbo
= panfrost_draw_vbo
;
1381 gallium
->texture_barrier
= panfrost_texture_barrier
;
1383 gallium
->set_vertex_buffers
= panfrost_set_vertex_buffers
;
1384 gallium
->set_constant_buffer
= panfrost_set_constant_buffer
;
1385 gallium
->set_shader_buffers
= panfrost_set_shader_buffers
;
1387 gallium
->set_stencil_ref
= panfrost_set_stencil_ref
;
1389 gallium
->create_sampler_view
= panfrost_create_sampler_view
;
1390 gallium
->set_sampler_views
= panfrost_set_sampler_views
;
1391 gallium
->sampler_view_destroy
= panfrost_sampler_view_destroy
;
1393 gallium
->create_rasterizer_state
= panfrost_create_rasterizer_state
;
1394 gallium
->bind_rasterizer_state
= panfrost_bind_rasterizer_state
;
1395 gallium
->delete_rasterizer_state
= panfrost_generic_cso_delete
;
1397 gallium
->create_vertex_elements_state
= panfrost_create_vertex_elements_state
;
1398 gallium
->bind_vertex_elements_state
= panfrost_bind_vertex_elements_state
;
1399 gallium
->delete_vertex_elements_state
= panfrost_generic_cso_delete
;
1401 gallium
->create_fs_state
= panfrost_create_fs_state
;
1402 gallium
->delete_fs_state
= panfrost_delete_shader_state
;
1403 gallium
->bind_fs_state
= panfrost_bind_fs_state
;
1405 gallium
->create_vs_state
= panfrost_create_vs_state
;
1406 gallium
->delete_vs_state
= panfrost_delete_shader_state
;
1407 gallium
->bind_vs_state
= panfrost_bind_vs_state
;
1409 gallium
->create_sampler_state
= panfrost_create_sampler_state
;
1410 gallium
->delete_sampler_state
= panfrost_generic_cso_delete
;
1411 gallium
->bind_sampler_states
= panfrost_bind_sampler_states
;
1413 gallium
->create_depth_stencil_alpha_state
= panfrost_create_depth_stencil_state
;
1414 gallium
->bind_depth_stencil_alpha_state
= panfrost_bind_depth_stencil_state
;
1415 gallium
->delete_depth_stencil_alpha_state
= panfrost_delete_depth_stencil_state
;
1417 gallium
->set_sample_mask
= panfrost_set_sample_mask
;
1418 gallium
->set_min_samples
= panfrost_set_min_samples
;
1420 gallium
->set_clip_state
= panfrost_set_clip_state
;
1421 gallium
->set_viewport_states
= panfrost_set_viewport_states
;
1422 gallium
->set_scissor_states
= panfrost_set_scissor_states
;
1423 gallium
->set_polygon_stipple
= panfrost_set_polygon_stipple
;
1424 gallium
->set_active_query_state
= panfrost_set_active_query_state
;
1426 gallium
->create_query
= panfrost_create_query
;
1427 gallium
->destroy_query
= panfrost_destroy_query
;
1428 gallium
->begin_query
= panfrost_begin_query
;
1429 gallium
->end_query
= panfrost_end_query
;
1430 gallium
->get_query_result
= panfrost_get_query_result
;
1432 gallium
->create_stream_output_target
= panfrost_create_stream_output_target
;
1433 gallium
->stream_output_target_destroy
= panfrost_stream_output_target_destroy
;
1434 gallium
->set_stream_output_targets
= panfrost_set_stream_output_targets
;
1436 panfrost_resource_context_init(gallium
);
1437 panfrost_blend_context_init(gallium
);
1438 panfrost_compute_context_init(gallium
);
1440 gallium
->stream_uploader
= u_upload_create_default(gallium
);
1441 gallium
->const_uploader
= gallium
->stream_uploader
;
1442 assert(gallium
->stream_uploader
);
1444 /* All of our GPUs support ES mode. Midgard supports additionally
1445 * QUADS/QUAD_STRIPS/POLYGON. Bifrost supports just QUADS. */
1447 ctx
->draw_modes
= (1 << (PIPE_PRIM_QUADS
+ 1)) - 1;
1449 if (!(dev
->quirks
& IS_BIFROST
)) {
1450 ctx
->draw_modes
|= (1 << PIPE_PRIM_QUAD_STRIP
);
1451 ctx
->draw_modes
|= (1 << PIPE_PRIM_POLYGON
);
1454 ctx
->primconvert
= util_primconvert_create(gallium
, ctx
->draw_modes
);
1456 ctx
->blitter
= util_blitter_create(gallium
);
1457 ctx
->blitter_wallpaper
= util_blitter_create(gallium
);
1459 assert(ctx
->blitter
);
1460 assert(ctx
->blitter_wallpaper
);
1462 /* Prepare for render! */
1464 panfrost_batch_init(ctx
);
1466 if (!(dev
->quirks
& IS_BIFROST
)) {
1467 for (unsigned c
= 0; c
< PIPE_MAX_COLOR_BUFS
; ++c
)
1468 ctx
->blit_blend
.rt
[c
].shaders
= _mesa_hash_table_u64_create(ctx
);
1471 /* By default mask everything on */
1472 ctx
->sample_mask
= ~0;
1473 ctx
->active_queries
= true;