src/gallium/drivers/panfrost/pan_screen.c

   1 /*
   2  * Copyright (C) 2008 VMware, Inc.
   3  * Copyright (C) 2014 Broadcom
   4  * Copyright (C) 2018 Alyssa Rosenzweig
   5  * Copyright (C) 2019 Collabora, Ltd.
   6  *
   7  * Permission is hereby granted, free of charge, to any person obtaining a
   8  * copy of this software and associated documentation files (the "Software"),
   9  * to deal in the Software without restriction, including without limitation
  10  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  11  * and/or sell copies of the Software, and to permit persons to whom the
  12  * Software is furnished to do so, subject to the following conditions:
  13  *
  14  * The above copyright notice and this permission notice (including the next
  15  * paragraph) shall be included in all copies or substantial portions of the
  16  * Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  19  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  20  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  21  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  22  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  23  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  24  * SOFTWARE.
  25  *
  26  */
  27
  28 #include "util/u_debug.h"
  29 #include "util/u_memory.h"
  30 #include "util/u_format.h"
  31 #include "util/u_format_s3tc.h"
  32 #include "util/u_video.h"
  33 #include "util/u_screen.h"
  34 #include "util/os_time.h"
  35 #include "pipe/p_defines.h"
  36 #include "pipe/p_screen.h"
  37 #include "draw/draw_context.h"
  38 #include <xf86drm.h>
  39
  40 #include <fcntl.h>
  41
  42 #include "drm-uapi/drm_fourcc.h"
  43
  44 #include "pan_screen.h"
  45 #include "pan_resource.h"
  46 #include "pan_public.h"
  47 #include "pan_util.h"
  48 #include "pandecode/decode.h"
  49
  50 #include "pan_context.h"
  51 #include "midgard/midgard_compile.h"
  52
  53 static const struct debug_named_value debug_options[] = {
  54         {"msgs",      PAN_DBG_MSGS,     "Print debug messages"},
  55         {"trace",     PAN_DBG_TRACE,    "Trace the command stream"},
  56         {"deqp",      PAN_DBG_DEQP,     "Hacks for dEQP"},
  57         {"afbc",      PAN_DBG_AFBC,     "Enable non-conformant AFBC impl"},
  58         DEBUG_NAMED_VALUE_END
  59 };
  60
  61 DEBUG_GET_ONCE_FLAGS_OPTION(pan_debug, "PAN_MESA_DEBUG", debug_options, 0)
  62
  63 int pan_debug = 0;
  64
  65 static const char *
  66 panfrost_get_name(struct pipe_screen *screen)
  67 {
  68         return "panfrost";
  69 }
  70
  71 static const char *
  72 panfrost_get_vendor(struct pipe_screen *screen)
  73 {
  74         return "panfrost";
  75 }
  76
  77 static const char *
  78 panfrost_get_device_vendor(struct pipe_screen *screen)
  79 {
  80         return "Arm";
  81 }
  82
  83 static int
  84 panfrost_get_param(struct pipe_screen *screen, enum pipe_cap param)
  85 {
  86         /* We expose in-dev stuff for dEQP that we don't want apps to use yet */
  87         bool is_deqp = pan_debug & PAN_DBG_DEQP;
  88
  89         switch (param) {
  90         case PIPE_CAP_NPOT_TEXTURES:
  91         case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
  92         case PIPE_CAP_MIXED_COLOR_DEPTH_BITS:
  93         case PIPE_CAP_FRAGMENT_SHADER_TEXTURE_LOD:
  94         case PIPE_CAP_VERTEX_SHADER_SATURATE:
  95         case PIPE_CAP_POINT_SPRITE:
  96                 return 1;
  97
  98         case PIPE_CAP_MAX_RENDER_TARGETS:
  99                 return 1;
 100
 101         case PIPE_CAP_OCCLUSION_QUERY:
 102                 return 1;
 103         case PIPE_CAP_QUERY_TIME_ELAPSED:
 104         case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
 105         case PIPE_CAP_QUERY_TIMESTAMP:
 106         case PIPE_CAP_QUERY_SO_OVERFLOW:
 107                 return 0;
 108
 109         case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
 110         case PIPE_CAP_TEXTURE_SWIZZLE:
 111                 return 1;
 112
 113         case PIPE_CAP_TGSI_INSTANCEID:
 114         case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
 115                 return is_deqp ? 1 : 0;
 116
 117         case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
 118                 return is_deqp ? 4 : 0;
 119         case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
 120         case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
 121                 return is_deqp ? 64 : 0;
 122
 123         case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
 124                 return is_deqp ? 256 : 0; /* for GL3 */
 125
 126         case PIPE_CAP_GLSL_FEATURE_LEVEL:
 127         case PIPE_CAP_GLSL_FEATURE_LEVEL_COMPATIBILITY:
 128                 return is_deqp ? 140 : 120;
 129         case PIPE_CAP_ESSL_FEATURE_LEVEL:
 130                 return is_deqp ? 300 : 120;
 131
 132         case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
 133                 return is_deqp ? 16 : 0;
 134
 135         case PIPE_CAP_CUBE_MAP_ARRAY:
 136                 return is_deqp;
 137
 138         /* TODO: Where does this req come from in practice? */
 139         case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
 140                 return 1;
 141
 142         case PIPE_CAP_MAX_TEXTURE_2D_SIZE:
 143                 return 4096;
 144         case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
 145         case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
 146                 return 13;
 147
 148         case PIPE_CAP_BLEND_EQUATION_SEPARATE:
 149         case PIPE_CAP_INDEP_BLEND_ENABLE:
 150         case PIPE_CAP_INDEP_BLEND_FUNC:
 151                 return 1;
 152
 153         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
 154                 /* Hardware is natively upper left */
 155                 return 0;
 156
 157         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
 158         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
 159         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
 160         case PIPE_CAP_GENERATE_MIPMAP:
 161                 return 1;
 162
 163         case PIPE_CAP_SEAMLESS_CUBE_MAP:
 164         case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
 165                 return 1;
 166
 167         case PIPE_CAP_MAX_VERTEX_ELEMENT_SRC_OFFSET:
 168                 return 0xffff;
 169
 170         case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
 171                 return 1;
 172
 173         case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE:
 174                 return 65536;
 175
 176         case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
 177                 return 0;
 178
 179         case PIPE_CAP_ENDIANNESS:
 180                 return PIPE_ENDIAN_NATIVE;
 181
 182         case PIPE_CAP_SAMPLER_VIEW_TARGET:
 183                 return 1;
 184
 185         case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET:
 186                 return -8;
 187
 188         case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET:
 189                 return 7;
 190
 191         case PIPE_CAP_VENDOR_ID:
 192         case PIPE_CAP_DEVICE_ID:
 193                 return 0xFFFFFFFF;
 194
 195         case PIPE_CAP_ACCELERATED:
 196         case PIPE_CAP_UMA:
 197         case PIPE_CAP_TEXTURE_FLOAT_LINEAR:
 198         case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR:
 199         case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS:
 200         case PIPE_CAP_TGSI_ARRAY_COMPONENTS:
 201                 return 1;
 202
 203         case PIPE_CAP_VIDEO_MEMORY: {
 204                 uint64_t system_memory;
 205
 206                 if (!os_get_total_physical_memory(&system_memory))
 207                         return 0;
 208
 209                 return (int)(system_memory >> 20);
 210         }
 211
 212         case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT:
 213                 return 4;
 214
 215         case PIPE_CAP_MAX_VARYINGS:
 216                 return 16;
 217
 218         default:
 219                 return u_pipe_screen_get_param_defaults(screen, param);
 220         }
 221 }
 222
 223 static int
 224 panfrost_get_shader_param(struct pipe_screen *screen,
 225                           enum pipe_shader_type shader,
 226                           enum pipe_shader_cap param)
 227 {
 228         if (shader != PIPE_SHADER_VERTEX &&
 229             shader != PIPE_SHADER_FRAGMENT) {
 230                 return 0;
 231         }
 232
 233         /* this is probably not totally correct.. but it's a start: */
 234         switch (param) {
 235         case PIPE_SHADER_CAP_SCALAR_ISA:
 236                 return 0;
 237
 238         case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 239                 return 0;
 240         case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 241         case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 242         case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 243                 return 16384;
 244
 245         case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 246                 return 1024;
 247
 248         case PIPE_SHADER_CAP_MAX_INPUTS:
 249                 return 16;
 250
 251         case PIPE_SHADER_CAP_MAX_OUTPUTS:
 252                 return shader == PIPE_SHADER_FRAGMENT ? 1 : 8;
 253
 254         case PIPE_SHADER_CAP_MAX_TEMPS:
 255                 return 256; /* GL_MAX_PROGRAM_TEMPORARIES_ARB */
 256
 257         case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
 258                 return 16 * 1024 * sizeof(float);
 259
 260         case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 261                 return PAN_MAX_CONST_BUFFERS;
 262
 263         case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
 264                 return 0;
 265
 266         case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
 267                 return 1;
 268         case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
 269                 return 0;
 270
 271         case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
 272                 return 0;
 273
 274         case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
 275                 return 1;
 276
 277         case PIPE_SHADER_CAP_SUBROUTINES:
 278                 return 0;
 279
 280         case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
 281                 return 0;
 282
 283         case PIPE_SHADER_CAP_INTEGERS:
 284                 return 1;
 285
 286         case PIPE_SHADER_CAP_INT64_ATOMICS:
 287         case PIPE_SHADER_CAP_FP16:
 288         case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
 289         case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
 290         case PIPE_SHADER_CAP_TGSI_LDEXP_SUPPORTED:
 291         case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
 292         case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
 293                 return 0;
 294
 295         case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 296         case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
 297                 return 16; /* XXX: How many? */
 298
 299         case PIPE_SHADER_CAP_PREFERRED_IR:
 300                 return PIPE_SHADER_IR_NIR;
 301
 302         case PIPE_SHADER_CAP_SUPPORTED_IRS:
 303                 return 0;
 304
 305         case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
 306                 return 32;
 307
 308         case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
 309         case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
 310         case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
 311         case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS:
 312         case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS:
 313         case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS:
 314                 return 0;
 315
 316         default:
 317                 fprintf(stderr, "unknown shader param %d\n", param);
 318                 return 0;
 319         }
 320
 321         return 0;
 322 }
 323
 324 static float
 325 panfrost_get_paramf(struct pipe_screen *screen, enum pipe_capf param)
 326 {
 327         switch (param) {
 328         case PIPE_CAPF_MAX_LINE_WIDTH:
 329
 330         /* fall-through */
 331         case PIPE_CAPF_MAX_LINE_WIDTH_AA:
 332                 return 255.0; /* arbitrary */
 333
 334         case PIPE_CAPF_MAX_POINT_WIDTH:
 335
 336         /* fall-through */
 337         case PIPE_CAPF_MAX_POINT_WIDTH_AA:
 338                 return 1024.0;
 339
 340         case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
 341                 return 16.0;
 342
 343         case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
 344                 return 16.0; /* arbitrary */
 345
 346         case PIPE_CAPF_MIN_CONSERVATIVE_RASTER_DILATE:
 347         case PIPE_CAPF_MAX_CONSERVATIVE_RASTER_DILATE:
 348         case PIPE_CAPF_CONSERVATIVE_RASTER_DILATE_GRANULARITY:
 349                 return 0.0f;
 350
 351         default:
 352                 debug_printf("Unexpected PIPE_CAPF %d query\n", param);
 353                 return 0.0;
 354         }
 355 }
 356
 357 /**
 358  * Query format support for creating a texture, drawing surface, etc.
 359  * \param format  the format to test
 360  * \param type  one of PIPE_TEXTURE, PIPE_SURFACE
 361  */
 362 static boolean
 363 panfrost_is_format_supported( struct pipe_screen *screen,
 364                               enum pipe_format format,
 365                               enum pipe_texture_target target,
 366                               unsigned sample_count,
 367                               unsigned storage_sample_count,
 368                               unsigned bind)
 369 {
 370         const struct util_format_description *format_desc;
 371
 372         assert(target == PIPE_BUFFER ||
 373                target == PIPE_TEXTURE_1D ||
 374                target == PIPE_TEXTURE_1D_ARRAY ||
 375                target == PIPE_TEXTURE_2D ||
 376                target == PIPE_TEXTURE_2D_ARRAY ||
 377                target == PIPE_TEXTURE_RECT ||
 378                target == PIPE_TEXTURE_3D ||
 379                target == PIPE_TEXTURE_CUBE ||
 380                target == PIPE_TEXTURE_CUBE_ARRAY);
 381
 382         format_desc = util_format_description(format);
 383
 384         if (!format_desc)
 385                 return FALSE;
 386
 387         if (sample_count > 1)
 388                 return FALSE;
 389
 390         /* Format wishlist */
 391         if (format == PIPE_FORMAT_X8Z24_UNORM)
 392                 return FALSE;
 393
 394         if (format == PIPE_FORMAT_A1B5G5R5_UNORM || format == PIPE_FORMAT_X1B5G5R5_UNORM)
 395                 return FALSE;
 396
 397         /* TODO */
 398         if (format == PIPE_FORMAT_B5G5R5A1_UNORM)
 399                 return FALSE;
 400
 401         /* Don't confuse poorly written apps (workaround dEQP bug) that expect
 402          * more alpha than they ask for */
 403
 404         bool scanout = bind & (PIPE_BIND_SCANOUT | PIPE_BIND_SHARED | PIPE_BIND_DISPLAY_TARGET);
 405         bool renderable = bind & PIPE_BIND_RENDER_TARGET;
 406
 407         if (scanout && renderable && !util_format_is_rgba8_variant(format_desc))
 408                 return FALSE;
 409
 410         if (format_desc->layout != UTIL_FORMAT_LAYOUT_PLAIN &&
 411             format_desc->layout != UTIL_FORMAT_LAYOUT_OTHER) {
 412                 /* Compressed formats not yet hooked up. */
 413                 return FALSE;
 414         }
 415
 416         /* Internally, formats that are depth/stencil renderable are limited.
 417          *
 418          * In particular: Z16, Z24, Z24S8, S8 are all identical from the GPU
 419          * rendering perspective. That is, we render to Z24S8 (which we can
 420          * AFBC compress), ignore the different when texturing (who cares?),
 421          * and then in the off-chance there's a CPU read we blit back to
 422          * staging.
 423          *
 424          * ...alternatively, we can make the state tracker deal with that. */
 425
 426         if (bind & PIPE_BIND_DEPTH_STENCIL) {
 427                 switch (format) {
 428                         case PIPE_FORMAT_Z24_UNORM_S8_UINT:
 429                         case PIPE_FORMAT_Z24X8_UNORM:
 430                         case PIPE_FORMAT_Z32_UNORM:
 431                         case PIPE_FORMAT_Z32_FLOAT:
 432                         case PIPE_FORMAT_Z32_FLOAT_S8X24_UINT:
 433                                 return true;
 434
 435                         default:
 436                                 return false;
 437                 }
 438         }
 439
 440         return TRUE;
 441 }
 442
 443
 444 static void
 445 panfrost_destroy_screen(struct pipe_screen *pscreen)
 446 {
 447         struct panfrost_screen *screen = pan_screen(pscreen);
 448         panfrost_bo_cache_evict_all(screen);
 449         ralloc_free(screen);
 450 }
 451
 452 static void
 453 panfrost_flush_frontbuffer(struct pipe_screen *_screen,
 454                            struct pipe_resource *resource,
 455                            unsigned level, unsigned layer,
 456                            void *context_private,
 457                            struct pipe_box *sub_box)
 458 {
 459         /* TODO: Display target integration */
 460 }
 461
 462 static uint64_t
 463 panfrost_get_timestamp(struct pipe_screen *_screen)
 464 {
 465         return os_time_get_nano();
 466 }
 467
 468 static void
 469 panfrost_fence_reference(struct pipe_screen *pscreen,
 470                          struct pipe_fence_handle **ptr,
 471                          struct pipe_fence_handle *fence)
 472 {
 473         panfrost_drm_fence_reference(pscreen, ptr, fence);
 474 }
 475
 476 static boolean
 477 panfrost_fence_finish(struct pipe_screen *pscreen,
 478                       struct pipe_context *ctx,
 479                       struct pipe_fence_handle *fence,
 480                       uint64_t timeout)
 481 {
 482         return panfrost_drm_fence_finish(pscreen, ctx, fence, timeout);
 483 }
 484
 485 static const void *
 486 panfrost_screen_get_compiler_options(struct pipe_screen *pscreen,
 487                                      enum pipe_shader_ir ir,
 488                                      enum pipe_shader_type shader)
 489 {
 490         return &midgard_nir_options;
 491 }
 492
 493 struct pipe_screen *
 494 panfrost_create_screen(int fd, struct renderonly *ro)
 495 {
 496         struct panfrost_screen *screen = rzalloc(NULL, struct panfrost_screen);
 497
 498         pan_debug = debug_get_option_pan_debug();
 499
 500         if (!screen)
 501                 return NULL;
 502
 503         if (ro) {
 504                 screen->ro = renderonly_dup(ro);
 505                 if (!screen->ro) {
 506                         fprintf(stderr, "Failed to dup renderonly object\n");
 507                         free(screen);
 508                         return NULL;
 509                 }
 510         }
 511
 512         screen->fd = fd;
 513
 514         screen->gpu_id = panfrost_drm_query_gpu_version(screen);
 515
 516         /* Check if we're loading against a supported GPU model. */
 517
 518         switch (screen->gpu_id) {
 519         case 0x750: /* T760 */
 520         case 0x820: /* T820 */
 521         case 0x860: /* T860 */
 522                 break;
 523         default:
 524                 /* Fail to load against untested models */
 525                 debug_printf("panfrost: Unsupported model %X",
 526                              screen->gpu_id);
 527                 return NULL;
 528         }
 529
 530         util_dynarray_init(&screen->transient_bo, screen);
 531
 532         for (unsigned i = 0; i < ARRAY_SIZE(screen->bo_cache); ++i)
 533                 list_inithead(&screen->bo_cache[i]);
 534
 535         if (pan_debug & PAN_DBG_TRACE)
 536                 pandecode_initialize();
 537
 538         screen->base.destroy = panfrost_destroy_screen;
 539
 540         screen->base.get_name = panfrost_get_name;
 541         screen->base.get_vendor = panfrost_get_vendor;
 542         screen->base.get_device_vendor = panfrost_get_device_vendor;
 543         screen->base.get_param = panfrost_get_param;
 544         screen->base.get_shader_param = panfrost_get_shader_param;
 545         screen->base.get_paramf = panfrost_get_paramf;
 546         screen->base.get_timestamp = panfrost_get_timestamp;
 547         screen->base.is_format_supported = panfrost_is_format_supported;
 548         screen->base.context_create = panfrost_create_context;
 549         screen->base.flush_frontbuffer = panfrost_flush_frontbuffer;
 550         screen->base.get_compiler_options = panfrost_screen_get_compiler_options;
 551         screen->base.fence_reference = panfrost_fence_reference;
 552         screen->base.fence_finish = panfrost_fence_finish;
 553
 554         screen->last_fragment_flushed = true;
 555         screen->last_job = NULL;
 556
 557         panfrost_resource_screen_init(screen);
 558
 559         return &screen->base;
 560 }