src/gallium/drivers/panfrost/pan_screen.c

   1 /*
   2  * Copyright (C) 2008 VMware, Inc.
   3  * Copyright (C) 2014 Broadcom
   4  * Copyright (C) 2018 Alyssa Rosenzweig
   5  * Copyright (C) 2019 Collabora, Ltd.
   6  * Copyright (C) 2012 Rob Clark <robclark@freedesktop.org>
   7  *
   8  * Permission is hereby granted, free of charge, to any person obtaining a
   9  * copy of this software and associated documentation files (the "Software"),
  10  * to deal in the Software without restriction, including without limitation
  11  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  12  * and/or sell copies of the Software, and to permit persons to whom the
  13  * Software is furnished to do so, subject to the following conditions:
  14  *
  15  * The above copyright notice and this permission notice (including the next
  16  * paragraph) shall be included in all copies or substantial portions of the
  17  * Software.
  18  *
  19  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  20  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  21  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  22  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  23  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  24  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  25  * SOFTWARE.
  26  *
  27  */
  28
  29 #include "util/u_debug.h"
  30 #include "util/u_memory.h"
  31 #include "util/u_format.h"
  32 #include "util/u_format_s3tc.h"
  33 #include "util/u_video.h"
  34 #include "util/u_screen.h"
  35 #include "util/os_time.h"
  36 #include "util/u_process.h"
  37 #include "pipe/p_defines.h"
  38 #include "pipe/p_screen.h"
  39 #include "draw/draw_context.h"
  40
  41 #include <fcntl.h>
  42
  43 #include "drm-uapi/drm_fourcc.h"
  44
  45 #include "pan_screen.h"
  46 #include "pan_resource.h"
  47 #include "pan_public.h"
  48 #include "pan_util.h"
  49 #include "pandecode/decode.h"
  50
  51 #include "pan_context.h"
  52 #include "midgard/midgard_compile.h"
  53
  54 static const struct debug_named_value debug_options[] = {
  55         {"msgs",      PAN_DBG_MSGS,     "Print debug messages"},
  56         {"trace",     PAN_DBG_TRACE,    "Trace the command stream"},
  57         {"deqp",      PAN_DBG_DEQP,     "Hacks for dEQP"},
  58         {"afbc",      PAN_DBG_AFBC,     "Enable non-conformant AFBC impl"},
  59         DEBUG_NAMED_VALUE_END
  60 };
  61
  62 DEBUG_GET_ONCE_FLAGS_OPTION(pan_debug, "PAN_MESA_DEBUG", debug_options, 0)
  63
  64 int pan_debug = 0;
  65
  66 static const char *
  67 panfrost_get_name(struct pipe_screen *screen)
  68 {
  69         return "panfrost";
  70 }
  71
  72 static const char *
  73 panfrost_get_vendor(struct pipe_screen *screen)
  74 {
  75         return "panfrost";
  76 }
  77
  78 static const char *
  79 panfrost_get_device_vendor(struct pipe_screen *screen)
  80 {
  81         return "Arm";
  82 }
  83
  84 static int
  85 panfrost_get_param(struct pipe_screen *screen, enum pipe_cap param)
  86 {
  87         /* We expose in-dev stuff for dEQP that we don't want apps to use yet */
  88         bool is_deqp = pan_debug & PAN_DBG_DEQP;
  89
  90         switch (param) {
  91         case PIPE_CAP_NPOT_TEXTURES:
  92         case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
  93         case PIPE_CAP_MIXED_COLOR_DEPTH_BITS:
  94         case PIPE_CAP_FRAGMENT_SHADER_TEXTURE_LOD:
  95         case PIPE_CAP_VERTEX_SHADER_SATURATE:
  96         case PIPE_CAP_POINT_SPRITE:
  97                 return 1;
  98
  99         case PIPE_CAP_MAX_RENDER_TARGETS:
 100                 return is_deqp ? 4 : 1;
 101
 102
 103         case PIPE_CAP_OCCLUSION_QUERY:
 104                 return 1;
 105         case PIPE_CAP_QUERY_TIME_ELAPSED:
 106         case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
 107         case PIPE_CAP_QUERY_TIMESTAMP:
 108         case PIPE_CAP_QUERY_SO_OVERFLOW:
 109                 return 0;
 110
 111         case PIPE_CAP_TEXTURE_SWIZZLE:
 112                 return 1;
 113
 114         case PIPE_CAP_TGSI_INSTANCEID:
 115         case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
 116                 return is_deqp ? 1 : 0;
 117
 118         case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
 119                 return is_deqp ? 4 : 0;
 120         case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
 121         case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
 122                 return is_deqp ? 64 : 0;
 123         case PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS:
 124                 return 1;
 125
 126         case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
 127                 return is_deqp ? 256 : 0; /* for GL3 */
 128
 129         case PIPE_CAP_GLSL_FEATURE_LEVEL:
 130         case PIPE_CAP_GLSL_FEATURE_LEVEL_COMPATIBILITY:
 131                 return is_deqp ? 140 : 120;
 132         case PIPE_CAP_ESSL_FEATURE_LEVEL:
 133                 return is_deqp ? 300 : 120;
 134
 135         case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
 136                 return is_deqp ? 16 : 0;
 137
 138         case PIPE_CAP_CUBE_MAP_ARRAY:
 139                 return is_deqp;
 140
 141         /* For faking GLES 3.1 for dEQP-GLES31 */
 142         case PIPE_CAP_TEXTURE_MULTISAMPLE:
 143         case PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTERS:
 144         case PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTER_BUFFERS:
 145         case PIPE_CAP_IMAGE_LOAD_FORMATTED:
 146                 return is_deqp;
 147
 148         /* For faking compute shaders */
 149         case PIPE_CAP_COMPUTE:
 150                 return is_deqp;
 151
 152         /* TODO: Where does this req come from in practice? */
 153         case PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY:
 154                 return 1;
 155
 156         case PIPE_CAP_MAX_TEXTURE_2D_SIZE:
 157                 return 4096;
 158         case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
 159         case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
 160                 return 13;
 161
 162         case PIPE_CAP_BLEND_EQUATION_SEPARATE:
 163         case PIPE_CAP_INDEP_BLEND_ENABLE:
 164         case PIPE_CAP_INDEP_BLEND_FUNC:
 165                 return 1;
 166
 167         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
 168                 /* Hardware is natively upper left */
 169                 return 0;
 170
 171         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
 172         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
 173         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
 174         case PIPE_CAP_GENERATE_MIPMAP:
 175                 return 1;
 176
 177         /* We would prefer varyings */
 178         case PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL:
 179         case PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL:
 180                 return 0;
 181
 182         /* I really don't want to set this CAP but let's not swim against the
 183          * tide.. */
 184         case PIPE_CAP_TGSI_TEXCOORD:
 185                 return 1;
 186
 187         case PIPE_CAP_SEAMLESS_CUBE_MAP:
 188         case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
 189                 return 1;
 190
 191         case PIPE_CAP_MAX_VERTEX_ELEMENT_SRC_OFFSET:
 192                 return 0xffff;
 193
 194         case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
 195                 return 1;
 196
 197         case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE:
 198                 return 65536;
 199
 200         case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
 201                 return 0;
 202
 203         case PIPE_CAP_ENDIANNESS:
 204                 return PIPE_ENDIAN_NATIVE;
 205
 206         case PIPE_CAP_SAMPLER_VIEW_TARGET:
 207                 return 1;
 208
 209         case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET:
 210                 return -8;
 211
 212         case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET:
 213                 return 7;
 214
 215         case PIPE_CAP_VENDOR_ID:
 216         case PIPE_CAP_DEVICE_ID:
 217                 return 0xFFFFFFFF;
 218
 219         case PIPE_CAP_ACCELERATED:
 220         case PIPE_CAP_UMA:
 221         case PIPE_CAP_TEXTURE_FLOAT_LINEAR:
 222         case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR:
 223         case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS:
 224         case PIPE_CAP_TGSI_ARRAY_COMPONENTS:
 225                 return 1;
 226
 227         case PIPE_CAP_VIDEO_MEMORY: {
 228                 uint64_t system_memory;
 229
 230                 if (!os_get_total_physical_memory(&system_memory))
 231                         return 0;
 232
 233                 return (int)(system_memory >> 20);
 234         }
 235
 236         case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT:
 237                 return 4;
 238
 239         case PIPE_CAP_MAX_VARYINGS:
 240                 return 16;
 241
 242         default:
 243                 return u_pipe_screen_get_param_defaults(screen, param);
 244         }
 245 }
 246
 247 static int
 248 panfrost_get_shader_param(struct pipe_screen *screen,
 249                           enum pipe_shader_type shader,
 250                           enum pipe_shader_cap param)
 251 {
 252         bool is_deqp = pan_debug & PAN_DBG_DEQP;
 253
 254         if (shader != PIPE_SHADER_VERTEX &&
 255             shader != PIPE_SHADER_FRAGMENT &&
 256             !(shader == PIPE_SHADER_COMPUTE && is_deqp))
 257                 return 0;
 258
 259         /* this is probably not totally correct.. but it's a start: */
 260         switch (param) {
 261         case PIPE_SHADER_CAP_SCALAR_ISA:
 262                 return 0;
 263
 264         case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 265         case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 266         case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 267         case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 268                 return 16384;
 269
 270         case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 271                 return 1024;
 272
 273         case PIPE_SHADER_CAP_MAX_INPUTS:
 274                 return 16;
 275
 276         case PIPE_SHADER_CAP_MAX_OUTPUTS:
 277                 return shader == PIPE_SHADER_FRAGMENT ? 4 : 8;
 278
 279         case PIPE_SHADER_CAP_MAX_TEMPS:
 280                 return 256; /* GL_MAX_PROGRAM_TEMPORARIES_ARB */
 281
 282         case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
 283                 return 16 * 1024 * sizeof(float);
 284
 285         case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 286                 return PAN_MAX_CONST_BUFFERS;
 287
 288         case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
 289                 return 0;
 290
 291         case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
 292                 return 1;
 293         case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
 294                 return 0;
 295
 296         case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
 297                 return 0;
 298
 299         case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
 300                 return 1;
 301
 302         case PIPE_SHADER_CAP_SUBROUTINES:
 303                 return 0;
 304
 305         case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
 306                 return 0;
 307
 308         case PIPE_SHADER_CAP_INTEGERS:
 309                 return 1;
 310
 311         case PIPE_SHADER_CAP_INT64_ATOMICS:
 312         case PIPE_SHADER_CAP_FP16:
 313         case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
 314         case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
 315         case PIPE_SHADER_CAP_TGSI_LDEXP_SUPPORTED:
 316         case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
 317         case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
 318                 return 0;
 319
 320         case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 321         case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
 322                 return 16; /* XXX: How many? */
 323
 324         case PIPE_SHADER_CAP_PREFERRED_IR:
 325                 return PIPE_SHADER_IR_NIR;
 326
 327         case PIPE_SHADER_CAP_SUPPORTED_IRS:
 328                 return (1 << PIPE_SHADER_IR_NIR);
 329
 330         case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
 331                 return 32;
 332
 333         case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
 334         case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
 335                 return is_deqp ? 4 : 0;
 336         case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS:
 337         case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS:
 338                 return 0;
 339
 340         case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS:
 341         case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
 342                 return 0;
 343
 344         default:
 345                 fprintf(stderr, "unknown shader param %d\n", param);
 346                 return 0;
 347         }
 348
 349         return 0;
 350 }
 351
 352 static float
 353 panfrost_get_paramf(struct pipe_screen *screen, enum pipe_capf param)
 354 {
 355         switch (param) {
 356         case PIPE_CAPF_MAX_LINE_WIDTH:
 357
 358         /* fall-through */
 359         case PIPE_CAPF_MAX_LINE_WIDTH_AA:
 360                 return 255.0; /* arbitrary */
 361
 362         case PIPE_CAPF_MAX_POINT_WIDTH:
 363
 364         /* fall-through */
 365         case PIPE_CAPF_MAX_POINT_WIDTH_AA:
 366                 return 1024.0;
 367
 368         case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
 369                 return 16.0;
 370
 371         case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
 372                 return 16.0; /* arbitrary */
 373
 374         case PIPE_CAPF_MIN_CONSERVATIVE_RASTER_DILATE:
 375         case PIPE_CAPF_MAX_CONSERVATIVE_RASTER_DILATE:
 376         case PIPE_CAPF_CONSERVATIVE_RASTER_DILATE_GRANULARITY:
 377                 return 0.0f;
 378
 379         default:
 380                 debug_printf("Unexpected PIPE_CAPF %d query\n", param);
 381                 return 0.0;
 382         }
 383 }
 384
 385 /**
 386  * Query format support for creating a texture, drawing surface, etc.
 387  * \param format  the format to test
 388  * \param type  one of PIPE_TEXTURE, PIPE_SURFACE
 389  */
 390 static bool
 391 panfrost_is_format_supported( struct pipe_screen *screen,
 392                               enum pipe_format format,
 393                               enum pipe_texture_target target,
 394                               unsigned sample_count,
 395                               unsigned storage_sample_count,
 396                               unsigned bind)
 397 {
 398         const struct util_format_description *format_desc;
 399
 400         assert(target == PIPE_BUFFER ||
 401                target == PIPE_TEXTURE_1D ||
 402                target == PIPE_TEXTURE_1D_ARRAY ||
 403                target == PIPE_TEXTURE_2D ||
 404                target == PIPE_TEXTURE_2D_ARRAY ||
 405                target == PIPE_TEXTURE_RECT ||
 406                target == PIPE_TEXTURE_3D ||
 407                target == PIPE_TEXTURE_CUBE ||
 408                target == PIPE_TEXTURE_CUBE_ARRAY);
 409
 410         format_desc = util_format_description(format);
 411
 412         if (!format_desc)
 413                 return false;
 414
 415         if (sample_count > 1)
 416                 return false;
 417
 418         /* Format wishlist */
 419         if (format == PIPE_FORMAT_X8Z24_UNORM)
 420                 return false;
 421
 422         if (format == PIPE_FORMAT_A1B5G5R5_UNORM || format == PIPE_FORMAT_X1B5G5R5_UNORM)
 423                 return false;
 424
 425         /* TODO */
 426         if (format == PIPE_FORMAT_B5G5R5A1_UNORM)
 427                 return FALSE;
 428
 429         /* Don't confuse poorly written apps (workaround dEQP bug) that expect
 430          * more alpha than they ask for */
 431
 432         bool scanout = bind & (PIPE_BIND_SCANOUT | PIPE_BIND_SHARED | PIPE_BIND_DISPLAY_TARGET);
 433         bool renderable = bind & PIPE_BIND_RENDER_TARGET;
 434
 435         if (scanout && renderable && !util_format_is_rgba8_variant(format_desc))
 436                 return false;
 437
 438         if (format_desc->layout != UTIL_FORMAT_LAYOUT_PLAIN &&
 439             format_desc->layout != UTIL_FORMAT_LAYOUT_OTHER) {
 440                 /* Compressed formats not yet hooked up. */
 441                 return false;
 442         }
 443
 444         /* Internally, formats that are depth/stencil renderable are limited.
 445          *
 446          * In particular: Z16, Z24, Z24S8, S8 are all identical from the GPU
 447          * rendering perspective. That is, we render to Z24S8 (which we can
 448          * AFBC compress), ignore the different when texturing (who cares?),
 449          * and then in the off-chance there's a CPU read we blit back to
 450          * staging.
 451          *
 452          * ...alternatively, we can make the state tracker deal with that. */
 453
 454         if (bind & PIPE_BIND_DEPTH_STENCIL) {
 455                 switch (format) {
 456                         case PIPE_FORMAT_Z24_UNORM_S8_UINT:
 457                         case PIPE_FORMAT_Z24X8_UNORM:
 458                         case PIPE_FORMAT_Z32_UNORM:
 459                         case PIPE_FORMAT_Z32_FLOAT:
 460                         case PIPE_FORMAT_Z32_FLOAT_S8X24_UINT:
 461                                 return true;
 462
 463                         default:
 464                                 return false;
 465                 }
 466         }
 467
 468         return true;
 469 }
 470
 471 static int
 472 panfrost_get_compute_param(struct pipe_screen *pscreen, enum pipe_shader_ir ir_type,
 473                 enum pipe_compute_cap param, void *ret)
 474 {
 475         const char * const ir = "panfrost";
 476
 477         if (!(pan_debug & PAN_DBG_DEQP))
 478                 return 0;
 479
 480 #define RET(x) do {                  \
 481    if (ret)                          \
 482       memcpy(ret, x, sizeof(x));     \
 483    return sizeof(x);                 \
 484 } while (0)
 485
 486         switch (param) {
 487         case PIPE_COMPUTE_CAP_ADDRESS_BITS:
 488                 /* TODO: We'll want 64-bit pointers soon */
 489                 RET((uint32_t []){ 32 });
 490
 491         case PIPE_COMPUTE_CAP_IR_TARGET:
 492                 if (ret)
 493                         sprintf(ret, "%s", ir);
 494                 return strlen(ir) * sizeof(char);
 495
 496         case PIPE_COMPUTE_CAP_GRID_DIMENSION:
 497                 RET((uint64_t []) { 3 });
 498
 499         case PIPE_COMPUTE_CAP_MAX_GRID_SIZE:
 500                 RET(((uint64_t []) { 65535, 65535, 65535 }));
 501
 502         case PIPE_COMPUTE_CAP_MAX_BLOCK_SIZE:
 503                 RET(((uint64_t []) { 1024, 1024, 64 }));
 504
 505         case PIPE_COMPUTE_CAP_MAX_THREADS_PER_BLOCK:
 506                 RET((uint64_t []) { 1024 });
 507
 508         case PIPE_COMPUTE_CAP_MAX_GLOBAL_SIZE:
 509                 RET((uint64_t []) { 1024*1024*512 /* Maybe get memory */ });
 510
 511         case PIPE_COMPUTE_CAP_MAX_LOCAL_SIZE:
 512                 RET((uint64_t []) { 32768 });
 513
 514         case PIPE_COMPUTE_CAP_MAX_PRIVATE_SIZE:
 515         case PIPE_COMPUTE_CAP_MAX_INPUT_SIZE:
 516                 RET((uint64_t []) { 4096 });
 517
 518         case PIPE_COMPUTE_CAP_MAX_MEM_ALLOC_SIZE:
 519                 RET((uint64_t []) { 1024*1024*512 /* Maybe get memory */ });
 520
 521         case PIPE_COMPUTE_CAP_MAX_CLOCK_FREQUENCY:
 522                 RET((uint32_t []) { 800 /* MHz -- TODO */ });
 523
 524         case PIPE_COMPUTE_CAP_MAX_COMPUTE_UNITS:
 525                 RET((uint32_t []) { 9999 });  // TODO
 526
 527         case PIPE_COMPUTE_CAP_IMAGES_SUPPORTED:
 528                 RET((uint32_t []) { 1 }); // TODO
 529
 530         case PIPE_COMPUTE_CAP_SUBGROUP_SIZE:
 531                 RET((uint32_t []) { 32 });  // TODO
 532
 533         case PIPE_COMPUTE_CAP_MAX_VARIABLE_THREADS_PER_BLOCK:
 534                 RET((uint64_t []) { 1024 }); // TODO
 535         }
 536
 537         return 0;
 538 }
 539
 540 static void
 541 panfrost_destroy_screen(struct pipe_screen *pscreen)
 542 {
 543         struct panfrost_screen *screen = pan_screen(pscreen);
 544         panfrost_bo_cache_evict_all(screen);
 545         pthread_mutex_destroy(&screen->bo_cache_lock);
 546         drmFreeVersion(screen->kernel_version);
 547         ralloc_free(screen);
 548 }
 549
 550 static void
 551 panfrost_flush_frontbuffer(struct pipe_screen *_screen,
 552                            struct pipe_resource *resource,
 553                            unsigned level, unsigned layer,
 554                            void *context_private,
 555                            struct pipe_box *sub_box)
 556 {
 557         /* TODO: Display target integration */
 558 }
 559
 560 static uint64_t
 561 panfrost_get_timestamp(struct pipe_screen *_screen)
 562 {
 563         return os_time_get_nano();
 564 }
 565
 566 static void
 567 panfrost_fence_reference(struct pipe_screen *pscreen,
 568                          struct pipe_fence_handle **ptr,
 569                          struct pipe_fence_handle *fence)
 570 {
 571         panfrost_drm_fence_reference(pscreen, ptr, fence);
 572 }
 573
 574 static bool
 575 panfrost_fence_finish(struct pipe_screen *pscreen,
 576                       struct pipe_context *ctx,
 577                       struct pipe_fence_handle *fence,
 578                       uint64_t timeout)
 579 {
 580         return panfrost_drm_fence_finish(pscreen, ctx, fence, timeout);
 581 }
 582
 583 static const void *
 584 panfrost_screen_get_compiler_options(struct pipe_screen *pscreen,
 585                                      enum pipe_shader_ir ir,
 586                                      enum pipe_shader_type shader)
 587 {
 588         return &midgard_nir_options;
 589 }
 590
 591 struct pipe_screen *
 592 panfrost_create_screen(int fd, struct renderonly *ro)
 593 {
 594         pan_debug = debug_get_option_pan_debug();
 595
 596         /* Blacklist apps known to be buggy under Panfrost */
 597         const char *proc = util_get_process_name();
 598         const char *blacklist[] = {
 599                 "chromium",
 600                 "chrome",
 601         };
 602
 603         for (unsigned i = 0; i < ARRAY_SIZE(blacklist); ++i) {
 604                 if ((strcmp(blacklist[i], proc) == 0))
 605                         return NULL;
 606         }
 607
 608         /* Create the screen */
 609         struct panfrost_screen *screen = rzalloc(NULL, struct panfrost_screen);
 610
 611         if (!screen)
 612                 return NULL;
 613
 614         if (ro) {
 615                 screen->ro = renderonly_dup(ro);
 616                 if (!screen->ro) {
 617                         fprintf(stderr, "Failed to dup renderonly object\n");
 618                         free(screen);
 619                         return NULL;
 620                 }
 621         }
 622
 623         screen->fd = fd;
 624
 625         screen->gpu_id = panfrost_drm_query_gpu_version(screen);
 626         screen->require_sfbd = screen->gpu_id < 0x0750; /* T760 is the first to support MFBD */
 627         screen->kernel_version = drmGetVersion(fd);
 628
 629         /* Check if we're loading against a supported GPU model. */
 630
 631         switch (screen->gpu_id) {
 632         case 0x750: /* T760 */
 633         case 0x820: /* T820 */
 634         case 0x860: /* T860 */
 635                 break;
 636         default:
 637                 /* Fail to load against untested models */
 638                 debug_printf("panfrost: Unsupported model %X",
 639                              screen->gpu_id);
 640                 return NULL;
 641         }
 642
 643         pthread_mutex_init(&screen->bo_cache_lock, NULL);
 644         for (unsigned i = 0; i < ARRAY_SIZE(screen->bo_cache); ++i)
 645                 list_inithead(&screen->bo_cache[i]);
 646
 647         if (pan_debug & PAN_DBG_TRACE)
 648                 pandecode_initialize();
 649
 650         screen->base.destroy = panfrost_destroy_screen;
 651
 652         screen->base.get_name = panfrost_get_name;
 653         screen->base.get_vendor = panfrost_get_vendor;
 654         screen->base.get_device_vendor = panfrost_get_device_vendor;
 655         screen->base.get_param = panfrost_get_param;
 656         screen->base.get_shader_param = panfrost_get_shader_param;
 657         screen->base.get_compute_param = panfrost_get_compute_param;
 658         screen->base.get_paramf = panfrost_get_paramf;
 659         screen->base.get_timestamp = panfrost_get_timestamp;
 660         screen->base.is_format_supported = panfrost_is_format_supported;
 661         screen->base.context_create = panfrost_create_context;
 662         screen->base.flush_frontbuffer = panfrost_flush_frontbuffer;
 663         screen->base.get_compiler_options = panfrost_screen_get_compiler_options;
 664         screen->base.fence_reference = panfrost_fence_reference;
 665         screen->base.fence_finish = panfrost_fence_finish;
 666         screen->base.set_damage_region = panfrost_resource_set_damage_region;
 667
 668         panfrost_resource_screen_init(screen);
 669
 670         return &screen->base;
 671 }