src/gallium/drivers/panfrost/pan_screen.c

   1 /**************************************************************************
   2  *
   3  * Copyright 2008 VMware, Inc.
   4  * Copyright 2014 Broadcom
   5  * Copyright 2018 Alyssa Rosenzweig
   6  * All Rights Reserved.
   7  *
   8  * Permission is hereby granted, free of charge, to any person obtaining a
   9  * copy of this software and associated documentation files (the
  10  * "Software"), to deal in the Software without restriction, including
  11  * without limitation the rights to use, copy, modify, merge, publish,
  12  * distribute, sub license, and/or sell copies of the Software, and to
  13  * permit persons to whom the Software is furnished to do so, subject to
  14  * the following conditions:
  15  *
  16  * The above copyright notice and this permission notice (including the
  17  * next paragraph) shall be included in all copies or substantial portions
  18  * of the Software.
  19  *
  20  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  21  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  22  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  23  * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR
  24  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  25  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  26  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  27  *
  28  **************************************************************************/
  29
  30
  31 #include "util/u_debug.h"
  32 #include "util/u_memory.h"
  33 #include "util/u_format.h"
  34 #include "util/u_format_s3tc.h"
  35 #include "util/u_video.h"
  36 #include "util/u_screen.h"
  37 #include "util/os_time.h"
  38 #include "pipe/p_defines.h"
  39 #include "pipe/p_screen.h"
  40 #include "draw/draw_context.h"
  41 #include <xf86drm.h>
  42
  43 #include <fcntl.h>
  44
  45 #include "drm-uapi/drm_fourcc.h"
  46
  47 #include "pan_screen.h"
  48 #include "pan_resource.h"
  49 #include "pan_public.h"
  50 #include "pan_util.h"
  51
  52 #include "pan_context.h"
  53 #include "midgard/midgard_compile.h"
  54
  55 static const struct debug_named_value debug_options[] = {
  56         {"msgs",      PAN_DBG_MSGS,     "Print debug messages"},
  57         {"shaders",   PAN_DBG_SHADERS,  "Dump shaders in NIR"},
  58         DEBUG_NAMED_VALUE_END
  59 };
  60
  61 DEBUG_GET_ONCE_FLAGS_OPTION(pan_debug, "PAN_MESA_DEBUG", debug_options, 0)
  62
  63 int pan_debug = 0;
  64
  65 struct panfrost_driver *panfrost_create_drm_driver(int fd);
  66
  67 const char *pan_counters_base = NULL;
  68
  69 static const char *
  70 panfrost_get_name(struct pipe_screen *screen)
  71 {
  72         return "panfrost";
  73 }
  74
  75 static const char *
  76 panfrost_get_vendor(struct pipe_screen *screen)
  77 {
  78         return "panfrost";
  79 }
  80
  81 static const char *
  82 panfrost_get_device_vendor(struct pipe_screen *screen)
  83 {
  84         return "Arm";
  85 }
  86
  87 static int
  88 panfrost_get_param(struct pipe_screen *screen, enum pipe_cap param)
  89 {
  90         switch (param) {
  91         case PIPE_CAP_NPOT_TEXTURES:
  92         case PIPE_CAP_MIXED_FRAMEBUFFER_SIZES:
  93         case PIPE_CAP_MIXED_COLOR_DEPTH_BITS:
  94                 return 1;
  95
  96         case PIPE_CAP_SM3:
  97         case PIPE_CAP_POINT_SPRITE:
  98                 return 1;
  99
 100         case PIPE_CAP_MAX_RENDER_TARGETS:
 101         case PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS:
 102                 return 1;
 103
 104         case PIPE_CAP_OCCLUSION_QUERY:
 105         case PIPE_CAP_QUERY_TIME_ELAPSED:
 106         case PIPE_CAP_QUERY_PIPELINE_STATISTICS:
 107                 return 1; /* TODO: Queries */
 108
 109         case PIPE_CAP_TEXTURE_MIRROR_CLAMP:
 110         case PIPE_CAP_TEXTURE_SWIZZLE:
 111                 return 1;
 112
 113         /* TODO: ES3. We expose these caps so we can access higher dEQP
 114          * tests; in actuality they are nonfunctional */
 115         case PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS:
 116                 return 4;
 117         case PIPE_CAP_TGSI_INSTANCEID:
 118         case PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR:
 119                 return 1;
 120
 121         case PIPE_CAP_MAX_TEXTURE_2D_LEVELS:
 122         case PIPE_CAP_MAX_TEXTURE_3D_LEVELS:
 123         case PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS:
 124                 return 13;
 125
 126         case PIPE_CAP_BLEND_EQUATION_SEPARATE:
 127                 return 1;
 128
 129         case PIPE_CAP_INDEP_BLEND_ENABLE:
 130                 return 1;
 131
 132         case PIPE_CAP_INDEP_BLEND_FUNC:
 133                 return 1;
 134
 135         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT:
 136         case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
 137         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER:
 138         case PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER:
 139                 return 1;
 140
 141         case PIPE_CAP_DEPTH_CLIP_DISABLE:
 142                 return 1;
 143
 144         case PIPE_CAP_MAX_STREAM_OUTPUT_SEPARATE_COMPONENTS:
 145         case PIPE_CAP_MAX_STREAM_OUTPUT_INTERLEAVED_COMPONENTS:
 146                 return 16 * 4;
 147
 148         case PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES:
 149         case PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS:
 150                 return 1024;
 151
 152         case PIPE_CAP_MAX_VERTEX_STREAMS:
 153                 return 1;
 154
 155         case PIPE_CAP_SHADER_STENCIL_EXPORT:
 156                 return 1;
 157
 158         case PIPE_CAP_SEAMLESS_CUBE_MAP:
 159         case PIPE_CAP_SEAMLESS_CUBE_MAP_PER_TEXTURE:
 160                 return 1;
 161
 162         case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
 163                 return 256; /* for GL3 */
 164
 165         case PIPE_CAP_CONDITIONAL_RENDER:
 166                 return 1;
 167
 168         case PIPE_CAP_FRAGMENT_COLOR_CLAMPED:
 169         case PIPE_CAP_VERTEX_COLOR_UNCLAMPED:
 170         case PIPE_CAP_VERTEX_COLOR_CLAMPED:
 171                 return 1;
 172
 173         case PIPE_CAP_GLSL_FEATURE_LEVEL:
 174                 return 330;
 175
 176         case PIPE_CAP_USER_VERTEX_BUFFERS: /* TODO */
 177         case PIPE_CAP_RESOURCE_FROM_USER_MEMORY:
 178                 return 0;
 179
 180         case PIPE_CAP_TGSI_VS_LAYER_VIEWPORT:
 181         case PIPE_CAP_DOUBLES:
 182         case PIPE_CAP_INT64:
 183         case PIPE_CAP_INT64_DIVMOD:
 184                 return 1;
 185
 186         case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
 187                 return 16;
 188
 189         case PIPE_CAP_MAX_VERTEX_ELEMENT_SRC_OFFSET:
 190                 return 0xffff;
 191
 192         case PIPE_CAP_QUERY_TIMESTAMP:
 193         case PIPE_CAP_CUBE_MAP_ARRAY:
 194                 return 1;
 195
 196         case PIPE_CAP_TEXTURE_BUFFER_OBJECTS:
 197                 return 1;
 198
 199         case PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE:
 200                 return 65536;
 201
 202         case PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT:
 203                 return 0;
 204
 205         case PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER:
 206                 return 0;
 207
 208         case PIPE_CAP_MAX_VIEWPORTS:
 209                 return PIPE_MAX_VIEWPORTS;
 210
 211         case PIPE_CAP_ENDIANNESS:
 212                 return PIPE_ENDIAN_NATIVE;
 213
 214         case PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS:
 215                 return 4;
 216
 217         case PIPE_CAP_TEXTURE_GATHER_SM5:
 218         case PIPE_CAP_TEXTURE_QUERY_LOD:
 219         case PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION:
 220         case PIPE_CAP_SAMPLER_VIEW_TARGET:
 221         case PIPE_CAP_FAKE_SW_MSAA:
 222                 return 1;
 223
 224         case PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET:
 225                 return -32;
 226
 227         case PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET:
 228                 return 31;
 229
 230         case PIPE_CAP_DRAW_INDIRECT:
 231                 return 1;
 232
 233         case PIPE_CAP_QUERY_SO_OVERFLOW:
 234                 return 1;
 235
 236         case PIPE_CAP_VENDOR_ID:
 237                 return 0xFFFFFFFF;
 238
 239         case PIPE_CAP_DEVICE_ID:
 240                 return 0xFFFFFFFF;
 241
 242         case PIPE_CAP_ACCELERATED:
 243                 return 1;
 244
 245         case PIPE_CAP_VIDEO_MEMORY: {
 246                 uint64_t system_memory;
 247
 248                 if (!os_get_total_physical_memory(&system_memory))
 249                         return 0;
 250
 251                 return (int)(system_memory >> 20);
 252         }
 253
 254         case PIPE_CAP_UMA:
 255                 return 1;
 256
 257         case PIPE_CAP_CONDITIONAL_RENDER_INVERTED:
 258         case PIPE_CAP_CLIP_HALFZ:
 259         case PIPE_CAP_TEXTURE_FLOAT_LINEAR:
 260         case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR:
 261         case PIPE_CAP_FRAMEBUFFER_NO_ATTACHMENT:
 262         case PIPE_CAP_CULL_DISTANCE:
 263         case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS:
 264         case PIPE_CAP_TGSI_ARRAY_COMPONENTS:
 265         case PIPE_CAP_CLEAR_TEXTURE:
 266                 return 1;
 267
 268         case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT:
 269                 return 4;
 270
 271         case PIPE_CAP_MAX_VARYINGS:
 272                 return 16;
 273
 274         default:
 275                 return u_pipe_screen_get_param_defaults(screen, param);
 276         }
 277 }
 278
 279 static int
 280 panfrost_get_shader_param(struct pipe_screen *screen,
 281                           enum pipe_shader_type shader,
 282                           enum pipe_shader_cap param)
 283 {
 284         if (shader != PIPE_SHADER_VERTEX &&
 285                         shader != PIPE_SHADER_FRAGMENT) {
 286                 return 0;
 287         }
 288
 289         /* this is probably not totally correct.. but it's a start: */
 290         switch (param) {
 291         case PIPE_SHADER_CAP_SCALAR_ISA:
 292                 return 0;
 293
 294         case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 295                 return 0;
 296         case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 297         case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 298         case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 299                 return 16384;
 300
 301         case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 302                 return 1024;
 303
 304         case PIPE_SHADER_CAP_MAX_INPUTS:
 305                 return 16;
 306
 307         case PIPE_SHADER_CAP_MAX_OUTPUTS:
 308                 return shader == PIPE_SHADER_FRAGMENT ? 1 : 8;
 309
 310         case PIPE_SHADER_CAP_MAX_TEMPS:
 311                 return 256; /* GL_MAX_PROGRAM_TEMPORARIES_ARB */
 312
 313         case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
 314                 return 16 * 1024 * sizeof(float);
 315
 316         case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 317                 return 4;
 318
 319         case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
 320                 return 0;
 321
 322         case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
 323         case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
 324         case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
 325                 return 0;
 326
 327         case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
 328                 return 1;
 329
 330         case PIPE_SHADER_CAP_SUBROUTINES:
 331                 return 0;
 332
 333         case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
 334                 return 0;
 335
 336         case PIPE_SHADER_CAP_INTEGERS:
 337                 return 1;
 338
 339         case PIPE_SHADER_CAP_INT64_ATOMICS:
 340         case PIPE_SHADER_CAP_FP16:
 341         case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
 342         case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
 343         case PIPE_SHADER_CAP_TGSI_LDEXP_SUPPORTED:
 344         case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
 345         case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
 346                 return 0;
 347
 348         case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 349         case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
 350                 return 16; /* XXX: How many? */
 351
 352         case PIPE_SHADER_CAP_PREFERRED_IR:
 353                 return PIPE_SHADER_IR_NIR;
 354
 355         case PIPE_SHADER_CAP_SUPPORTED_IRS:
 356                 return 0;
 357
 358         case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
 359                 return 32;
 360
 361         case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
 362         case PIPE_SHADER_CAP_MAX_SHADER_IMAGES:
 363         case PIPE_SHADER_CAP_LOWER_IF_THRESHOLD:
 364         case PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS:
 365         case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS:
 366         case PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS:
 367                 return 0;
 368
 369         default:
 370                 fprintf(stderr, "unknown shader param %d\n", param);
 371                 return 0;
 372         }
 373
 374         return 0;
 375 }
 376
 377 static float
 378 panfrost_get_paramf(struct pipe_screen *screen, enum pipe_capf param)
 379 {
 380         switch (param) {
 381         case PIPE_CAPF_MAX_LINE_WIDTH:
 382
 383         /* fall-through */
 384         case PIPE_CAPF_MAX_LINE_WIDTH_AA:
 385                 return 255.0; /* arbitrary */
 386
 387         case PIPE_CAPF_MAX_POINT_WIDTH:
 388
 389         /* fall-through */
 390         case PIPE_CAPF_MAX_POINT_WIDTH_AA:
 391                 return 255.0; /* arbitrary */
 392
 393         case PIPE_CAPF_MAX_TEXTURE_ANISOTROPY:
 394                 return 16.0;
 395
 396         case PIPE_CAPF_MAX_TEXTURE_LOD_BIAS:
 397                 return 16.0; /* arbitrary */
 398
 399         default:
 400                 debug_printf("Unexpected PIPE_CAPF %d query\n", param);
 401                 return 0.0;
 402         }
 403 }
 404
 405 /**
 406  * Query format support for creating a texture, drawing surface, etc.
 407  * \param format  the format to test
 408  * \param type  one of PIPE_TEXTURE, PIPE_SURFACE
 409  */
 410 static boolean
 411 panfrost_is_format_supported( struct pipe_screen *screen,
 412                               enum pipe_format format,
 413                               enum pipe_texture_target target,
 414                               unsigned sample_count,
 415                               unsigned storage_sample_count,
 416                               unsigned bind)
 417 {
 418         const struct util_format_description *format_desc;
 419
 420         assert(target == PIPE_BUFFER ||
 421                target == PIPE_TEXTURE_1D ||
 422                target == PIPE_TEXTURE_1D_ARRAY ||
 423                target == PIPE_TEXTURE_2D ||
 424                target == PIPE_TEXTURE_2D_ARRAY ||
 425                target == PIPE_TEXTURE_RECT ||
 426                target == PIPE_TEXTURE_3D ||
 427                target == PIPE_TEXTURE_CUBE ||
 428                target == PIPE_TEXTURE_CUBE_ARRAY);
 429
 430         format_desc = util_format_description(format);
 431
 432         if (!format_desc)
 433                 return FALSE;
 434
 435         if (sample_count > 1)
 436                 return FALSE;
 437
 438         /* Format wishlist */
 439         if (format == PIPE_FORMAT_Z24X8_UNORM || format == PIPE_FORMAT_X8Z24_UNORM)
 440                 return FALSE;
 441
 442         if (format == PIPE_FORMAT_A1B5G5R5_UNORM || format == PIPE_FORMAT_X1B5G5R5_UNORM)
 443                 return FALSE;
 444
 445         if (bind & PIPE_BIND_RENDER_TARGET) {
 446                 /* We don't support rendering into anything but RGBA8 yet. We
 447                  * need more formats for spec compliance, but for now, honesty
 448                  * is the best policy <3 */
 449
 450                 if (!util_format_is_rgba8_variant(format_desc))
 451                         return FALSE;
 452
 453                 if (format_desc->colorspace == UTIL_FORMAT_COLORSPACE_ZS)
 454                         return FALSE;
 455
 456                 /*
 457                  * Although possible, it is unnatural to render into compressed or YUV
 458                  * surfaces. So disable these here to avoid going into weird paths
 459                  * inside the state trackers.
 460                  */
 461                 if (format_desc->block.width != 1 ||
 462                                 format_desc->block.height != 1)
 463                         return FALSE;
 464         }
 465
 466         if (bind & PIPE_BIND_DEPTH_STENCIL) {
 467                 if (format_desc->colorspace != UTIL_FORMAT_COLORSPACE_ZS)
 468                         return FALSE;
 469         }
 470
 471         if (format_desc->layout == UTIL_FORMAT_LAYOUT_BPTC ||
 472                         format_desc->layout == UTIL_FORMAT_LAYOUT_ASTC ||
 473                         format_desc->layout == UTIL_FORMAT_LAYOUT_ETC) {
 474                 /* Compressed formats not yet hooked up. */
 475                 return FALSE;
 476         }
 477
 478         if ((bind & (PIPE_BIND_RENDER_TARGET | PIPE_BIND_SAMPLER_VIEW)) &&
 479                         ((bind & PIPE_BIND_DISPLAY_TARGET) == 0) &&
 480                         target != PIPE_BUFFER) {
 481                 const struct util_format_description *desc =
 482                         util_format_description(format);
 483
 484                 if (desc->nr_channels == 3 && desc->is_array) {
 485                         /* Don't support any 3-component formats for rendering/texturing
 486                          * since we don't support the corresponding 8-bit 3 channel UNORM
 487                          * formats.  This allows us to support GL_ARB_copy_image between
 488                          * GL_RGB8 and GL_RGB8UI, for example.  Otherwise, we may be asked to
 489                          * do a resource copy between PIPE_FORMAT_R8G8B8_UINT and
 490                          * PIPE_FORMAT_R8G8B8X8_UNORM, for example, which will not work
 491                          * (different bpp).
 492                          */
 493                         return FALSE;
 494                 }
 495         }
 496
 497         return TRUE;
 498 }
 499
 500
 501 static void
 502 panfrost_destroy_screen( struct pipe_screen *screen )
 503 {
 504         FREE(screen);
 505 }
 506
 507 static void
 508 panfrost_flush_frontbuffer(struct pipe_screen *_screen,
 509                            struct pipe_resource *resource,
 510                            unsigned level, unsigned layer,
 511                            void *context_private,
 512                            struct pipe_box *sub_box)
 513 {
 514         /* TODO: Display target integration */
 515 }
 516
 517 static uint64_t
 518 panfrost_get_timestamp(struct pipe_screen *_screen)
 519 {
 520         return os_time_get_nano();
 521 }
 522
 523 static void
 524 panfrost_fence_reference(struct pipe_screen *pscreen,
 525                          struct pipe_fence_handle **ptr,
 526                          struct pipe_fence_handle *fence)
 527 {
 528         struct panfrost_screen *screen = pan_screen(pscreen);
 529         screen->driver->fence_reference(pscreen, ptr, fence);
 530 }
 531
 532 static boolean
 533 panfrost_fence_finish(struct pipe_screen *pscreen,
 534                       struct pipe_context *ctx,
 535                       struct pipe_fence_handle *fence,
 536                       uint64_t timeout)
 537 {
 538         struct panfrost_screen *screen = pan_screen(pscreen);
 539         return screen->driver->fence_finish(pscreen, ctx, fence, timeout);
 540 }
 541
 542 static const void *
 543 panfrost_screen_get_compiler_options(struct pipe_screen *pscreen,
 544                                      enum pipe_shader_ir ir,
 545                                      enum pipe_shader_type shader)
 546 {
 547         return &midgard_nir_options;
 548 }
 549
 550 struct pipe_screen *
 551 panfrost_create_screen(int fd, struct renderonly *ro)
 552 {
 553         struct panfrost_screen *screen = CALLOC_STRUCT(panfrost_screen);
 554
 555         pan_debug = debug_get_option_pan_debug();
 556
 557         if (!screen)
 558                 return NULL;
 559
 560         if (ro) {
 561                 screen->ro = renderonly_dup(ro);
 562                 if (!screen->ro) {
 563                         fprintf(stderr, "Failed to dup renderonly object\n");
 564                         free(screen);
 565                         return NULL;
 566                 }
 567         }
 568
 569         screen->driver = panfrost_create_drm_driver(fd);
 570
 571         /* Dump memory and/or performance counters iff asked for in the environment */
 572         const char *pantrace_base = getenv("PANTRACE_BASE");
 573         pan_counters_base = getenv("PANCOUNTERS_BASE");
 574
 575         if (pantrace_base) {
 576                 pantrace_initialize(pantrace_base);
 577         }
 578
 579         if (pan_counters_base) {
 580                 screen->driver->allocate_slab(screen, &screen->perf_counters, 64, true, 0, 0, 0);
 581                 screen->driver->enable_counters(screen);
 582         }
 583
 584         screen->base.destroy = panfrost_destroy_screen;
 585
 586         screen->base.get_name = panfrost_get_name;
 587         screen->base.get_vendor = panfrost_get_vendor;
 588         screen->base.get_device_vendor = panfrost_get_device_vendor;
 589         screen->base.get_param = panfrost_get_param;
 590         screen->base.get_shader_param = panfrost_get_shader_param;
 591         screen->base.get_paramf = panfrost_get_paramf;
 592         screen->base.get_timestamp = panfrost_get_timestamp;
 593         screen->base.is_format_supported = panfrost_is_format_supported;
 594         screen->base.context_create = panfrost_create_context;
 595         screen->base.flush_frontbuffer = panfrost_flush_frontbuffer;
 596         screen->base.get_compiler_options = panfrost_screen_get_compiler_options;
 597         screen->base.fence_reference = panfrost_fence_reference;
 598         screen->base.fence_finish = panfrost_fence_finish;
 599
 600         screen->last_fragment_flushed = true;
 601         screen->last_job = NULL;
 602
 603         panfrost_resource_screen_init(screen);
 604
 605         return &screen->base;
 606 }