src/gallium/drivers/r300/r300_context.c

   1 /*
   2  * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * on the rights to use, copy, modify, merge, publish, distribute, sub
   8  * license, and/or sell copies of the Software, and to permit persons to whom
   9  * the Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  18  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  19  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  20  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  21  * USE OR OTHER DEALINGS IN THE SOFTWARE. */
  22
  23 #include "draw/draw_context.h"
  24
  25 #include "util/u_memory.h"
  26 #include "util/u_sampler.h"
  27 #include "util/simple_list.h"
  28 #include "util/u_upload_mgr.h"
  29 #include "os/os_time.h"
  30 #include "vl/vl_decoder.h"
  31 #include "vl/vl_video_buffer.h"
  32
  33 #include "r300_cb.h"
  34 #include "r300_context.h"
  35 #include "r300_emit.h"
  36 #include "r300_screen.h"
  37 #include "r300_screen_buffer.h"
  38 #include "compiler/radeon_regalloc.h"
  39
  40 #include <inttypes.h>
  41
  42 static void r300_release_referenced_objects(struct r300_context *r300)
  43 {
  44     struct pipe_framebuffer_state *fb =
  45             (struct pipe_framebuffer_state*)r300->fb_state.state;
  46     struct r300_textures_state *textures =
  47             (struct r300_textures_state*)r300->textures_state.state;
  48     unsigned i;
  49
  50     /* Framebuffer state. */
  51     util_unreference_framebuffer_state(fb);
  52
  53     /* Textures. */
  54     for (i = 0; i < textures->sampler_view_count; i++)
  55         pipe_sampler_view_reference(
  56                 (struct pipe_sampler_view**)&textures->sampler_views[i], NULL);
  57
  58     /* The special dummy texture for texkill. */
  59     if (r300->texkill_sampler) {
  60         pipe_sampler_view_reference(
  61                 (struct pipe_sampler_view**)&r300->texkill_sampler,
  62                 NULL);
  63     }
  64
  65     /* Manually-created vertex buffers. */
  66     pipe_resource_reference(&r300->dummy_vb.buffer, NULL);
  67     pb_reference(&r300->vbo, NULL);
  68
  69     r300->context.delete_depth_stencil_alpha_state(&r300->context,
  70                                                    r300->dsa_decompress_zmask);
  71 }
  72
  73 static void r300_destroy_context(struct pipe_context* context)
  74 {
  75     struct r300_context* r300 = r300_context(context);
  76
  77     if (r300->cs && r300->hyperz_enabled) {
  78         r300->rws->cs_request_feature(r300->cs, RADEON_FID_R300_HYPERZ_ACCESS, FALSE);
  79     }
  80     if (r300->cs && r300->cmask_access) {
  81         r300->rws->cs_request_feature(r300->cs, RADEON_FID_R300_CMASK_ACCESS, FALSE);
  82     }
  83
  84     if (r300->blitter)
  85         util_blitter_destroy(r300->blitter);
  86     if (r300->draw)
  87         draw_destroy(r300->draw);
  88
  89     if (r300->uploader)
  90         u_upload_destroy(r300->uploader);
  91
  92     /* XXX: This function assumes r300->query_list was initialized */
  93     r300_release_referenced_objects(r300);
  94
  95     if (r300->cs)
  96         r300->rws->cs_destroy(r300->cs);
  97     if (r300->ctx)
  98         r300->rws->ctx_destroy(r300->ctx);
  99
 100     rc_destroy_regalloc_state(&r300->fs_regalloc_state);
 101
 102     /* XXX: No way to tell if this was initialized or not? */
 103     slab_destroy_child(&r300->pool_transfers);
 104
 105     /* Free the structs allocated in r300_setup_atoms() */
 106     if (r300->aa_state.state) {
 107         FREE(r300->aa_state.state);
 108         FREE(r300->blend_color_state.state);
 109         FREE(r300->clip_state.state);
 110         FREE(r300->fb_state.state);
 111         FREE(r300->gpu_flush.state);
 112         FREE(r300->hyperz_state.state);
 113         FREE(r300->invariant_state.state);
 114         FREE(r300->rs_block_state.state);
 115         FREE(r300->sample_mask.state);
 116         FREE(r300->scissor_state.state);
 117         FREE(r300->textures_state.state);
 118         FREE(r300->vap_invariant_state.state);
 119         FREE(r300->viewport_state.state);
 120         FREE(r300->ztop_state.state);
 121         FREE(r300->fs_constants.state);
 122         FREE(r300->vs_constants.state);
 123         if (!r300->screen->caps.has_tcl) {
 124             FREE(r300->vertex_stream_state.state);
 125         }
 126     }
 127     FREE(r300);
 128 }
 129
 130 static void r300_flush_callback(void *data, unsigned flags,
 131                                 struct pipe_fence_handle **fence)
 132 {
 133     struct r300_context* const cs_context_copy = data;
 134
 135     r300_flush(&cs_context_copy->context, flags, fence);
 136 }
 137
 138 #define R300_INIT_ATOM(atomname, atomsize) \
 139  do { \
 140     r300->atomname.name = #atomname; \
 141     r300->atomname.state = NULL; \
 142     r300->atomname.size = atomsize; \
 143     r300->atomname.emit = r300_emit_##atomname; \
 144     r300->atomname.dirty = FALSE; \
 145  } while (0)
 146
 147 #define R300_ALLOC_ATOM(atomname, statetype) \
 148 do { \
 149     r300->atomname.state = CALLOC_STRUCT(statetype); \
 150     if (r300->atomname.state == NULL) \
 151         return FALSE; \
 152 } while (0)
 153
 154 static boolean r300_setup_atoms(struct r300_context* r300)
 155 {
 156     boolean is_rv350 = r300->screen->caps.is_rv350;
 157     boolean is_r500 = r300->screen->caps.is_r500;
 158     boolean has_tcl = r300->screen->caps.has_tcl;
 159
 160     /* Create the actual atom list.
 161      *
 162      * Some atoms never change size, others change every emit - those have
 163      * the size of 0 here.
 164      *
 165      * NOTE: The framebuffer state is split into these atoms:
 166      * - gpu_flush          (unpipelined regs)
 167      * - aa_state           (unpipelined regs)
 168      * - fb_state           (unpipelined regs)
 169      * - hyperz_state       (unpipelined regs followed by pipelined ones)
 170      * - fb_state_pipelined (pipelined regs)
 171      * The motivation behind this is to be able to emit a strict
 172      * subset of the regs, and to have reasonable register ordering. */
 173     /* SC, GB (unpipelined), RB3D (unpipelined), ZB (unpipelined). */
 174     R300_INIT_ATOM(gpu_flush, 9);
 175     R300_INIT_ATOM(aa_state, 4);
 176     R300_INIT_ATOM(fb_state, 0);
 177     R300_INIT_ATOM(hyperz_state, is_r500 || is_rv350 ? 10 : 8);
 178     /* ZB (unpipelined), SC. */
 179     R300_INIT_ATOM(ztop_state, 2);
 180     /* ZB, FG. */
 181     R300_INIT_ATOM(dsa_state, is_r500 ? 10 : 6);
 182     /* RB3D. */
 183     R300_INIT_ATOM(blend_state, 8);
 184     R300_INIT_ATOM(blend_color_state, is_r500 ? 3 : 2);
 185     /* SC. */
 186     R300_INIT_ATOM(sample_mask, 2);
 187     R300_INIT_ATOM(scissor_state, 3);
 188     /* GB, FG, GA, SU, SC, RB3D. */
 189     R300_INIT_ATOM(invariant_state, 14 + (is_rv350 ? 4 : 0) + (is_r500 ? 4 : 0));
 190     /* VAP. */
 191     R300_INIT_ATOM(viewport_state, 9);
 192     R300_INIT_ATOM(pvs_flush, 2);
 193     R300_INIT_ATOM(vap_invariant_state, is_r500 || !has_tcl ? 11 : 9);
 194     R300_INIT_ATOM(vertex_stream_state, 0);
 195     R300_INIT_ATOM(vs_state, 0);
 196     R300_INIT_ATOM(vs_constants, 0);
 197     R300_INIT_ATOM(clip_state, has_tcl ? 3 + (6 * 4) : 0);
 198     /* VAP, RS, GA, GB, SU, SC. */
 199     R300_INIT_ATOM(rs_block_state, 0);
 200     R300_INIT_ATOM(rs_state, 0);
 201     /* SC, US. */
 202     R300_INIT_ATOM(fb_state_pipelined, 8);
 203     /* US. */
 204     R300_INIT_ATOM(fs, 0);
 205     R300_INIT_ATOM(fs_rc_constant_state, 0);
 206     R300_INIT_ATOM(fs_constants, 0);
 207     /* TX. */
 208     R300_INIT_ATOM(texture_cache_inval, 2);
 209     R300_INIT_ATOM(textures_state, 0);
 210     /* Clear commands */
 211     R300_INIT_ATOM(hiz_clear, r300->screen->caps.hiz_ram > 0 ? 4 : 0);
 212     R300_INIT_ATOM(zmask_clear, r300->screen->caps.zmask_ram > 0 ? 4 : 0);
 213     R300_INIT_ATOM(cmask_clear, 4);
 214     /* ZB (unpipelined), SU. */
 215     R300_INIT_ATOM(query_start, 4);
 216
 217     /* Replace emission functions for r500. */
 218     if (is_r500) {
 219         r300->fs.emit = r500_emit_fs;
 220         r300->fs_rc_constant_state.emit = r500_emit_fs_rc_constant_state;
 221         r300->fs_constants.emit = r500_emit_fs_constants;
 222     }
 223
 224     /* Some non-CSO atoms need explicit space to store the state locally. */
 225     R300_ALLOC_ATOM(aa_state, r300_aa_state);
 226     R300_ALLOC_ATOM(blend_color_state, r300_blend_color_state);
 227     R300_ALLOC_ATOM(clip_state, r300_clip_state);
 228     R300_ALLOC_ATOM(hyperz_state, r300_hyperz_state);
 229     R300_ALLOC_ATOM(invariant_state, r300_invariant_state);
 230     R300_ALLOC_ATOM(textures_state, r300_textures_state);
 231     R300_ALLOC_ATOM(vap_invariant_state, r300_vap_invariant_state);
 232     R300_ALLOC_ATOM(viewport_state, r300_viewport_state);
 233     R300_ALLOC_ATOM(ztop_state, r300_ztop_state);
 234     R300_ALLOC_ATOM(fb_state, pipe_framebuffer_state);
 235     R300_ALLOC_ATOM(gpu_flush, pipe_framebuffer_state);
 236     r300->sample_mask.state = malloc(4);
 237     R300_ALLOC_ATOM(scissor_state, pipe_scissor_state);
 238     R300_ALLOC_ATOM(rs_block_state, r300_rs_block);
 239     R300_ALLOC_ATOM(fs_constants, r300_constant_buffer);
 240     R300_ALLOC_ATOM(vs_constants, r300_constant_buffer);
 241     if (!r300->screen->caps.has_tcl) {
 242         R300_ALLOC_ATOM(vertex_stream_state, r300_vertex_stream_state);
 243     }
 244
 245     /* Some non-CSO atoms don't use the state pointer. */
 246     r300->fb_state_pipelined.allow_null_state = TRUE;
 247     r300->fs_rc_constant_state.allow_null_state = TRUE;
 248     r300->pvs_flush.allow_null_state = TRUE;
 249     r300->query_start.allow_null_state = TRUE;
 250     r300->texture_cache_inval.allow_null_state = TRUE;
 251
 252     /* Some states must be marked as dirty here to properly set up
 253      * hardware in the first command stream. */
 254     r300_mark_atom_dirty(r300, &r300->invariant_state);
 255     r300_mark_atom_dirty(r300, &r300->pvs_flush);
 256     r300_mark_atom_dirty(r300, &r300->vap_invariant_state);
 257     r300_mark_atom_dirty(r300, &r300->texture_cache_inval);
 258     r300_mark_atom_dirty(r300, &r300->textures_state);
 259
 260     return TRUE;
 261 }
 262
 263 /* Not every state tracker calls every driver function before the first draw
 264  * call and we must initialize the command buffers somehow. */
 265 static void r300_init_states(struct pipe_context *pipe)
 266 {
 267     struct r300_context *r300 = r300_context(pipe);
 268     struct pipe_blend_color bc = {{0}};
 269     struct pipe_clip_state cs = {{{0}}};
 270     struct pipe_scissor_state ss = {0};
 271     struct r300_gpu_flush *gpuflush =
 272             (struct r300_gpu_flush*)r300->gpu_flush.state;
 273     struct r300_vap_invariant_state *vap_invariant =
 274             (struct r300_vap_invariant_state*)r300->vap_invariant_state.state;
 275     struct r300_invariant_state *invariant =
 276             (struct r300_invariant_state*)r300->invariant_state.state;
 277
 278     CB_LOCALS;
 279
 280     pipe->set_blend_color(pipe, &bc);
 281     pipe->set_clip_state(pipe, &cs);
 282     pipe->set_scissor_states(pipe, 0, 1, &ss);
 283     pipe->set_sample_mask(pipe, ~0);
 284
 285     /* Initialize the GPU flush. */
 286     {
 287         BEGIN_CB(gpuflush->cb_flush_clean, 6);
 288
 289         /* Flush and free renderbuffer caches. */
 290         OUT_CB_REG(R300_RB3D_DSTCACHE_CTLSTAT,
 291             R300_RB3D_DSTCACHE_CTLSTAT_DC_FREE_FREE_3D_TAGS |
 292             R300_RB3D_DSTCACHE_CTLSTAT_DC_FLUSH_FLUSH_DIRTY_3D);
 293         OUT_CB_REG(R300_ZB_ZCACHE_CTLSTAT,
 294             R300_ZB_ZCACHE_CTLSTAT_ZC_FLUSH_FLUSH_AND_FREE |
 295             R300_ZB_ZCACHE_CTLSTAT_ZC_FREE_FREE);
 296
 297         /* Wait until the GPU is idle.
 298          * This fixes random pixels sometimes appearing probably caused
 299          * by incomplete rendering. */
 300         OUT_CB_REG(RADEON_WAIT_UNTIL, RADEON_WAIT_3D_IDLECLEAN);
 301         END_CB;
 302     }
 303
 304     /* Initialize the VAP invariant state. */
 305     {
 306         BEGIN_CB(vap_invariant->cb, r300->vap_invariant_state.size);
 307         OUT_CB_REG(VAP_PVS_VTX_TIMEOUT_REG, 0xffff);
 308         OUT_CB_REG_SEQ(R300_VAP_GB_VERT_CLIP_ADJ, 4);
 309         OUT_CB_32F(1.0);
 310         OUT_CB_32F(1.0);
 311         OUT_CB_32F(1.0);
 312         OUT_CB_32F(1.0);
 313         OUT_CB_REG(R300_VAP_PSC_SGN_NORM_CNTL, R300_SGN_NORM_NO_ZERO);
 314
 315         if (r300->screen->caps.is_r500) {
 316             OUT_CB_REG(R500_VAP_TEX_TO_COLOR_CNTL, 0);
 317         } else if (!r300->screen->caps.has_tcl) {
 318             /* RSxxx:
 319              * Static VAP setup since r300_emit_vs_state() is never called.
 320              */
 321             OUT_CB_REG(R300_VAP_CNTL, R300_PVS_NUM_SLOTS(10) |
 322                                       R300_PVS_NUM_CNTLRS(5) |
 323                                       R300_PVS_NUM_FPUS(2) |
 324                                       R300_PVS_VF_MAX_VTX_NUM(5));
 325         }
 326         END_CB;
 327     }
 328
 329     /* Initialize the invariant state. */
 330     {
 331         BEGIN_CB(invariant->cb, r300->invariant_state.size);
 332         OUT_CB_REG(R300_GB_SELECT, 0);
 333         OUT_CB_REG(R300_FG_FOG_BLEND, 0);
 334         OUT_CB_REG(R300_GA_OFFSET, 0);
 335         OUT_CB_REG(R300_SU_TEX_WRAP, 0);
 336         OUT_CB_REG(R300_SU_DEPTH_SCALE, 0x4B7FFFFF);
 337         OUT_CB_REG(R300_SU_DEPTH_OFFSET, 0);
 338         OUT_CB_REG(R300_SC_EDGERULE, 0x2DA49525);
 339
 340         if (r300->screen->caps.is_rv350) {
 341             OUT_CB_REG(R500_RB3D_DISCARD_SRC_PIXEL_LTE_THRESHOLD, 0x01010101);
 342             OUT_CB_REG(R500_RB3D_DISCARD_SRC_PIXEL_GTE_THRESHOLD, 0xFEFEFEFE);
 343         }
 344
 345         if (r300->screen->caps.is_r500) {
 346             OUT_CB_REG(R500_GA_COLOR_CONTROL_PS3, 0);
 347             OUT_CB_REG(R500_SU_TEX_WRAP_PS3, 0);
 348         }
 349         END_CB;
 350     }
 351
 352     /* Initialize the hyperz state. */
 353     {
 354         struct r300_hyperz_state *hyperz =
 355             (struct r300_hyperz_state*)r300->hyperz_state.state;
 356         BEGIN_CB(&hyperz->cb_flush_begin, r300->hyperz_state.size);
 357         OUT_CB_REG(R300_ZB_ZCACHE_CTLSTAT,
 358                    R300_ZB_ZCACHE_CTLSTAT_ZC_FLUSH_FLUSH_AND_FREE);
 359         OUT_CB_REG(R300_ZB_BW_CNTL, 0);
 360         OUT_CB_REG(R300_ZB_DEPTHCLEARVALUE, 0);
 361         OUT_CB_REG(R300_SC_HYPERZ, R300_SC_HYPERZ_ADJ_2);
 362
 363         if (r300->screen->caps.is_r500 || r300->screen->caps.is_rv350) {
 364             OUT_CB_REG(R300_GB_Z_PEQ_CONFIG, 0);
 365         }
 366         END_CB;
 367     }
 368 }
 369
 370 struct pipe_context* r300_create_context(struct pipe_screen* screen,
 371                                          void *priv, unsigned flags)
 372 {
 373     struct r300_context* r300 = CALLOC_STRUCT(r300_context);
 374     struct r300_screen* r300screen = r300_screen(screen);
 375     struct radeon_winsys *rws = r300screen->rws;
 376
 377     if (!r300)
 378         return NULL;
 379
 380     r300->rws = rws;
 381     r300->screen = r300screen;
 382
 383     r300->context.screen = screen;
 384     r300->context.priv = priv;
 385
 386     r300->context.destroy = r300_destroy_context;
 387
 388     slab_create_child(&r300->pool_transfers, &r300screen->pool_transfers);
 389
 390     r300->ctx = rws->ctx_create(rws);
 391     if (!r300->ctx)
 392         goto fail;
 393
 394     r300->cs = rws->cs_create(r300->ctx, RING_GFX, r300_flush_callback, r300);
 395     if (r300->cs == NULL)
 396         goto fail;
 397
 398     if (!r300screen->caps.has_tcl) {
 399         /* Create a Draw. This is used for SW TCL. */
 400         r300->draw = draw_create(&r300->context);
 401         if (r300->draw == NULL)
 402             goto fail;
 403         /* Enable our renderer. */
 404         draw_set_rasterize_stage(r300->draw, r300_draw_stage(r300));
 405         /* Disable converting points/lines to triangles. */
 406         draw_wide_line_threshold(r300->draw, 10000000.f);
 407         draw_wide_point_threshold(r300->draw, 10000000.f);
 408         draw_wide_point_sprites(r300->draw, FALSE);
 409         draw_enable_line_stipple(r300->draw, TRUE);
 410         draw_enable_point_sprites(r300->draw, FALSE);
 411     }
 412
 413     if (!r300_setup_atoms(r300))
 414         goto fail;
 415
 416     r300_init_blit_functions(r300);
 417     r300_init_flush_functions(r300);
 418     r300_init_query_functions(r300);
 419     r300_init_state_functions(r300);
 420     r300_init_resource_functions(r300);
 421     r300_init_render_functions(r300);
 422     r300_init_states(&r300->context);
 423
 424     r300->context.create_video_codec = vl_create_decoder;
 425     r300->context.create_video_buffer = vl_video_buffer_create;
 426
 427     r300->uploader = u_upload_create(&r300->context, 256 * 1024,
 428                                      PIPE_BIND_CUSTOM, PIPE_USAGE_STREAM);
 429
 430     r300->blitter = util_blitter_create(&r300->context);
 431     if (r300->blitter == NULL)
 432         goto fail;
 433     r300->blitter->draw_rectangle = r300_blitter_draw_rectangle;
 434
 435     /* The KIL opcode needs the first texture unit to be enabled
 436      * on r3xx-r4xx. In order to calm down the CS checker, we bind this
 437      * dummy texture there. */
 438     if (!r300->screen->caps.is_r500) {
 439         struct pipe_resource *tex;
 440         struct pipe_resource rtempl = {{0}};
 441         struct pipe_sampler_view vtempl = {{0}};
 442
 443         rtempl.target = PIPE_TEXTURE_2D;
 444         rtempl.format = PIPE_FORMAT_I8_UNORM;
 445         rtempl.usage = PIPE_USAGE_IMMUTABLE;
 446         rtempl.width0 = 1;
 447         rtempl.height0 = 1;
 448         rtempl.depth0 = 1;
 449         tex = screen->resource_create(screen, &rtempl);
 450
 451         u_sampler_view_default_template(&vtempl, tex, tex->format);
 452
 453         r300->texkill_sampler = (struct r300_sampler_view*)
 454             r300->context.create_sampler_view(&r300->context, tex, &vtempl);
 455
 456         pipe_resource_reference(&tex, NULL);
 457     }
 458
 459     if (r300screen->caps.has_tcl) {
 460         struct pipe_resource vb;
 461         memset(&vb, 0, sizeof(vb));
 462         vb.target = PIPE_BUFFER;
 463         vb.format = PIPE_FORMAT_R8_UNORM;
 464         vb.usage = PIPE_USAGE_DEFAULT;
 465         vb.width0 = sizeof(float) * 16;
 466         vb.height0 = 1;
 467         vb.depth0 = 1;
 468
 469         r300->dummy_vb.buffer = screen->resource_create(screen, &vb);
 470         r300->context.set_vertex_buffers(&r300->context, 0, 1, &r300->dummy_vb);
 471     }
 472
 473     {
 474         struct pipe_depth_stencil_alpha_state dsa;
 475         memset(&dsa, 0, sizeof(dsa));
 476         dsa.depth.writemask = 1;
 477
 478         r300->dsa_decompress_zmask =
 479             r300->context.create_depth_stencil_alpha_state(&r300->context,
 480                                                            &dsa);
 481     }
 482
 483     r300->hyperz_time_of_last_flush = os_time_get();
 484
 485     /* Register allocator state */
 486     rc_init_regalloc_state(&r300->fs_regalloc_state);
 487
 488     /* Print driver info. */
 489 #ifdef DEBUG
 490     {
 491 #else
 492     if (DBG_ON(r300, DBG_INFO)) {
 493 #endif
 494         fprintf(stderr,
 495                 "r300: DRM version: %d.%d.%d, Name: %s, ID: 0x%04x, GB: %d, Z: %d\n"
 496                 "r300: GART size: %"PRIu64" MB, VRAM size: %"PRIu64" MB\n"
 497                 "r300: AA compression RAM: %s, Z compression RAM: %s, HiZ RAM: %s\n",
 498                 r300->screen->info.drm_major,
 499                 r300->screen->info.drm_minor,
 500                 r300->screen->info.drm_patchlevel,
 501                 screen->get_name(screen),
 502                 r300->screen->info.pci_id,
 503                 r300->screen->info.r300_num_gb_pipes,
 504                 r300->screen->info.r300_num_z_pipes,
 505                 r300->screen->info.gart_size >> 20,
 506                 r300->screen->info.vram_size >> 20,
 507                 "YES", /* XXX really? */
 508                 r300->screen->caps.zmask_ram ? "YES" : "NO",
 509                 r300->screen->caps.hiz_ram ? "YES" : "NO");
 510     }
 511
 512     return &r300->context;
 513
 514 fail:
 515     r300_destroy_context(&r300->context);
 516     return NULL;
 517 }