r300g: turn fragment shader into a CB
[mesa.git] / src / gallium / drivers / r300 / r300_emit.c
1 /*
2 * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
3 * Copyright 2009 Marek Olšák <maraeo@gmail.com>
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * on the rights to use, copy, modify, merge, publish, distribute, sub
9 * license, and/or sell copies of the Software, and to permit persons to whom
10 * the Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the next
13 * paragraph) shall be included in all copies or substantial portions of the
14 * Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
20 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
21 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
22 * USE OR OTHER DEALINGS IN THE SOFTWARE. */
23
24 /* r300_emit: Functions for emitting state. */
25
26 #include "util/u_format.h"
27 #include "util/u_math.h"
28 #include "util/u_simple_list.h"
29
30 #include "r300_context.h"
31 #include "r300_cs.h"
32 #include "r300_emit.h"
33 #include "r300_fs.h"
34 #include "r300_screen.h"
35 #include "r300_screen_buffer.h"
36 #include "r300_vs.h"
37
38 void r300_emit_blend_state(struct r300_context* r300,
39 unsigned size, void* state)
40 {
41 struct r300_blend_state* blend = (struct r300_blend_state*)state;
42 struct pipe_framebuffer_state* fb =
43 (struct pipe_framebuffer_state*)r300->fb_state.state;
44 CS_LOCALS(r300);
45
46 if (fb->nr_cbufs) {
47 WRITE_CS_TABLE(blend->cb, size);
48 } else {
49 WRITE_CS_TABLE(blend->cb_no_readwrite, size);
50 }
51 }
52
53 void r300_emit_blend_color_state(struct r300_context* r300,
54 unsigned size, void* state)
55 {
56 struct r300_blend_color_state* bc = (struct r300_blend_color_state*)state;
57 CS_LOCALS(r300);
58
59 WRITE_CS_TABLE(bc->cb, size);
60 }
61
62 void r300_emit_clip_state(struct r300_context* r300,
63 unsigned size, void* state)
64 {
65 struct r300_clip_state* clip = (struct r300_clip_state*)state;
66 CS_LOCALS(r300);
67
68 WRITE_CS_TABLE(clip->cb, size);
69 }
70
71 void r300_emit_dsa_state(struct r300_context* r300, unsigned size, void* state)
72 {
73 struct r300_dsa_state* dsa = (struct r300_dsa_state*)state;
74 struct pipe_framebuffer_state* fb =
75 (struct pipe_framebuffer_state*)r300->fb_state.state;
76 CS_LOCALS(r300);
77
78 if (fb->zsbuf) {
79 WRITE_CS_TABLE(&dsa->cb_begin, size);
80 } else {
81 WRITE_CS_TABLE(dsa->cb_no_readwrite, size);
82 }
83 }
84
85 static const float * get_rc_constant_state(
86 struct r300_context * r300,
87 struct rc_constant * constant)
88 {
89 struct r300_textures_state* texstate = r300->textures_state.state;
90 static float vec[4] = { 0.0, 0.0, 0.0, 1.0 };
91 struct pipe_resource *tex;
92
93 assert(constant->Type == RC_CONSTANT_STATE);
94
95 switch (constant->u.State[0]) {
96 /* Factor for converting rectangle coords to
97 * normalized coords. Should only show up on non-r500. */
98 case RC_STATE_R300_TEXRECT_FACTOR:
99 tex = texstate->sampler_views[constant->u.State[1]]->base.texture;
100 vec[0] = 1.0 / tex->width0;
101 vec[1] = 1.0 / tex->height0;
102 break;
103
104 case RC_STATE_R300_VIEWPORT_SCALE:
105 vec[0] = r300->viewport.scale[0];
106 vec[1] = r300->viewport.scale[1];
107 vec[2] = r300->viewport.scale[2];
108 break;
109
110 case RC_STATE_R300_VIEWPORT_OFFSET:
111 vec[0] = r300->viewport.translate[0];
112 vec[1] = r300->viewport.translate[1];
113 vec[2] = r300->viewport.translate[2];
114 break;
115
116 default:
117 fprintf(stderr, "r300: Implementation error: "
118 "Unknown RC_CONSTANT type %d\n", constant->u.State[0]);
119 }
120
121 /* This should either be (0, 0, 0, 1), which should be a relatively safe
122 * RGBA or STRQ value, or it could be one of the RC_CONSTANT_STATE
123 * state factors. */
124 return vec;
125 }
126
127 /* Convert a normal single-precision float into the 7.16 format
128 * used by the R300 fragment shader.
129 */
130 uint32_t pack_float24(float f)
131 {
132 union {
133 float fl;
134 uint32_t u;
135 } u;
136 float mantissa;
137 int exponent;
138 uint32_t float24 = 0;
139
140 if (f == 0.0)
141 return 0;
142
143 u.fl = f;
144
145 mantissa = frexpf(f, &exponent);
146
147 /* Handle -ve */
148 if (mantissa < 0) {
149 float24 |= (1 << 23);
150 mantissa = mantissa * -1.0;
151 }
152 /* Handle exponent, bias of 63 */
153 exponent += 62;
154 float24 |= (exponent << 16);
155 /* Kill 7 LSB of mantissa */
156 float24 |= (u.u & 0x7FFFFF) >> 7;
157
158 return float24;
159 }
160
161 void r300_emit_fs(struct r300_context* r300, unsigned size, void *state)
162 {
163 struct r300_fragment_shader *fs = r300_fs(r300);
164 CS_LOCALS(r300);
165
166 WRITE_CS_TABLE(fs->shader->cb_code, fs->shader->cb_code_size);
167 }
168
169 void r300_emit_fs_constants(struct r300_context* r300, unsigned size, void *state)
170 {
171 struct r300_fragment_shader *fs = r300_fs(r300);
172 struct rc_constant_list *constants = &fs->shader->code.constants;
173 struct r300_constant_buffer *buf = (struct r300_constant_buffer*)state;
174 unsigned i, count = fs->shader->externals_count;
175 CS_LOCALS(r300);
176
177 if (count == 0)
178 return;
179
180 BEGIN_CS(size);
181 OUT_CS_REG_SEQ(R300_PFS_PARAM_0_X, count * 4);
182 for(i = 0; i < count; ++i) {
183 const float *data;
184 assert(constants->Constants[i].Type == RC_CONSTANT_EXTERNAL);
185 data = buf->constants[i];
186 OUT_CS(pack_float24(data[0]));
187 OUT_CS(pack_float24(data[1]));
188 OUT_CS(pack_float24(data[2]));
189 OUT_CS(pack_float24(data[3]));
190 }
191 END_CS;
192 }
193
194 void r300_emit_fs_rc_constant_state(struct r300_context* r300, unsigned size, void *state)
195 {
196 struct r300_fragment_shader *fs = r300_fs(r300);
197 struct rc_constant_list *constants = &fs->shader->code.constants;
198 unsigned i;
199 unsigned count = fs->shader->rc_state_count;
200 unsigned first = fs->shader->externals_count;
201 unsigned end = constants->Count;
202 CS_LOCALS(r300);
203
204 if (count == 0)
205 return;
206
207 BEGIN_CS(size);
208 for(i = first; i < end; ++i) {
209 if (constants->Constants[i].Type == RC_CONSTANT_STATE) {
210 const float *data =
211 get_rc_constant_state(r300, &constants->Constants[i]);
212
213 OUT_CS_REG_SEQ(R300_PFS_PARAM_0_X + i * 16, 4);
214 OUT_CS(pack_float24(data[0]));
215 OUT_CS(pack_float24(data[1]));
216 OUT_CS(pack_float24(data[2]));
217 OUT_CS(pack_float24(data[3]));
218 }
219 }
220 END_CS;
221 }
222
223 void r500_emit_fs(struct r300_context* r300, unsigned size, void *state)
224 {
225 struct r300_fragment_shader *fs = r300_fs(r300);
226 CS_LOCALS(r300);
227
228 WRITE_CS_TABLE(fs->shader->cb_code, fs->shader->cb_code_size);
229 }
230
231 void r500_emit_fs_constants(struct r300_context* r300, unsigned size, void *state)
232 {
233 struct r300_fragment_shader *fs = r300_fs(r300);
234 struct rc_constant_list *constants = &fs->shader->code.constants;
235 struct r300_constant_buffer *buf = (struct r300_constant_buffer*)state;
236 unsigned i, count = fs->shader->externals_count;
237 CS_LOCALS(r300);
238
239 if (count == 0)
240 return;
241
242 BEGIN_CS(size);
243 OUT_CS_REG(R500_GA_US_VECTOR_INDEX, R500_GA_US_VECTOR_INDEX_TYPE_CONST);
244 OUT_CS_ONE_REG(R500_GA_US_VECTOR_DATA, count * 4);
245 for(i = 0; i < count; ++i) {
246 assert(constants->Constants[i].Type == RC_CONSTANT_EXTERNAL);
247 }
248 OUT_CS_TABLE(buf->constants, count * 4);
249 END_CS;
250 }
251
252 void r500_emit_fs_rc_constant_state(struct r300_context* r300, unsigned size, void *state)
253 {
254 struct r300_fragment_shader *fs = r300_fs(r300);
255 struct rc_constant_list *constants = &fs->shader->code.constants;
256 unsigned i;
257 unsigned count = fs->shader->rc_state_count;
258 unsigned first = fs->shader->externals_count;
259 unsigned end = constants->Count;
260 CS_LOCALS(r300);
261
262 if (count == 0)
263 return;
264
265 BEGIN_CS(size);
266 for(i = first; i < end; ++i) {
267 if (constants->Constants[i].Type == RC_CONSTANT_STATE) {
268 const float *data =
269 get_rc_constant_state(r300, &constants->Constants[i]);
270
271 OUT_CS_REG(R500_GA_US_VECTOR_INDEX,
272 R500_GA_US_VECTOR_INDEX_TYPE_CONST |
273 (i & R500_GA_US_VECTOR_INDEX_MASK));
274 OUT_CS_ONE_REG(R500_GA_US_VECTOR_DATA, 4);
275 OUT_CS_TABLE(data, 4);
276 }
277 }
278 END_CS;
279 }
280
281 void r300_emit_fb_state(struct r300_context* r300, unsigned size, void* state)
282 {
283 struct pipe_framebuffer_state* fb = (struct pipe_framebuffer_state*)state;
284 struct r300_texture* tex;
285 struct pipe_surface* surf;
286 int i;
287 CS_LOCALS(r300);
288
289 BEGIN_CS(size);
290
291 /* Flush and free renderbuffer caches. */
292 OUT_CS_REG(R300_RB3D_DSTCACHE_CTLSTAT,
293 R300_RB3D_DSTCACHE_CTLSTAT_DC_FREE_FREE_3D_TAGS |
294 R300_RB3D_DSTCACHE_CTLSTAT_DC_FLUSH_FLUSH_DIRTY_3D);
295 OUT_CS_REG(R300_ZB_ZCACHE_CTLSTAT,
296 R300_ZB_ZCACHE_CTLSTAT_ZC_FLUSH_FLUSH_AND_FREE |
297 R300_ZB_ZCACHE_CTLSTAT_ZC_FREE_FREE);
298
299 /* NUM_MULTIWRITES replicates COLOR[0] to all colorbuffers, which is not
300 * what we usually want. */
301 if (r300->screen->caps.is_r500) {
302 OUT_CS_REG(R300_RB3D_CCTL,
303 R300_RB3D_CCTL_INDEPENDENT_COLORFORMAT_ENABLE_ENABLE);
304 } else {
305 OUT_CS_REG(R300_RB3D_CCTL, 0);
306 }
307
308 /* Set up colorbuffers. */
309 for (i = 0; i < fb->nr_cbufs; i++) {
310 surf = fb->cbufs[i];
311 tex = r300_texture(surf->texture);
312 assert(tex && tex->buffer && "cbuf is marked, but NULL!");
313
314 OUT_CS_REG_SEQ(R300_RB3D_COLOROFFSET0 + (4 * i), 1);
315 OUT_CS_TEX_RELOC(tex, surf->offset, 0, tex->domain, 0);
316
317 OUT_CS_REG_SEQ(R300_RB3D_COLORPITCH0 + (4 * i), 1);
318 OUT_CS_TEX_RELOC(tex, tex->fb_state.colorpitch[surf->level],
319 0, tex->domain, 0);
320
321 OUT_CS_REG(R300_US_OUT_FMT_0 + (4 * i), tex->fb_state.us_out_fmt);
322 }
323 for (; i < 4; i++) {
324 OUT_CS_REG(R300_US_OUT_FMT_0 + (4 * i), R300_US_OUT_FMT_UNUSED);
325 }
326
327 /* Set up a zbuffer. */
328 if (fb->zsbuf) {
329 surf = fb->zsbuf;
330 tex = r300_texture(surf->texture);
331 assert(tex && tex->buffer && "zsbuf is marked, but NULL!");
332
333 OUT_CS_REG_SEQ(R300_ZB_DEPTHOFFSET, 1);
334 OUT_CS_TEX_RELOC(tex, surf->offset, 0, tex->domain, 0);
335
336 OUT_CS_REG(R300_ZB_FORMAT, tex->fb_state.zb_format);
337
338 OUT_CS_REG_SEQ(R300_ZB_DEPTHPITCH, 1);
339 OUT_CS_TEX_RELOC(tex, tex->fb_state.depthpitch[surf->level],
340 0, tex->domain, 0);
341 }
342
343 OUT_CS_REG_SEQ(R300_SC_SCISSORS_TL, 2);
344 if (r300->screen->caps.is_r500) {
345 OUT_CS(0);
346 OUT_CS(((fb->width - 1) << R300_SCISSORS_X_SHIFT) |
347 ((fb->height - 1) << R300_SCISSORS_Y_SHIFT));
348 } else {
349 OUT_CS((1440 << R300_SCISSORS_X_SHIFT) |
350 (1440 << R300_SCISSORS_Y_SHIFT));
351 OUT_CS(((fb->width + 1440-1) << R300_SCISSORS_X_SHIFT) |
352 ((fb->height + 1440-1) << R300_SCISSORS_Y_SHIFT));
353 }
354 END_CS;
355 }
356
357 void r300_emit_query_start(struct r300_context *r300, unsigned size, void*state)
358 {
359 struct r300_query *query = r300->query_current;
360 CS_LOCALS(r300);
361
362 if (!query)
363 return;
364
365 BEGIN_CS(size);
366 if (r300->screen->caps.family == CHIP_FAMILY_RV530) {
367 OUT_CS_REG(RV530_FG_ZBREG_DEST, RV530_FG_ZBREG_DEST_PIPE_SELECT_ALL);
368 } else {
369 OUT_CS_REG(R300_SU_REG_DEST, R300_RASTER_PIPE_SELECT_ALL);
370 }
371 OUT_CS_REG(R300_ZB_ZPASS_DATA, 0);
372 END_CS;
373 query->begin_emitted = TRUE;
374 }
375
376
377 static void r300_emit_query_end_frag_pipes(struct r300_context *r300,
378 struct r300_query *query)
379 {
380 struct r300_capabilities* caps = &r300->screen->caps;
381 CS_LOCALS(r300);
382
383 assert(caps->num_frag_pipes);
384
385 BEGIN_CS(6 * caps->num_frag_pipes + 2);
386 /* I'm not so sure I like this switch, but it's hard to be elegant
387 * when there's so many special cases...
388 *
389 * So here's the basic idea. For each pipe, enable writes to it only,
390 * then put out the relocation for ZPASS_ADDR, taking into account a
391 * 4-byte offset for each pipe. RV380 and older are special; they have
392 * only two pipes, and the second pipe's enable is on bit 3, not bit 1,
393 * so there's a chipset cap for that. */
394 switch (caps->num_frag_pipes) {
395 case 4:
396 /* pipe 3 only */
397 OUT_CS_REG(R300_SU_REG_DEST, 1 << 3);
398 OUT_CS_REG_SEQ(R300_ZB_ZPASS_ADDR, 1);
399 OUT_CS_BUF_RELOC(r300->oqbo, query->offset + (sizeof(uint32_t) * 3),
400 0, r300_buffer(r300->oqbo)->domain, 0);
401 case 3:
402 /* pipe 2 only */
403 OUT_CS_REG(R300_SU_REG_DEST, 1 << 2);
404 OUT_CS_REG_SEQ(R300_ZB_ZPASS_ADDR, 1);
405 OUT_CS_BUF_RELOC(r300->oqbo, query->offset + (sizeof(uint32_t) * 2),
406 0, r300_buffer(r300->oqbo)->domain, 0);
407 case 2:
408 /* pipe 1 only */
409 /* As mentioned above, accomodate RV380 and older. */
410 OUT_CS_REG(R300_SU_REG_DEST,
411 1 << (caps->high_second_pipe ? 3 : 1));
412 OUT_CS_REG_SEQ(R300_ZB_ZPASS_ADDR, 1);
413 OUT_CS_BUF_RELOC(r300->oqbo, query->offset + (sizeof(uint32_t) * 1),
414 0, r300_buffer(r300->oqbo)->domain, 0);
415 case 1:
416 /* pipe 0 only */
417 OUT_CS_REG(R300_SU_REG_DEST, 1 << 0);
418 OUT_CS_REG_SEQ(R300_ZB_ZPASS_ADDR, 1);
419 OUT_CS_BUF_RELOC(r300->oqbo, query->offset + (sizeof(uint32_t) * 0),
420 0, r300_buffer(r300->oqbo)->domain, 0);
421 break;
422 default:
423 fprintf(stderr, "r300: Implementation error: Chipset reports %d"
424 " pixel pipes!\n", caps->num_frag_pipes);
425 abort();
426 }
427
428 /* And, finally, reset it to normal... */
429 OUT_CS_REG(R300_SU_REG_DEST, 0xF);
430 END_CS;
431 }
432
433 static void rv530_emit_query_end_single_z(struct r300_context *r300,
434 struct r300_query *query)
435 {
436 CS_LOCALS(r300);
437
438 BEGIN_CS(8);
439 OUT_CS_REG(RV530_FG_ZBREG_DEST, RV530_FG_ZBREG_DEST_PIPE_SELECT_0);
440 OUT_CS_REG_SEQ(R300_ZB_ZPASS_ADDR, 1);
441 OUT_CS_BUF_RELOC(r300->oqbo, query->offset, 0, r300_buffer(r300->oqbo)->domain, 0);
442 OUT_CS_REG(RV530_FG_ZBREG_DEST, RV530_FG_ZBREG_DEST_PIPE_SELECT_ALL);
443 END_CS;
444 }
445
446 static void rv530_emit_query_end_double_z(struct r300_context *r300,
447 struct r300_query *query)
448 {
449 CS_LOCALS(r300);
450
451 BEGIN_CS(14);
452 OUT_CS_REG(RV530_FG_ZBREG_DEST, RV530_FG_ZBREG_DEST_PIPE_SELECT_0);
453 OUT_CS_REG_SEQ(R300_ZB_ZPASS_ADDR, 1);
454 OUT_CS_BUF_RELOC(r300->oqbo, query->offset, 0, r300_buffer(r300->oqbo)->domain, 0);
455 OUT_CS_REG(RV530_FG_ZBREG_DEST, RV530_FG_ZBREG_DEST_PIPE_SELECT_1);
456 OUT_CS_REG_SEQ(R300_ZB_ZPASS_ADDR, 1);
457 OUT_CS_BUF_RELOC(r300->oqbo, query->offset + sizeof(uint32_t), 0, r300_buffer(r300->oqbo)->domain, 0);
458 OUT_CS_REG(RV530_FG_ZBREG_DEST, RV530_FG_ZBREG_DEST_PIPE_SELECT_ALL);
459 END_CS;
460 }
461
462 void r300_emit_query_end(struct r300_context* r300)
463 {
464 struct r300_capabilities *caps = &r300->screen->caps;
465 struct r300_query *query = r300->query_current;
466
467 if (!query)
468 return;
469
470 if (query->begin_emitted == FALSE)
471 return;
472
473 if (caps->family == CHIP_FAMILY_RV530) {
474 if (caps->num_z_pipes == 2)
475 rv530_emit_query_end_double_z(r300, query);
476 else
477 rv530_emit_query_end_single_z(r300, query);
478 } else
479 r300_emit_query_end_frag_pipes(r300, query);
480
481 query->begin_emitted = FALSE;
482 }
483
484 void r300_emit_rs_state(struct r300_context* r300, unsigned size, void* state)
485 {
486 struct r300_rs_state* rs = (struct r300_rs_state*)state;
487 float scale, offset;
488 CS_LOCALS(r300);
489
490 BEGIN_CS(size);
491 OUT_CS_REG(R300_VAP_CNTL_STATUS, rs->vap_control_status);
492
493 OUT_CS_REG(R300_GB_AA_CONFIG, rs->antialiasing_config);
494
495 OUT_CS_REG(R300_GA_POINT_SIZE, rs->point_size);
496 OUT_CS_REG_SEQ(R300_GA_POINT_MINMAX, 2);
497 OUT_CS(rs->point_minmax);
498 OUT_CS(rs->line_control);
499
500 if (rs->polygon_offset_enable) {
501 scale = rs->depth_scale * 12;
502 offset = rs->depth_offset;
503
504 switch (r300->zbuffer_bpp) {
505 case 16:
506 offset *= 4;
507 break;
508 case 24:
509 offset *= 2;
510 break;
511 }
512
513 OUT_CS_REG_SEQ(R300_SU_POLY_OFFSET_FRONT_SCALE, 4);
514 OUT_CS_32F(scale);
515 OUT_CS_32F(offset);
516 OUT_CS_32F(scale);
517 OUT_CS_32F(offset);
518 }
519
520 OUT_CS_REG_SEQ(R300_SU_POLY_OFFSET_ENABLE, 2);
521 OUT_CS(rs->polygon_offset_enable);
522 OUT_CS(rs->cull_mode);
523 OUT_CS_REG(R300_GA_LINE_STIPPLE_CONFIG, rs->line_stipple_config);
524 OUT_CS_REG(R300_GA_LINE_STIPPLE_VALUE, rs->line_stipple_value);
525 OUT_CS_REG(R300_GA_POLY_MODE, rs->polygon_mode);
526 OUT_CS_REG(R300_SC_CLIP_RULE, rs->clip_rule);
527 OUT_CS_REG(R300_GB_ENABLE, rs->stuffing_enable);
528 OUT_CS_REG_SEQ(R300_GA_POINT_S0, 4);
529 OUT_CS_32F(rs->point_texcoord_left);
530 OUT_CS_32F(rs->point_texcoord_bottom);
531 OUT_CS_32F(rs->point_texcoord_right);
532 OUT_CS_32F(rs->point_texcoord_top);
533 END_CS;
534 }
535
536 void r300_emit_rs_block_state(struct r300_context* r300,
537 unsigned size, void* state)
538 {
539 struct r300_rs_block* rs = (struct r300_rs_block*)state;
540 unsigned i;
541 /* It's the same for both INST and IP tables */
542 unsigned count = (rs->inst_count & R300_RS_INST_COUNT_MASK) + 1;
543 CS_LOCALS(r300);
544
545 if (SCREEN_DBG_ON(r300->screen, DBG_DRAW)) {
546 r500_dump_rs_block(rs);
547 }
548
549 DBG(r300, DBG_DRAW, "r300: RS emit:\n");
550
551 BEGIN_CS(size);
552 OUT_CS_REG_SEQ(R300_VAP_VTX_STATE_CNTL, 2);
553 OUT_CS(rs->vap_vtx_state_cntl);
554 OUT_CS(rs->vap_vsm_vtx_assm);
555 OUT_CS_REG_SEQ(R300_VAP_OUTPUT_VTX_FMT_0, 2);
556 OUT_CS(rs->vap_out_vtx_fmt[0]);
557 OUT_CS(rs->vap_out_vtx_fmt[1]);
558
559 if (r300->screen->caps.is_r500) {
560 OUT_CS_REG_SEQ(R500_RS_IP_0, count);
561 } else {
562 OUT_CS_REG_SEQ(R300_RS_IP_0, count);
563 }
564 OUT_CS_TABLE(rs->ip, count);
565 for (i = 0; i < count; i++) {
566 DBG(r300, DBG_DRAW, " : ip %d: 0x%08x\n", i, rs->ip[i]);
567 }
568
569 OUT_CS_REG_SEQ(R300_RS_COUNT, 2);
570 OUT_CS(rs->count);
571 OUT_CS(rs->inst_count);
572
573 if (r300->screen->caps.is_r500) {
574 OUT_CS_REG_SEQ(R500_RS_INST_0, count);
575 } else {
576 OUT_CS_REG_SEQ(R300_RS_INST_0, count);
577 }
578 OUT_CS_TABLE(rs->inst, count);
579 for (i = 0; i < count; i++) {
580 DBG(r300, DBG_DRAW, " : inst %d: 0x%08x\n", i, rs->inst[i]);
581 }
582
583 DBG(r300, DBG_DRAW, " : count: 0x%08x inst_count: 0x%08x\n",
584 rs->count, rs->inst_count);
585
586 END_CS;
587 }
588
589 void r300_emit_scissor_state(struct r300_context* r300,
590 unsigned size, void* state)
591 {
592 struct pipe_scissor_state* scissor = (struct pipe_scissor_state*)state;
593 CS_LOCALS(r300);
594
595 BEGIN_CS(size);
596 OUT_CS_REG_SEQ(R300_SC_CLIPRECT_TL_0, 2);
597 if (r300->screen->caps.is_r500) {
598 OUT_CS((scissor->minx << R300_CLIPRECT_X_SHIFT) |
599 (scissor->miny << R300_CLIPRECT_Y_SHIFT));
600 OUT_CS(((scissor->maxx - 1) << R300_CLIPRECT_X_SHIFT) |
601 ((scissor->maxy - 1) << R300_CLIPRECT_Y_SHIFT));
602 } else {
603 OUT_CS(((scissor->minx + 1440) << R300_CLIPRECT_X_SHIFT) |
604 ((scissor->miny + 1440) << R300_CLIPRECT_Y_SHIFT));
605 OUT_CS(((scissor->maxx + 1440-1) << R300_CLIPRECT_X_SHIFT) |
606 ((scissor->maxy + 1440-1) << R300_CLIPRECT_Y_SHIFT));
607 }
608 END_CS;
609 }
610
611 void r300_emit_textures_state(struct r300_context *r300,
612 unsigned size, void *state)
613 {
614 struct r300_textures_state *allstate = (struct r300_textures_state*)state;
615 struct r300_texture_sampler_state *texstate;
616 struct r300_texture *tex;
617 unsigned i;
618 CS_LOCALS(r300);
619
620 BEGIN_CS(size);
621 OUT_CS_REG(R300_TX_ENABLE, allstate->tx_enable);
622
623 for (i = 0; i < allstate->count; i++) {
624 if ((1 << i) & allstate->tx_enable) {
625 texstate = &allstate->regs[i];
626 tex = r300_texture(allstate->sampler_views[i]->base.texture);
627
628 OUT_CS_REG(R300_TX_FILTER0_0 + (i * 4), texstate->filter0);
629 OUT_CS_REG(R300_TX_FILTER1_0 + (i * 4), texstate->filter1);
630 OUT_CS_REG(R300_TX_BORDER_COLOR_0 + (i * 4),
631 texstate->border_color);
632
633 OUT_CS_REG(R300_TX_FORMAT0_0 + (i * 4), texstate->format.format0);
634 OUT_CS_REG(R300_TX_FORMAT1_0 + (i * 4), texstate->format.format1);
635 OUT_CS_REG(R300_TX_FORMAT2_0 + (i * 4), texstate->format.format2);
636
637 OUT_CS_REG_SEQ(R300_TX_OFFSET_0 + (i * 4), 1);
638 OUT_CS_TEX_RELOC(tex, texstate->format.tile_config, tex->domain,
639 0, 0);
640 }
641 }
642 END_CS;
643 }
644
645 void r300_emit_aos(struct r300_context* r300, int offset, boolean indexed)
646 {
647 struct pipe_vertex_buffer *vb1, *vb2, *vbuf = r300->vertex_buffer;
648 struct pipe_vertex_element *velem = r300->velems->velem;
649 struct r300_buffer *buf;
650 int i;
651 unsigned *hw_format_size = r300->velems->hw_format_size;
652 unsigned size1, size2, aos_count = r300->velems->count;
653 unsigned packet_size = (aos_count * 3 + 1) / 2;
654 CS_LOCALS(r300);
655
656 BEGIN_CS(2 + packet_size + aos_count * 2);
657 OUT_CS_PKT3(R300_PACKET3_3D_LOAD_VBPNTR, packet_size);
658 OUT_CS(aos_count | (!indexed ? R300_VC_FORCE_PREFETCH : 0));
659
660 for (i = 0; i < aos_count - 1; i += 2) {
661 vb1 = &vbuf[velem[i].vertex_buffer_index];
662 vb2 = &vbuf[velem[i+1].vertex_buffer_index];
663 size1 = hw_format_size[i];
664 size2 = hw_format_size[i+1];
665
666 OUT_CS(R300_VBPNTR_SIZE0(size1) | R300_VBPNTR_STRIDE0(vb1->stride) |
667 R300_VBPNTR_SIZE1(size2) | R300_VBPNTR_STRIDE1(vb2->stride));
668 OUT_CS(vb1->buffer_offset + velem[i].src_offset + offset * vb1->stride);
669 OUT_CS(vb2->buffer_offset + velem[i+1].src_offset + offset * vb2->stride);
670 }
671
672 if (aos_count & 1) {
673 vb1 = &vbuf[velem[i].vertex_buffer_index];
674 size1 = hw_format_size[i];
675
676 OUT_CS(R300_VBPNTR_SIZE0(size1) | R300_VBPNTR_STRIDE0(vb1->stride));
677 OUT_CS(vb1->buffer_offset + velem[i].src_offset + offset * vb1->stride);
678 }
679
680 for (i = 0; i < aos_count; i++) {
681 buf = r300_buffer(vbuf[velem[i].vertex_buffer_index].buffer);
682 OUT_CS_BUF_RELOC_NO_OFFSET(&buf->b.b, buf->domain, 0, 0);
683 }
684 END_CS;
685 }
686
687 void r300_emit_aos_swtcl(struct r300_context *r300, boolean indexed)
688 {
689 CS_LOCALS(r300);
690
691 DBG(r300, DBG_DRAW, "r300: Preparing vertex buffer %p for render, "
692 "vertex size %d\n", r300->vbo,
693 r300->vertex_info.size);
694 /* Set the pointer to our vertex buffer. The emitted values are this:
695 * PACKET3 [3D_LOAD_VBPNTR]
696 * COUNT [1]
697 * FORMAT [size | stride << 8]
698 * OFFSET [offset into BO]
699 * VBPNTR [relocated BO]
700 */
701 BEGIN_CS(7);
702 OUT_CS_PKT3(R300_PACKET3_3D_LOAD_VBPNTR, 3);
703 OUT_CS(1 | (!indexed ? R300_VC_FORCE_PREFETCH : 0));
704 OUT_CS(r300->vertex_info.size |
705 (r300->vertex_info.size << 8));
706 OUT_CS(r300->vbo_offset);
707 OUT_CS_BUF_RELOC(r300->vbo, 0, r300_buffer(r300->vbo)->domain, 0, 0);
708 END_CS;
709 }
710
711 void r300_emit_vertex_stream_state(struct r300_context* r300,
712 unsigned size, void* state)
713 {
714 struct r300_vertex_stream_state *streams =
715 (struct r300_vertex_stream_state*)state;
716 unsigned i;
717 CS_LOCALS(r300);
718
719 DBG(r300, DBG_DRAW, "r300: PSC emit:\n");
720
721 BEGIN_CS(size);
722 OUT_CS_REG_SEQ(R300_VAP_PROG_STREAM_CNTL_0, streams->count);
723 OUT_CS_TABLE(streams->vap_prog_stream_cntl, streams->count);
724 for (i = 0; i < streams->count; i++) {
725 DBG(r300, DBG_DRAW, " : prog_stream_cntl%d: 0x%08x\n", i,
726 streams->vap_prog_stream_cntl[i]);
727 }
728 OUT_CS_REG_SEQ(R300_VAP_PROG_STREAM_CNTL_EXT_0, streams->count);
729 OUT_CS_TABLE(streams->vap_prog_stream_cntl_ext, streams->count);
730 for (i = 0; i < streams->count; i++) {
731 DBG(r300, DBG_DRAW, " : prog_stream_cntl_ext%d: 0x%08x\n", i,
732 streams->vap_prog_stream_cntl_ext[i]);
733 }
734 END_CS;
735 }
736
737 void r300_emit_pvs_flush(struct r300_context* r300, unsigned size, void* state)
738 {
739 CS_LOCALS(r300);
740
741 BEGIN_CS(size);
742 OUT_CS_REG(R300_VAP_PVS_STATE_FLUSH_REG, 0x0);
743 END_CS;
744 }
745
746 void r300_emit_vs_state(struct r300_context* r300, unsigned size, void* state)
747 {
748 struct r300_vertex_shader* vs = (struct r300_vertex_shader*)state;
749 struct r300_vertex_program_code* code = &vs->code;
750 struct r300_screen* r300screen = r300->screen;
751 unsigned instruction_count = code->length / 4;
752 unsigned i;
753
754 unsigned vtx_mem_size = r300screen->caps.is_r500 ? 128 : 72;
755 unsigned input_count = MAX2(util_bitcount(code->InputsRead), 1);
756 unsigned output_count = MAX2(util_bitcount(code->OutputsWritten), 1);
757 unsigned temp_count = MAX2(code->num_temporaries, 1);
758
759 unsigned pvs_num_slots = MIN3(vtx_mem_size / input_count,
760 vtx_mem_size / output_count, 10);
761 unsigned pvs_num_controllers = MIN2(vtx_mem_size / temp_count, 6);
762
763 unsigned imm_first = vs->externals_count;
764 unsigned imm_end = vs->code.constants.Count;
765 unsigned imm_count = vs->immediates_count;
766
767 CS_LOCALS(r300);
768
769 BEGIN_CS(size);
770 /* R300_VAP_PVS_CODE_CNTL_0
771 * R300_VAP_PVS_CONST_CNTL
772 * R300_VAP_PVS_CODE_CNTL_1
773 * See the r5xx docs for instructions on how to use these. */
774 OUT_CS_REG_SEQ(R300_VAP_PVS_CODE_CNTL_0, 3);
775 OUT_CS(R300_PVS_FIRST_INST(0) |
776 R300_PVS_XYZW_VALID_INST(instruction_count - 1) |
777 R300_PVS_LAST_INST(instruction_count - 1));
778 OUT_CS(R300_PVS_MAX_CONST_ADDR(code->constants.Count - 1));
779 OUT_CS(instruction_count - 1);
780
781 OUT_CS_REG(R300_VAP_PVS_VECTOR_INDX_REG, 0);
782 OUT_CS_ONE_REG(R300_VAP_PVS_UPLOAD_DATA, code->length);
783 OUT_CS_TABLE(code->body.d, code->length);
784
785 OUT_CS_REG(R300_VAP_CNTL, R300_PVS_NUM_SLOTS(pvs_num_slots) |
786 R300_PVS_NUM_CNTLRS(pvs_num_controllers) |
787 R300_PVS_NUM_FPUS(r300screen->caps.num_vert_fpus) |
788 R300_PVS_VF_MAX_VTX_NUM(12) |
789 (r300screen->caps.is_r500 ? R500_TCL_STATE_OPTIMIZATION : 0));
790
791 /* Emit immediates. */
792 if (imm_count) {
793 OUT_CS_REG(R300_VAP_PVS_VECTOR_INDX_REG,
794 (r300->screen->caps.is_r500 ?
795 R500_PVS_CONST_START : R300_PVS_CONST_START) +
796 imm_first);
797 OUT_CS_ONE_REG(R300_VAP_PVS_UPLOAD_DATA, imm_count * 4);
798 for (i = imm_first; i < imm_end; i++) {
799 const float *data = vs->code.constants.Constants[i].u.Immediate;
800 OUT_CS_TABLE(data, 4);
801 }
802 }
803 END_CS;
804 }
805
806 void r300_emit_vs_constants(struct r300_context* r300,
807 unsigned size, void *state)
808 {
809 unsigned count =
810 ((struct r300_vertex_shader*)r300->vs_state.state)->externals_count;
811 struct r300_constant_buffer *buf = (struct r300_constant_buffer*)state;
812 CS_LOCALS(r300);
813
814 if (!count)
815 return;
816
817 BEGIN_CS(size);
818 OUT_CS_REG(R300_VAP_PVS_VECTOR_INDX_REG,
819 (r300->screen->caps.is_r500 ?
820 R500_PVS_CONST_START : R300_PVS_CONST_START));
821 OUT_CS_ONE_REG(R300_VAP_PVS_UPLOAD_DATA, count * 4);
822 OUT_CS_TABLE(buf->constants, count * 4);
823 END_CS;
824 }
825
826 void r300_emit_viewport_state(struct r300_context* r300,
827 unsigned size, void* state)
828 {
829 struct r300_viewport_state* viewport = (struct r300_viewport_state*)state;
830 CS_LOCALS(r300);
831
832 BEGIN_CS(size);
833 OUT_CS_REG_SEQ(R300_SE_VPORT_XSCALE, 6);
834 OUT_CS_32F(viewport->xscale);
835 OUT_CS_32F(viewport->xoffset);
836 OUT_CS_32F(viewport->yscale);
837 OUT_CS_32F(viewport->yoffset);
838 OUT_CS_32F(viewport->zscale);
839 OUT_CS_32F(viewport->zoffset);
840 OUT_CS_REG(R300_VAP_VTE_CNTL, viewport->vte_control);
841 END_CS;
842 }
843
844 void r300_emit_ztop_state(struct r300_context* r300,
845 unsigned size, void* state)
846 {
847 struct r300_ztop_state* ztop = (struct r300_ztop_state*)state;
848 CS_LOCALS(r300);
849
850 BEGIN_CS(size);
851 OUT_CS_REG(R300_ZB_ZTOP, ztop->z_buffer_top);
852 END_CS;
853 }
854
855 void r300_emit_texture_cache_inval(struct r300_context* r300, unsigned size, void* state)
856 {
857 CS_LOCALS(r300);
858
859 BEGIN_CS(size);
860 OUT_CS_REG(R300_TX_INVALTAGS, 0);
861 END_CS;
862 }
863
864 void r300_emit_buffer_validate(struct r300_context *r300,
865 boolean do_validate_vertex_buffers,
866 struct pipe_resource *index_buffer)
867 {
868 struct pipe_framebuffer_state* fb =
869 (struct pipe_framebuffer_state*)r300->fb_state.state;
870 struct r300_textures_state *texstate =
871 (struct r300_textures_state*)r300->textures_state.state;
872 struct r300_texture* tex;
873 struct pipe_vertex_buffer *vbuf = r300->vertex_buffer;
874 struct pipe_vertex_element *velem = r300->velems->velem;
875 struct pipe_resource *pbuf;
876 unsigned i;
877 boolean invalid = FALSE;
878
879 /* upload buffers first */
880 if (r300->screen->caps.has_tcl && r300->any_user_vbs) {
881 r300_upload_user_buffers(r300);
882 r300->any_user_vbs = false;
883 }
884
885 /* Clean out BOs. */
886 r300->rws->reset_bos(r300->rws);
887
888 validate:
889 /* Color buffers... */
890 for (i = 0; i < fb->nr_cbufs; i++) {
891 tex = r300_texture(fb->cbufs[i]->texture);
892 assert(tex && tex->buffer && "cbuf is marked, but NULL!");
893 if (!r300_add_texture(r300->rws, tex, 0, tex->domain)) {
894 r300->context.flush(&r300->context, 0, NULL);
895 goto validate;
896 }
897 }
898 /* ...depth buffer... */
899 if (fb->zsbuf) {
900 tex = r300_texture(fb->zsbuf->texture);
901 assert(tex && tex->buffer && "zsbuf is marked, but NULL!");
902 if (!r300_add_texture(r300->rws, tex,
903 0, tex->domain)) {
904 r300->context.flush(&r300->context, 0, NULL);
905 goto validate;
906 }
907 }
908 /* ...textures... */
909 for (i = 0; i < texstate->count; i++) {
910 if (!(texstate->tx_enable & (1 << i))) {
911 continue;
912 }
913
914 tex = r300_texture(texstate->sampler_views[i]->base.texture);
915 if (!r300_add_texture(r300->rws, tex, tex->domain, 0)) {
916 r300->context.flush(&r300->context, 0, NULL);
917 goto validate;
918 }
919 }
920 /* ...occlusion query buffer... */
921 if (r300->query_start.dirty ||
922 (r300->query_current && r300->query_current->begin_emitted)) {
923 if (!r300_add_buffer(r300->rws, r300->oqbo,
924 0, r300_buffer(r300->oqbo)->domain)) {
925 r300->context.flush(&r300->context, 0, NULL);
926 goto validate;
927 }
928 }
929 /* ...vertex buffer for SWTCL path... */
930 if (r300->vbo) {
931 if (!r300_add_buffer(r300->rws, r300->vbo,
932 r300_buffer(r300->vbo)->domain, 0)) {
933 r300->context.flush(&r300->context, 0, NULL);
934 goto validate;
935 }
936 }
937 /* ...vertex buffers for HWTCL path... */
938 if (do_validate_vertex_buffers) {
939 for (i = 0; i < r300->velems->count; i++) {
940 pbuf = vbuf[velem[i].vertex_buffer_index].buffer;
941
942 if (!r300_add_buffer(r300->rws, pbuf,
943 r300_buffer(pbuf)->domain, 0)) {
944 r300->context.flush(&r300->context, 0, NULL);
945 goto validate;
946 }
947 }
948 }
949 /* ...and index buffer for HWTCL path. */
950 if (index_buffer) {
951 if (!r300_add_buffer(r300->rws, index_buffer,
952 r300_buffer(index_buffer)->domain, 0)) {
953 r300->context.flush(&r300->context, 0, NULL);
954 goto validate;
955 }
956 }
957 if (!r300->rws->validate(r300->rws)) {
958 r300->context.flush(&r300->context, 0, NULL);
959 if (invalid) {
960 /* Well, hell. */
961 fprintf(stderr, "r300: Stuck in validation loop, gonna quit now.\n");
962 abort();
963 }
964 invalid = TRUE;
965 goto validate;
966 }
967 }
968
969 unsigned r300_get_num_dirty_dwords(struct r300_context *r300)
970 {
971 struct r300_atom* atom;
972 unsigned dwords = 0;
973
974 foreach(atom, &r300->atom_list) {
975 if (atom->dirty) {
976 dwords += atom->size;
977 }
978 }
979
980 /* let's reserve some more, just in case */
981 dwords += 32;
982
983 return dwords;
984 }
985
986 /* Emit all dirty state. */
987 void r300_emit_dirty_state(struct r300_context* r300)
988 {
989 struct r300_atom* atom;
990
991 foreach(atom, &r300->atom_list) {
992 if (atom->dirty) {
993 atom->emit(r300, atom->size, atom->state);
994 if (SCREEN_DBG_ON(r300->screen, DBG_STATS)) {
995 atom->counter++;
996 }
997 atom->dirty = FALSE;
998 }
999 }
1000
1001 r300->dirty_hw++;
1002 }