src/gallium/drivers/r300/r300_emit.c

   1 /*
   2  * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
   3  * Copyright 2009 Marek Olšák <maraeo@gmail.com>
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * on the rights to use, copy, modify, merge, publish, distribute, sub
   9  * license, and/or sell copies of the Software, and to permit persons to whom
  10  * the Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  20  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  21  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  22  * USE OR OTHER DEALINGS IN THE SOFTWARE. */
  23
  24 /* r300_emit: Functions for emitting state. */
  25
  26 #include "util/u_format.h"
  27 #include "util/u_math.h"
  28 #include "util/u_simple_list.h"
  29
  30 #include "r300_context.h"
  31 #include "r300_cs.h"
  32 #include "r300_emit.h"
  33 #include "r300_fs.h"
  34 #include "r300_screen.h"
  35 #include "r300_texture.h"
  36 #include "r300_screen_buffer.h"
  37 #include "r300_vs.h"
  38
  39 void r300_emit_blend_state(struct r300_context* r300,
  40                            unsigned size, void* state)
  41 {
  42     struct r300_blend_state* blend = (struct r300_blend_state*)state;
  43     struct pipe_framebuffer_state* fb =
  44         (struct pipe_framebuffer_state*)r300->fb_state.state;
  45     CS_LOCALS(r300);
  46
  47     if (fb->nr_cbufs) {
  48         WRITE_CS_TABLE(blend->cb, size);
  49     } else {
  50         WRITE_CS_TABLE(blend->cb_no_readwrite, size);
  51     }
  52 }
  53
  54 void r300_emit_blend_color_state(struct r300_context* r300,
  55                                  unsigned size, void* state)
  56 {
  57     struct r300_blend_color_state* bc = (struct r300_blend_color_state*)state;
  58     CS_LOCALS(r300);
  59
  60     WRITE_CS_TABLE(bc->cb, size);
  61 }
  62
  63 void r300_emit_clip_state(struct r300_context* r300,
  64                           unsigned size, void* state)
  65 {
  66     struct r300_clip_state* clip = (struct r300_clip_state*)state;
  67     CS_LOCALS(r300);
  68
  69     WRITE_CS_TABLE(clip->cb, size);
  70 }
  71
  72 void r300_emit_dsa_state(struct r300_context* r300, unsigned size, void* state)
  73 {
  74     struct r300_dsa_state* dsa = (struct r300_dsa_state*)state;
  75     struct pipe_framebuffer_state* fb =
  76         (struct pipe_framebuffer_state*)r300->fb_state.state;
  77     CS_LOCALS(r300);
  78
  79     if (fb->zsbuf) {
  80         WRITE_CS_TABLE(&dsa->cb_begin, size);
  81     } else {
  82         WRITE_CS_TABLE(dsa->cb_no_readwrite, size);
  83     }
  84 }
  85
  86 static const float * get_rc_constant_state(
  87     struct r300_context * r300,
  88     struct rc_constant * constant)
  89 {
  90     struct r300_textures_state* texstate = r300->textures_state.state;
  91     static float vec[4] = { 0.0, 0.0, 0.0, 1.0 };
  92     struct pipe_resource *tex;
  93
  94     assert(constant->Type == RC_CONSTANT_STATE);
  95
  96     switch (constant->u.State[0]) {
  97         /* Factor for converting rectangle coords to
  98          * normalized coords. Should only show up on non-r500. */
  99         case RC_STATE_R300_TEXRECT_FACTOR:
 100             tex = texstate->sampler_views[constant->u.State[1]]->base.texture;
 101             vec[0] = 1.0 / tex->width0;
 102             vec[1] = 1.0 / tex->height0;
 103             break;
 104
 105         case RC_STATE_R300_VIEWPORT_SCALE:
 106             vec[0] = r300->viewport.scale[0];
 107             vec[1] = r300->viewport.scale[1];
 108             vec[2] = r300->viewport.scale[2];
 109             break;
 110
 111         case RC_STATE_R300_VIEWPORT_OFFSET:
 112             vec[0] = r300->viewport.translate[0];
 113             vec[1] = r300->viewport.translate[1];
 114             vec[2] = r300->viewport.translate[2];
 115             break;
 116
 117         default:
 118             fprintf(stderr, "r300: Implementation error: "
 119                 "Unknown RC_CONSTANT type %d\n", constant->u.State[0]);
 120     }
 121
 122     /* This should either be (0, 0, 0, 1), which should be a relatively safe
 123      * RGBA or STRQ value, or it could be one of the RC_CONSTANT_STATE
 124      * state factors. */
 125     return vec;
 126 }
 127
 128 /* Convert a normal single-precision float into the 7.16 format
 129  * used by the R300 fragment shader.
 130  */
 131 uint32_t pack_float24(float f)
 132 {
 133     union {
 134         float fl;
 135         uint32_t u;
 136     } u;
 137     float mantissa;
 138     int exponent;
 139     uint32_t float24 = 0;
 140
 141     if (f == 0.0)
 142         return 0;
 143
 144     u.fl = f;
 145
 146     mantissa = frexpf(f, &exponent);
 147
 148     /* Handle -ve */
 149     if (mantissa < 0) {
 150         float24 |= (1 << 23);
 151         mantissa = mantissa * -1.0;
 152     }
 153     /* Handle exponent, bias of 63 */
 154     exponent += 62;
 155     float24 |= (exponent << 16);
 156     /* Kill 7 LSB of mantissa */
 157     float24 |= (u.u & 0x7FFFFF) >> 7;
 158
 159     return float24;
 160 }
 161
 162 void r300_emit_fs(struct r300_context* r300, unsigned size, void *state)
 163 {
 164     struct r300_fragment_shader *fs = r300_fs(r300);
 165     CS_LOCALS(r300);
 166
 167     WRITE_CS_TABLE(fs->shader->cb_code, fs->shader->cb_code_size);
 168 }
 169
 170 void r300_emit_fs_constants(struct r300_context* r300, unsigned size, void *state)
 171 {
 172     struct r300_fragment_shader *fs = r300_fs(r300);
 173     struct r300_constant_buffer *buf = (struct r300_constant_buffer*)state;
 174     unsigned count = fs->shader->externals_count * 4;
 175     CS_LOCALS(r300);
 176
 177     if (count == 0)
 178         return;
 179
 180     BEGIN_CS(size);
 181     OUT_CS_REG_SEQ(R300_PFS_PARAM_0_X, count);
 182     OUT_CS_TABLE(buf->constants, count);
 183     END_CS;
 184 }
 185
 186 void r300_emit_fs_rc_constant_state(struct r300_context* r300, unsigned size, void *state)
 187 {
 188     struct r300_fragment_shader *fs = r300_fs(r300);
 189     struct rc_constant_list *constants = &fs->shader->code.constants;
 190     unsigned i;
 191     unsigned count = fs->shader->rc_state_count;
 192     unsigned first = fs->shader->externals_count;
 193     unsigned end = constants->Count;
 194     uint32_t cdata[4];
 195     unsigned j;
 196     CS_LOCALS(r300);
 197
 198     if (count == 0)
 199         return;
 200
 201     BEGIN_CS(size);
 202     for(i = first; i < end; ++i) {
 203         if (constants->Constants[i].Type == RC_CONSTANT_STATE) {
 204             const float *data =
 205                     get_rc_constant_state(r300, &constants->Constants[i]);
 206
 207             for (j = 0; j < 4; j++)
 208                 cdata[j] = pack_float24(data[j]);
 209
 210             OUT_CS_REG_SEQ(R300_PFS_PARAM_0_X + i * 16, 4);
 211             OUT_CS_TABLE(cdata, 4);
 212         }
 213     }
 214     END_CS;
 215 }
 216
 217 void r500_emit_fs(struct r300_context* r300, unsigned size, void *state)
 218 {
 219     struct r300_fragment_shader *fs = r300_fs(r300);
 220     CS_LOCALS(r300);
 221
 222     WRITE_CS_TABLE(fs->shader->cb_code, fs->shader->cb_code_size);
 223 }
 224
 225 void r500_emit_fs_constants(struct r300_context* r300, unsigned size, void *state)
 226 {
 227     struct r300_fragment_shader *fs = r300_fs(r300);
 228     struct r300_constant_buffer *buf = (struct r300_constant_buffer*)state;
 229     unsigned count = fs->shader->externals_count * 4;
 230     CS_LOCALS(r300);
 231
 232     if (count == 0)
 233         return;
 234
 235     BEGIN_CS(size);
 236     OUT_CS_REG(R500_GA_US_VECTOR_INDEX, R500_GA_US_VECTOR_INDEX_TYPE_CONST);
 237     OUT_CS_ONE_REG(R500_GA_US_VECTOR_DATA, count);
 238     OUT_CS_TABLE(buf->constants, count);
 239     END_CS;
 240 }
 241
 242 void r500_emit_fs_rc_constant_state(struct r300_context* r300, unsigned size, void *state)
 243 {
 244     struct r300_fragment_shader *fs = r300_fs(r300);
 245     struct rc_constant_list *constants = &fs->shader->code.constants;
 246     unsigned i;
 247     unsigned count = fs->shader->rc_state_count;
 248     unsigned first = fs->shader->externals_count;
 249     unsigned end = constants->Count;
 250     CS_LOCALS(r300);
 251
 252     if (count == 0)
 253         return;
 254
 255     BEGIN_CS(size);
 256     for(i = first; i < end; ++i) {
 257         if (constants->Constants[i].Type == RC_CONSTANT_STATE) {
 258             const float *data =
 259                     get_rc_constant_state(r300, &constants->Constants[i]);
 260
 261             OUT_CS_REG(R500_GA_US_VECTOR_INDEX,
 262                        R500_GA_US_VECTOR_INDEX_TYPE_CONST |
 263                        (i & R500_GA_US_VECTOR_INDEX_MASK));
 264             OUT_CS_ONE_REG(R500_GA_US_VECTOR_DATA, 4);
 265             OUT_CS_TABLE(data, 4);
 266         }
 267     }
 268     END_CS;
 269 }
 270
 271 void r300_emit_gpu_flush(struct r300_context *r300, unsigned size, void *state)
 272 {
 273     struct r300_gpu_flush *gpuflush = (struct r300_gpu_flush*)state;
 274     struct pipe_framebuffer_state* fb =
 275             (struct pipe_framebuffer_state*)r300->fb_state.state;
 276     uint32_t height = fb->height;
 277     uint32_t width = fb->width;
 278     CS_LOCALS(r300);
 279
 280     if (r300->cbzb_clear) {
 281         struct r300_surface *surf = r300_surface(fb->cbufs[0]);
 282
 283         height = surf->cbzb_height;
 284         width = surf->cbzb_width;
 285     }
 286
 287     BEGIN_CS(size);
 288
 289     /* Set up scissors.
 290      * By writing to the SC registers, SC & US assert idle. */
 291     OUT_CS_REG_SEQ(R300_SC_SCISSORS_TL, 2);
 292     if (r300->screen->caps.is_r500) {
 293         OUT_CS(0);
 294         OUT_CS(((width  - 1) << R300_SCISSORS_X_SHIFT) |
 295                ((height - 1) << R300_SCISSORS_Y_SHIFT));
 296     } else {
 297         OUT_CS((1440 << R300_SCISSORS_X_SHIFT) |
 298                (1440 << R300_SCISSORS_Y_SHIFT));
 299         OUT_CS(((width  + 1440-1) << R300_SCISSORS_X_SHIFT) |
 300                ((height + 1440-1) << R300_SCISSORS_Y_SHIFT));
 301     }
 302
 303     /* Flush CB & ZB caches and wait until the 3D engine is idle and clean. */
 304     OUT_CS_TABLE(gpuflush->cb_flush_clean, 6);
 305     END_CS;
 306 }
 307
 308 void r300_emit_aa_state(struct r300_context *r300, unsigned size, void *state)
 309 {
 310     struct r300_aa_state *aa = (struct r300_aa_state*)state;
 311     CS_LOCALS(r300);
 312
 313     BEGIN_CS(size);
 314     OUT_CS_REG(R300_GB_AA_CONFIG, aa->aa_config);
 315
 316     if (aa->dest) {
 317         OUT_CS_REG_SEQ(R300_RB3D_AARESOLVE_OFFSET, 1);
 318         OUT_CS_RELOC(aa->dest->buffer, aa->dest->offset, 0, aa->dest->domain, 0);
 319
 320         OUT_CS_REG_SEQ(R300_RB3D_AARESOLVE_PITCH, 1);
 321         OUT_CS_RELOC(aa->dest->buffer, aa->dest->pitch, 0, aa->dest->domain, 0);
 322     }
 323
 324     OUT_CS_REG(R300_RB3D_AARESOLVE_CTL, aa->aaresolve_ctl);
 325     END_CS;
 326 }
 327
 328 void r300_emit_fb_state(struct r300_context* r300, unsigned size, void* state)
 329 {
 330     struct pipe_framebuffer_state* fb = (struct pipe_framebuffer_state*)state;
 331     struct r300_surface* surf;
 332     unsigned i;
 333     CS_LOCALS(r300);
 334
 335     BEGIN_CS(size);
 336
 337     /* NUM_MULTIWRITES replicates COLOR[0] to all colorbuffers, which is not
 338      * what we usually want. */
 339     if (r300->screen->caps.is_r500) {
 340         OUT_CS_REG(R300_RB3D_CCTL,
 341             R300_RB3D_CCTL_INDEPENDENT_COLORFORMAT_ENABLE_ENABLE);
 342     } else {
 343         OUT_CS_REG(R300_RB3D_CCTL, 0);
 344     }
 345
 346     /* Set up colorbuffers. */
 347     for (i = 0; i < fb->nr_cbufs; i++) {
 348         surf = r300_surface(fb->cbufs[i]);
 349
 350         OUT_CS_REG_SEQ(R300_RB3D_COLOROFFSET0 + (4 * i), 1);
 351         OUT_CS_RELOC(surf->buffer, surf->offset, 0, surf->domain, 0);
 352
 353         OUT_CS_REG_SEQ(R300_RB3D_COLORPITCH0 + (4 * i), 1);
 354         OUT_CS_RELOC(surf->buffer, surf->pitch, 0, surf->domain, 0);
 355     }
 356
 357     /* Set up the ZB part of the CBZB clear. */
 358     if (r300->cbzb_clear) {
 359         surf = r300_surface(fb->cbufs[0]);
 360
 361         OUT_CS_REG(R300_ZB_FORMAT, surf->cbzb_format);
 362
 363         OUT_CS_REG_SEQ(R300_ZB_DEPTHOFFSET, 1);
 364         OUT_CS_RELOC(surf->buffer, surf->cbzb_midpoint_offset, 0, surf->domain, 0);
 365
 366         OUT_CS_REG_SEQ(R300_ZB_DEPTHPITCH, 1);
 367         OUT_CS_RELOC(surf->buffer, surf->cbzb_pitch, 0, surf->domain, 0);
 368     }
 369     /* Set up a zbuffer. */
 370     else if (fb->zsbuf) {
 371         surf = r300_surface(fb->zsbuf);
 372
 373         OUT_CS_REG(R300_ZB_FORMAT, surf->format);
 374
 375         OUT_CS_REG_SEQ(R300_ZB_DEPTHOFFSET, 1);
 376         OUT_CS_RELOC(surf->buffer, surf->offset, 0, surf->domain, 0);
 377
 378         OUT_CS_REG_SEQ(R300_ZB_DEPTHPITCH, 1);
 379         OUT_CS_RELOC(surf->buffer, surf->pitch, 0, surf->domain, 0);
 380
 381         /* HiZ RAM. */
 382         if (r300->screen->caps.has_hiz) {
 383             OUT_CS_REG(R300_ZB_HIZ_OFFSET, 0);
 384             OUT_CS_REG(R300_ZB_HIZ_PITCH, 0);
 385         }
 386
 387         /* Z Mask RAM. (compressed zbuffer) */
 388         OUT_CS_REG(R300_ZB_ZMASK_OFFSET, 0);
 389         OUT_CS_REG(R300_ZB_ZMASK_PITCH, 0);
 390     }
 391
 392     END_CS;
 393 }
 394
 395 void r300_emit_hyperz_state(struct r300_context *r300,
 396                             unsigned size, void *state)
 397 {
 398     CS_LOCALS(r300);
 399     WRITE_CS_TABLE(state, size);
 400 }
 401
 402 void r300_emit_hyperz_end(struct r300_context *r300)
 403 {
 404     struct r300_hyperz_state z =
 405             *(struct r300_hyperz_state*)r300->hyperz_state.state;
 406
 407     z.zb_bw_cntl = 0;
 408     z.zb_depthclearvalue = 0;
 409     z.sc_hyperz = R300_SC_HYPERZ_ADJ_2;
 410
 411     r300_emit_hyperz_state(r300, r300->hyperz_state.size, &z);
 412 }
 413
 414 void r300_emit_fb_state_pipelined(struct r300_context *r300,
 415                                   unsigned size, void *state)
 416 {
 417     struct pipe_framebuffer_state* fb =
 418             (struct pipe_framebuffer_state*)r300->fb_state.state;
 419     unsigned i;
 420     CS_LOCALS(r300);
 421
 422     BEGIN_CS(size);
 423
 424     /* Colorbuffer format in the US block.
 425      * (must be written after unpipelined regs) */
 426     OUT_CS_REG_SEQ(R300_US_OUT_FMT_0, 4);
 427     for (i = 0; i < fb->nr_cbufs; i++) {
 428         OUT_CS(r300_surface(fb->cbufs[i])->format);
 429     }
 430     for (; i < 4; i++) {
 431         OUT_CS(R300_US_OUT_FMT_UNUSED);
 432     }
 433
 434     /* Multisampling. Depends on framebuffer sample count.
 435      * These are pipelined regs and as such cannot be moved
 436      * to the AA state. */
 437     if (r300->rws->get_value(r300->rws, R300_VID_DRM_2_3_0)) {
 438         unsigned mspos0 = 0x66666666;
 439         unsigned mspos1 = 0x6666666;
 440
 441         if (fb->nr_cbufs && fb->cbufs[0]->texture->nr_samples > 1) {
 442             /* Subsample placement. These may not be optimal. */
 443             switch (fb->cbufs[0]->texture->nr_samples) {
 444                 case 2:
 445                     mspos0 = 0x33996633;
 446                     mspos1 = 0x6666663;
 447                     break;
 448                 case 3:
 449                     mspos0 = 0x33936933;
 450                     mspos1 = 0x6666663;
 451                     break;
 452                 case 4:
 453                     mspos0 = 0x33939933;
 454                     mspos1 = 0x3966663;
 455                     break;
 456                 case 6:
 457                     mspos0 = 0x22a2aa22;
 458                     mspos1 = 0x2a65672;
 459                     break;
 460                 default:
 461                     debug_printf("r300: Bad number of multisamples!\n");
 462             }
 463         }
 464
 465         OUT_CS_REG_SEQ(R300_GB_MSPOS0, 2);
 466         OUT_CS(mspos0);
 467         OUT_CS(mspos1);
 468     }
 469     END_CS;
 470 }
 471
 472 void r300_emit_query_start(struct r300_context *r300, unsigned size, void*state)
 473 {
 474     struct r300_query *query = r300->query_current;
 475     CS_LOCALS(r300);
 476
 477     if (!query)
 478         return;
 479
 480     BEGIN_CS(size);
 481     if (r300->screen->caps.family == CHIP_FAMILY_RV530) {
 482         OUT_CS_REG(RV530_FG_ZBREG_DEST, RV530_FG_ZBREG_DEST_PIPE_SELECT_ALL);
 483     } else {
 484         OUT_CS_REG(R300_SU_REG_DEST, R300_RASTER_PIPE_SELECT_ALL);
 485     }
 486     OUT_CS_REG(R300_ZB_ZPASS_DATA, 0);
 487     END_CS;
 488     query->begin_emitted = TRUE;
 489     query->flushed = FALSE;
 490 }
 491
 492 static void r300_emit_query_end_frag_pipes(struct r300_context *r300,
 493                                            struct r300_query *query)
 494 {
 495     struct r300_capabilities* caps = &r300->screen->caps;
 496     struct r300_winsys_buffer *buf = r300->query_current->buffer;
 497     CS_LOCALS(r300);
 498
 499     assert(caps->num_frag_pipes);
 500
 501     BEGIN_CS(6 * caps->num_frag_pipes + 2);
 502     /* I'm not so sure I like this switch, but it's hard to be elegant
 503      * when there's so many special cases...
 504      *
 505      * So here's the basic idea. For each pipe, enable writes to it only,
 506      * then put out the relocation for ZPASS_ADDR, taking into account a
 507      * 4-byte offset for each pipe. RV380 and older are special; they have
 508      * only two pipes, and the second pipe's enable is on bit 3, not bit 1,
 509      * so there's a chipset cap for that. */
 510     switch (caps->num_frag_pipes) {
 511         case 4:
 512             /* pipe 3 only */
 513             OUT_CS_REG(R300_SU_REG_DEST, 1 << 3);
 514             OUT_CS_REG_SEQ(R300_ZB_ZPASS_ADDR, 1);
 515             OUT_CS_RELOC(buf, (query->num_results + 3) * 4,
 516                     0, query->domain, 0);
 517         case 3:
 518             /* pipe 2 only */
 519             OUT_CS_REG(R300_SU_REG_DEST, 1 << 2);
 520             OUT_CS_REG_SEQ(R300_ZB_ZPASS_ADDR, 1);
 521             OUT_CS_RELOC(buf, (query->num_results + 2) * 4,
 522                     0, query->domain, 0);
 523         case 2:
 524             /* pipe 1 only */
 525             /* As mentioned above, accomodate RV380 and older. */
 526             OUT_CS_REG(R300_SU_REG_DEST,
 527                     1 << (caps->high_second_pipe ? 3 : 1));
 528             OUT_CS_REG_SEQ(R300_ZB_ZPASS_ADDR, 1);
 529             OUT_CS_RELOC(buf, (query->num_results + 1) * 4,
 530                     0, query->domain, 0);
 531         case 1:
 532             /* pipe 0 only */
 533             OUT_CS_REG(R300_SU_REG_DEST, 1 << 0);
 534             OUT_CS_REG_SEQ(R300_ZB_ZPASS_ADDR, 1);
 535             OUT_CS_RELOC(buf, (query->num_results + 0) * 4,
 536                     0, query->domain, 0);
 537             break;
 538         default:
 539             fprintf(stderr, "r300: Implementation error: Chipset reports %d"
 540                     " pixel pipes!\n", caps->num_frag_pipes);
 541             abort();
 542     }
 543
 544     /* And, finally, reset it to normal... */
 545     OUT_CS_REG(R300_SU_REG_DEST, 0xF);
 546     END_CS;
 547 }
 548
 549 static void rv530_emit_query_end_single_z(struct r300_context *r300,
 550                                           struct r300_query *query)
 551 {
 552     struct r300_winsys_buffer *buf = r300->query_current->buffer;
 553     CS_LOCALS(r300);
 554
 555     BEGIN_CS(8);
 556     OUT_CS_REG(RV530_FG_ZBREG_DEST, RV530_FG_ZBREG_DEST_PIPE_SELECT_0);
 557     OUT_CS_REG_SEQ(R300_ZB_ZPASS_ADDR, 1);
 558     OUT_CS_RELOC(buf, query->num_results * 4, 0, query->domain, 0);
 559     OUT_CS_REG(RV530_FG_ZBREG_DEST, RV530_FG_ZBREG_DEST_PIPE_SELECT_ALL);
 560     END_CS;
 561 }
 562
 563 static void rv530_emit_query_end_double_z(struct r300_context *r300,
 564                                           struct r300_query *query)
 565 {
 566     struct r300_winsys_buffer *buf = r300->query_current->buffer;
 567     CS_LOCALS(r300);
 568
 569     BEGIN_CS(14);
 570     OUT_CS_REG(RV530_FG_ZBREG_DEST, RV530_FG_ZBREG_DEST_PIPE_SELECT_0);
 571     OUT_CS_REG_SEQ(R300_ZB_ZPASS_ADDR, 1);
 572     OUT_CS_RELOC(buf, (query->num_results + 0) * 4, 0, query->domain, 0);
 573     OUT_CS_REG(RV530_FG_ZBREG_DEST, RV530_FG_ZBREG_DEST_PIPE_SELECT_1);
 574     OUT_CS_REG_SEQ(R300_ZB_ZPASS_ADDR, 1);
 575     OUT_CS_RELOC(buf, (query->num_results + 1) * 4, 0, query->domain, 0);
 576     OUT_CS_REG(RV530_FG_ZBREG_DEST, RV530_FG_ZBREG_DEST_PIPE_SELECT_ALL);
 577     END_CS;
 578 }
 579
 580 void r300_emit_query_end(struct r300_context* r300)
 581 {
 582     struct r300_capabilities *caps = &r300->screen->caps;
 583     struct r300_query *query = r300->query_current;
 584
 585     if (!query)
 586         return;
 587
 588     if (query->begin_emitted == FALSE)
 589         return;
 590
 591     if (caps->family == CHIP_FAMILY_RV530) {
 592         if (caps->num_z_pipes == 2)
 593             rv530_emit_query_end_double_z(r300, query);
 594         else
 595             rv530_emit_query_end_single_z(r300, query);
 596     } else
 597         r300_emit_query_end_frag_pipes(r300, query);
 598
 599     query->begin_emitted = FALSE;
 600     query->num_results += query->num_pipes;
 601
 602     /* XXX grab all the results and reset the counter. */
 603     if (query->num_results >= query->buffer_size / 4 - 4) {
 604         query->num_results = (query->buffer_size / 4) / 2;
 605         fprintf(stderr, "r300: Rewinding OQBO...\n");
 606     }
 607 }
 608
 609 void r300_emit_invariant_state(struct r300_context *r300,
 610                                unsigned size, void *state)
 611 {
 612     CS_LOCALS(r300);
 613     WRITE_CS_TABLE(state, size);
 614 }
 615
 616 void r300_emit_rs_state(struct r300_context* r300, unsigned size, void* state)
 617 {
 618     struct r300_rs_state* rs = state;
 619     CS_LOCALS(r300);
 620
 621     BEGIN_CS(size);
 622     OUT_CS_TABLE(rs->cb_main, 25);
 623     if (rs->polygon_offset_enable) {
 624         if (r300->zbuffer_bpp == 16) {
 625             OUT_CS_TABLE(rs->cb_poly_offset_zb16, 5);
 626         } else {
 627             OUT_CS_TABLE(rs->cb_poly_offset_zb24, 5);
 628         }
 629     }
 630     END_CS;
 631 }
 632
 633 void r300_emit_rs_block_state(struct r300_context* r300,
 634                               unsigned size, void* state)
 635 {
 636     struct r300_rs_block* rs = (struct r300_rs_block*)state;
 637     unsigned i;
 638     /* It's the same for both INST and IP tables */
 639     unsigned count = (rs->inst_count & R300_RS_INST_COUNT_MASK) + 1;
 640     CS_LOCALS(r300);
 641
 642     if (SCREEN_DBG_ON(r300->screen, DBG_DRAW)) {
 643         r500_dump_rs_block(rs);
 644
 645         fprintf(stderr, "r300: RS emit:\n");
 646
 647         for (i = 0; i < count; i++)
 648             fprintf(stderr, "    : ip %d: 0x%08x\n", i, rs->ip[i]);
 649
 650         for (i = 0; i < count; i++)
 651             fprintf(stderr, "    : inst %d: 0x%08x\n", i, rs->inst[i]);
 652
 653         fprintf(stderr, "    : count: 0x%08x inst_count: 0x%08x\n",
 654             rs->count, rs->inst_count);
 655     }
 656
 657     BEGIN_CS(size);
 658     OUT_CS_REG_SEQ(R300_VAP_VTX_STATE_CNTL, 2);
 659     OUT_CS(rs->vap_vtx_state_cntl);
 660     OUT_CS(rs->vap_vsm_vtx_assm);
 661     OUT_CS_REG_SEQ(R300_VAP_OUTPUT_VTX_FMT_0, 2);
 662     OUT_CS(rs->vap_out_vtx_fmt[0]);
 663     OUT_CS(rs->vap_out_vtx_fmt[1]);
 664
 665     if (r300->screen->caps.is_r500) {
 666         OUT_CS_REG_SEQ(R500_RS_IP_0, count);
 667     } else {
 668         OUT_CS_REG_SEQ(R300_RS_IP_0, count);
 669     }
 670     OUT_CS_TABLE(rs->ip, count);
 671
 672     OUT_CS_REG_SEQ(R300_RS_COUNT, 2);
 673     OUT_CS(rs->count);
 674     OUT_CS(rs->inst_count);
 675
 676     if (r300->screen->caps.is_r500) {
 677         OUT_CS_REG_SEQ(R500_RS_INST_0, count);
 678     } else {
 679         OUT_CS_REG_SEQ(R300_RS_INST_0, count);
 680     }
 681     OUT_CS_TABLE(rs->inst, count);
 682     END_CS;
 683 }
 684
 685 void r300_emit_scissor_state(struct r300_context* r300,
 686                              unsigned size, void* state)
 687 {
 688     struct pipe_scissor_state* scissor = (struct pipe_scissor_state*)state;
 689     CS_LOCALS(r300);
 690
 691     BEGIN_CS(size);
 692     OUT_CS_REG_SEQ(R300_SC_CLIPRECT_TL_0, 2);
 693     if (r300->screen->caps.is_r500) {
 694         OUT_CS((scissor->minx << R300_CLIPRECT_X_SHIFT) |
 695                (scissor->miny << R300_CLIPRECT_Y_SHIFT));
 696         OUT_CS(((scissor->maxx - 1) << R300_CLIPRECT_X_SHIFT) |
 697                ((scissor->maxy - 1) << R300_CLIPRECT_Y_SHIFT));
 698     } else {
 699         OUT_CS(((scissor->minx + 1440) << R300_CLIPRECT_X_SHIFT) |
 700                ((scissor->miny + 1440) << R300_CLIPRECT_Y_SHIFT));
 701         OUT_CS(((scissor->maxx + 1440-1) << R300_CLIPRECT_X_SHIFT) |
 702                ((scissor->maxy + 1440-1) << R300_CLIPRECT_Y_SHIFT));
 703     }
 704     END_CS;
 705 }
 706
 707 void r300_emit_textures_state(struct r300_context *r300,
 708                               unsigned size, void *state)
 709 {
 710     struct r300_textures_state *allstate = (struct r300_textures_state*)state;
 711     struct r300_texture_sampler_state *texstate;
 712     struct r300_texture *tex;
 713     unsigned i;
 714     CS_LOCALS(r300);
 715
 716     BEGIN_CS(size);
 717     OUT_CS_REG(R300_TX_ENABLE, allstate->tx_enable);
 718
 719     for (i = 0; i < allstate->count; i++) {
 720         if ((1 << i) & allstate->tx_enable) {
 721             texstate = &allstate->regs[i];
 722             tex = r300_texture(allstate->sampler_views[i]->base.texture);
 723
 724             OUT_CS_REG(R300_TX_FILTER0_0 + (i * 4), texstate->filter0);
 725             OUT_CS_REG(R300_TX_FILTER1_0 + (i * 4), texstate->filter1);
 726             OUT_CS_REG(R300_TX_BORDER_COLOR_0 + (i * 4),
 727                        texstate->border_color);
 728
 729             OUT_CS_REG(R300_TX_FORMAT0_0 + (i * 4), texstate->format.format0);
 730             OUT_CS_REG(R300_TX_FORMAT1_0 + (i * 4), texstate->format.format1);
 731             OUT_CS_REG(R300_TX_FORMAT2_0 + (i * 4), texstate->format.format2);
 732
 733             OUT_CS_REG_SEQ(R300_TX_OFFSET_0 + (i * 4), 1);
 734             OUT_CS_TEX_RELOC(tex, texstate->format.tile_config, tex->domain,
 735                              0, 0);
 736         }
 737     }
 738     END_CS;
 739 }
 740
 741 void r300_emit_aos(struct r300_context* r300, int offset, boolean indexed)
 742 {
 743     struct pipe_vertex_buffer *vb1, *vb2, *vbuf = r300->vertex_buffer;
 744     struct pipe_vertex_element *velem = r300->velems->velem;
 745     struct r300_buffer *buf;
 746     int i;
 747     unsigned *hw_format_size = r300->velems->hw_format_size;
 748     unsigned size1, size2, aos_count = r300->velems->count;
 749     unsigned packet_size = (aos_count * 3 + 1) / 2;
 750     CS_LOCALS(r300);
 751
 752     BEGIN_CS(2 + packet_size + aos_count * 2);
 753     OUT_CS_PKT3(R300_PACKET3_3D_LOAD_VBPNTR, packet_size);
 754     OUT_CS(aos_count | (!indexed ? R300_VC_FORCE_PREFETCH : 0));
 755
 756     for (i = 0; i < aos_count - 1; i += 2) {
 757         vb1 = &vbuf[velem[i].vertex_buffer_index];
 758         vb2 = &vbuf[velem[i+1].vertex_buffer_index];
 759         size1 = hw_format_size[i];
 760         size2 = hw_format_size[i+1];
 761
 762         OUT_CS(R300_VBPNTR_SIZE0(size1) | R300_VBPNTR_STRIDE0(vb1->stride) |
 763                R300_VBPNTR_SIZE1(size2) | R300_VBPNTR_STRIDE1(vb2->stride));
 764         OUT_CS(vb1->buffer_offset + velem[i].src_offset   + offset * vb1->stride);
 765         OUT_CS(vb2->buffer_offset + velem[i+1].src_offset + offset * vb2->stride);
 766     }
 767
 768     if (aos_count & 1) {
 769         vb1 = &vbuf[velem[i].vertex_buffer_index];
 770         size1 = hw_format_size[i];
 771
 772         OUT_CS(R300_VBPNTR_SIZE0(size1) | R300_VBPNTR_STRIDE0(vb1->stride));
 773         OUT_CS(vb1->buffer_offset + velem[i].src_offset + offset * vb1->stride);
 774     }
 775
 776     for (i = 0; i < aos_count; i++) {
 777         buf = r300_buffer(vbuf[velem[i].vertex_buffer_index].buffer);
 778         OUT_CS_BUF_RELOC_NO_OFFSET(&buf->b.b, buf->domain, 0, 0);
 779     }
 780     END_CS;
 781 }
 782
 783 void r300_emit_aos_swtcl(struct r300_context *r300, boolean indexed)
 784 {
 785     CS_LOCALS(r300);
 786
 787     DBG(r300, DBG_DRAW, "r300: Preparing vertex buffer %p for render, "
 788             "vertex size %d\n", r300->vbo,
 789             r300->vertex_info.size);
 790     /* Set the pointer to our vertex buffer. The emitted values are this:
 791      * PACKET3 [3D_LOAD_VBPNTR]
 792      * COUNT   [1]
 793      * FORMAT  [size | stride << 8]
 794      * OFFSET  [offset into BO]
 795      * VBPNTR  [relocated BO]
 796      */
 797     BEGIN_CS(7);
 798     OUT_CS_PKT3(R300_PACKET3_3D_LOAD_VBPNTR, 3);
 799     OUT_CS(1 | (!indexed ? R300_VC_FORCE_PREFETCH : 0));
 800     OUT_CS(r300->vertex_info.size |
 801             (r300->vertex_info.size << 8));
 802     OUT_CS(r300->vbo_offset);
 803     OUT_CS_BUF_RELOC(r300->vbo, 0, r300_buffer(r300->vbo)->domain, 0, 0);
 804     END_CS;
 805 }
 806
 807 void r300_emit_vertex_stream_state(struct r300_context* r300,
 808                                    unsigned size, void* state)
 809 {
 810     struct r300_vertex_stream_state *streams =
 811         (struct r300_vertex_stream_state*)state;
 812     unsigned i;
 813     CS_LOCALS(r300);
 814
 815     if (DBG_ON(r300, DBG_DRAW)) {
 816         fprintf(stderr, "r300: PSC emit:\n");
 817
 818         for (i = 0; i < streams->count; i++) {
 819             fprintf(stderr, "    : prog_stream_cntl%d: 0x%08x\n", i,
 820                    streams->vap_prog_stream_cntl[i]);
 821         }
 822
 823         for (i = 0; i < streams->count; i++) {
 824             fprintf(stderr, "    : prog_stream_cntl_ext%d: 0x%08x\n", i,
 825                    streams->vap_prog_stream_cntl_ext[i]);
 826         }
 827     }
 828
 829     BEGIN_CS(size);
 830     OUT_CS_REG_SEQ(R300_VAP_PROG_STREAM_CNTL_0, streams->count);
 831     OUT_CS_TABLE(streams->vap_prog_stream_cntl, streams->count);
 832     OUT_CS_REG_SEQ(R300_VAP_PROG_STREAM_CNTL_EXT_0, streams->count);
 833     OUT_CS_TABLE(streams->vap_prog_stream_cntl_ext, streams->count);
 834     END_CS;
 835 }
 836
 837 void r300_emit_pvs_flush(struct r300_context* r300, unsigned size, void* state)
 838 {
 839     CS_LOCALS(r300);
 840
 841     BEGIN_CS(size);
 842     OUT_CS_REG(R300_VAP_PVS_STATE_FLUSH_REG, 0x0);
 843     END_CS;
 844 }
 845
 846 void r300_emit_vap_invariant_state(struct r300_context *r300,
 847                                    unsigned size, void *state)
 848 {
 849     CS_LOCALS(r300);
 850     WRITE_CS_TABLE(state, size);
 851 }
 852
 853 void r300_emit_vs_state(struct r300_context* r300, unsigned size, void* state)
 854 {
 855     struct r300_vertex_shader* vs = (struct r300_vertex_shader*)state;
 856     struct r300_vertex_program_code* code = &vs->code;
 857     struct r300_screen* r300screen = r300->screen;
 858     unsigned instruction_count = code->length / 4;
 859     unsigned i;
 860
 861     unsigned vtx_mem_size = r300screen->caps.is_r500 ? 128 : 72;
 862     unsigned input_count = MAX2(util_bitcount(code->InputsRead), 1);
 863     unsigned output_count = MAX2(util_bitcount(code->OutputsWritten), 1);
 864     unsigned temp_count = MAX2(code->num_temporaries, 1);
 865
 866     unsigned pvs_num_slots = MIN3(vtx_mem_size / input_count,
 867                                   vtx_mem_size / output_count, 10);
 868     unsigned pvs_num_controllers = MIN2(vtx_mem_size / temp_count, 6);
 869
 870     unsigned imm_first = vs->externals_count;
 871     unsigned imm_end = vs->code.constants.Count;
 872     unsigned imm_count = vs->immediates_count;
 873
 874     CS_LOCALS(r300);
 875
 876     BEGIN_CS(size);
 877
 878     /* R300_VAP_PVS_CODE_CNTL_0
 879      * R300_VAP_PVS_CONST_CNTL
 880      * R300_VAP_PVS_CODE_CNTL_1
 881      * See the r5xx docs for instructions on how to use these. */
 882     OUT_CS_REG_SEQ(R300_VAP_PVS_CODE_CNTL_0, 3);
 883     OUT_CS(R300_PVS_FIRST_INST(0) |
 884             R300_PVS_XYZW_VALID_INST(instruction_count - 1) |
 885             R300_PVS_LAST_INST(instruction_count - 1));
 886     OUT_CS(R300_PVS_MAX_CONST_ADDR(code->constants.Count - 1));
 887     OUT_CS(instruction_count - 1);
 888
 889     OUT_CS_REG(R300_VAP_PVS_VECTOR_INDX_REG, 0);
 890     OUT_CS_ONE_REG(R300_VAP_PVS_UPLOAD_DATA, code->length);
 891     OUT_CS_TABLE(code->body.d, code->length);
 892
 893     OUT_CS_REG(R300_VAP_CNTL, R300_PVS_NUM_SLOTS(pvs_num_slots) |
 894             R300_PVS_NUM_CNTLRS(pvs_num_controllers) |
 895             R300_PVS_NUM_FPUS(r300screen->caps.num_vert_fpus) |
 896             R300_PVS_VF_MAX_VTX_NUM(12) |
 897             (r300screen->caps.is_r500 ? R500_TCL_STATE_OPTIMIZATION : 0));
 898
 899     /* Emit immediates. */
 900     if (imm_count) {
 901         OUT_CS_REG(R300_VAP_PVS_VECTOR_INDX_REG,
 902                    (r300->screen->caps.is_r500 ?
 903                    R500_PVS_CONST_START : R300_PVS_CONST_START) +
 904                    imm_first);
 905         OUT_CS_ONE_REG(R300_VAP_PVS_UPLOAD_DATA, imm_count * 4);
 906         for (i = imm_first; i < imm_end; i++) {
 907             const float *data = vs->code.constants.Constants[i].u.Immediate;
 908             OUT_CS_TABLE(data, 4);
 909         }
 910     }
 911     END_CS;
 912 }
 913
 914 void r300_emit_vs_constants(struct r300_context* r300,
 915                             unsigned size, void *state)
 916 {
 917     unsigned count =
 918         ((struct r300_vertex_shader*)r300->vs_state.state)->externals_count;
 919     struct r300_constant_buffer *buf = (struct r300_constant_buffer*)state;
 920     CS_LOCALS(r300);
 921
 922     if (!count)
 923         return;
 924
 925     BEGIN_CS(size);
 926     OUT_CS_REG(R300_VAP_PVS_VECTOR_INDX_REG,
 927                (r300->screen->caps.is_r500 ?
 928                R500_PVS_CONST_START : R300_PVS_CONST_START));
 929     OUT_CS_ONE_REG(R300_VAP_PVS_UPLOAD_DATA, count * 4);
 930     OUT_CS_TABLE(buf->constants, count * 4);
 931     END_CS;
 932 }
 933
 934 void r300_emit_viewport_state(struct r300_context* r300,
 935                               unsigned size, void* state)
 936 {
 937     struct r300_viewport_state* viewport = (struct r300_viewport_state*)state;
 938     CS_LOCALS(r300);
 939
 940     BEGIN_CS(size);
 941     OUT_CS_REG_SEQ(R300_SE_VPORT_XSCALE, 6);
 942     OUT_CS_TABLE(&viewport->xscale, 6);
 943     OUT_CS_REG(R300_VAP_VTE_CNTL, viewport->vte_control);
 944     END_CS;
 945 }
 946
 947 void r300_emit_ztop_state(struct r300_context* r300,
 948                           unsigned size, void* state)
 949 {
 950     struct r300_ztop_state* ztop = (struct r300_ztop_state*)state;
 951     CS_LOCALS(r300);
 952
 953     BEGIN_CS(size);
 954     OUT_CS_REG(R300_ZB_ZTOP, ztop->z_buffer_top);
 955     END_CS;
 956 }
 957
 958 void r300_emit_texture_cache_inval(struct r300_context* r300, unsigned size, void* state)
 959 {
 960     CS_LOCALS(r300);
 961
 962     BEGIN_CS(size);
 963     OUT_CS_REG(R300_TX_INVALTAGS, 0);
 964     END_CS;
 965 }
 966
 967 void r300_emit_buffer_validate(struct r300_context *r300,
 968                                boolean do_validate_vertex_buffers,
 969                                struct pipe_resource *index_buffer)
 970 {
 971     struct pipe_framebuffer_state* fb =
 972         (struct pipe_framebuffer_state*)r300->fb_state.state;
 973     struct r300_textures_state *texstate =
 974         (struct r300_textures_state*)r300->textures_state.state;
 975     struct r300_texture* tex;
 976     struct pipe_vertex_buffer *vbuf = r300->vertex_buffer;
 977     struct pipe_vertex_element *velem = r300->velems->velem;
 978     struct pipe_resource *pbuf;
 979     unsigned i;
 980     boolean invalid = FALSE;
 981
 982     /* upload buffers first */
 983     if (r300->screen->caps.has_tcl && r300->any_user_vbs) {
 984         r300_upload_user_buffers(r300);
 985         r300->any_user_vbs = false;
 986     }
 987
 988     /* Clean out BOs. */
 989     r300->rws->reset_bos(r300->rws);
 990
 991 validate:
 992     /* Color buffers... */
 993     for (i = 0; i < fb->nr_cbufs; i++) {
 994         tex = r300_texture(fb->cbufs[i]->texture);
 995         assert(tex && tex->buffer && "cbuf is marked, but NULL!");
 996         if (!r300_add_texture(r300->rws, tex, 0,
 997                               r300_surface(fb->cbufs[i])->domain)) {
 998             r300->context.flush(&r300->context, 0, NULL);
 999             goto validate;
1000         }
1001     }
1002     /* ...depth buffer... */
1003     if (fb->zsbuf) {
1004         tex = r300_texture(fb->zsbuf->texture);
1005         assert(tex && tex->buffer && "zsbuf is marked, but NULL!");
1006         if (!r300_add_texture(r300->rws, tex, 0,
1007                               r300_surface(fb->zsbuf)->domain)) {
1008             r300->context.flush(&r300->context, 0, NULL);
1009             goto validate;
1010         }
1011     }
1012     /* ...textures... */
1013     for (i = 0; i < texstate->count; i++) {
1014         if (!(texstate->tx_enable & (1 << i))) {
1015             continue;
1016         }
1017
1018         tex = r300_texture(texstate->sampler_views[i]->base.texture);
1019         if (!r300_add_texture(r300->rws, tex, tex->domain, 0)) {
1020             r300->context.flush(&r300->context, 0, NULL);
1021             goto validate;
1022         }
1023     }
1024     /* ...occlusion query buffer... */
1025     if (r300->query_current) {
1026         if (!r300->rws->add_buffer(r300->rws, r300->query_current->buffer,
1027                                    0, r300->query_current->domain)) {
1028             r300->context.flush(&r300->context, 0, NULL);
1029             goto validate;
1030         }
1031     }
1032     /* ...vertex buffer for SWTCL path... */
1033     if (r300->vbo) {
1034         if (!r300_add_buffer(r300->rws, r300->vbo,
1035                              r300_buffer(r300->vbo)->domain, 0)) {
1036             r300->context.flush(&r300->context, 0, NULL);
1037             goto validate;
1038         }
1039     }
1040     /* ...vertex buffers for HWTCL path... */
1041     if (do_validate_vertex_buffers) {
1042         for (i = 0; i < r300->velems->count; i++) {
1043             pbuf = vbuf[velem[i].vertex_buffer_index].buffer;
1044
1045             if (!r300_add_buffer(r300->rws, pbuf,
1046                                  r300_buffer(pbuf)->domain, 0)) {
1047                 r300->context.flush(&r300->context, 0, NULL);
1048                 goto validate;
1049             }
1050         }
1051     }
1052     /* ...and index buffer for HWTCL path. */
1053     if (index_buffer) {
1054         if (!r300_add_buffer(r300->rws, index_buffer,
1055                              r300_buffer(index_buffer)->domain, 0)) {
1056             r300->context.flush(&r300->context, 0, NULL);
1057             goto validate;
1058         }
1059     }
1060     if (!r300->rws->validate(r300->rws)) {
1061         r300->context.flush(&r300->context, 0, NULL);
1062         if (invalid) {
1063             /* Well, hell. */
1064             fprintf(stderr, "r300: Stuck in validation loop, gonna quit now.\n");
1065             abort();
1066         }
1067         invalid = TRUE;
1068         goto validate;
1069     }
1070 }
1071
1072 unsigned r300_get_num_dirty_dwords(struct r300_context *r300)
1073 {
1074     struct r300_atom* atom;
1075     unsigned dwords = 0;
1076
1077     foreach(atom, &r300->atom_list) {
1078         if (atom->dirty) {
1079             dwords += atom->size;
1080         }
1081     }
1082
1083     /* let's reserve some more, just in case */
1084     dwords += 32;
1085
1086     return dwords;
1087 }
1088
1089 /* Emit all dirty state. */
1090 void r300_emit_dirty_state(struct r300_context* r300)
1091 {
1092     struct r300_atom* atom;
1093
1094     foreach(atom, &r300->atom_list) {
1095         if (atom->dirty) {
1096             atom->emit(r300, atom->size, atom->state);
1097             if (SCREEN_DBG_ON(r300->screen, DBG_STATS)) {
1098                 atom->counter++;
1099             }
1100             atom->dirty = FALSE;
1101         }
1102     }
1103
1104     r300->dirty_hw++;
1105 }