src/gallium/drivers/r300/r300_emit.c

   1 /*
   2  * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
   3  * Copyright 2009 Marek Olšák <maraeo@gmail.com>
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * on the rights to use, copy, modify, merge, publish, distribute, sub
   9  * license, and/or sell copies of the Software, and to permit persons to whom
  10  * the Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  20  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  21  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  22  * USE OR OTHER DEALINGS IN THE SOFTWARE. */
  23
  24 /* r300_emit: Functions for emitting state. */
  25
  26 #include "util/u_format.h"
  27 #include "util/u_math.h"
  28 #include "util/u_mm.h"
  29 #include "util/u_simple_list.h"
  30
  31 #include "r300_context.h"
  32 #include "r300_cs.h"
  33 #include "r300_emit.h"
  34 #include "r300_fs.h"
  35 #include "r300_screen.h"
  36 #include "r300_screen_buffer.h"
  37 #include "r300_vs.h"
  38
  39 void r300_emit_blend_state(struct r300_context* r300,
  40                            unsigned size, void* state)
  41 {
  42     struct r300_blend_state* blend = (struct r300_blend_state*)state;
  43     struct pipe_framebuffer_state* fb =
  44         (struct pipe_framebuffer_state*)r300->fb_state.state;
  45     CS_LOCALS(r300);
  46
  47     if (fb->nr_cbufs) {
  48         WRITE_CS_TABLE(blend->cb, size);
  49     } else {
  50         WRITE_CS_TABLE(blend->cb_no_readwrite, size);
  51     }
  52 }
  53
  54 void r300_emit_blend_color_state(struct r300_context* r300,
  55                                  unsigned size, void* state)
  56 {
  57     struct r300_blend_color_state* bc = (struct r300_blend_color_state*)state;
  58     CS_LOCALS(r300);
  59
  60     WRITE_CS_TABLE(bc->cb, size);
  61 }
  62
  63 void r300_emit_clip_state(struct r300_context* r300,
  64                           unsigned size, void* state)
  65 {
  66     struct r300_clip_state* clip = (struct r300_clip_state*)state;
  67     CS_LOCALS(r300);
  68
  69     WRITE_CS_TABLE(clip->cb, size);
  70 }
  71
  72 void r300_emit_dsa_state(struct r300_context* r300, unsigned size, void* state)
  73 {
  74     struct r300_dsa_state* dsa = (struct r300_dsa_state*)state;
  75     struct pipe_framebuffer_state* fb =
  76         (struct pipe_framebuffer_state*)r300->fb_state.state;
  77     CS_LOCALS(r300);
  78
  79     if (fb->zsbuf) {
  80         WRITE_CS_TABLE(&dsa->cb_begin, size);
  81     } else {
  82         WRITE_CS_TABLE(dsa->cb_no_readwrite, size);
  83     }
  84 }
  85
  86 static const float * get_rc_constant_state(
  87     struct r300_context * r300,
  88     struct rc_constant * constant)
  89 {
  90     struct r300_textures_state* texstate = r300->textures_state.state;
  91     static float vec[4] = { 0.0, 0.0, 0.0, 1.0 };
  92     struct pipe_resource *tex;
  93
  94     assert(constant->Type == RC_CONSTANT_STATE);
  95
  96     switch (constant->u.State[0]) {
  97         /* Factor for converting rectangle coords to
  98          * normalized coords. Should only show up on non-r500. */
  99         case RC_STATE_R300_TEXRECT_FACTOR:
 100             tex = texstate->sampler_views[constant->u.State[1]]->base.texture;
 101             vec[0] = 1.0 / tex->width0;
 102             vec[1] = 1.0 / tex->height0;
 103             break;
 104
 105         case RC_STATE_R300_VIEWPORT_SCALE:
 106             vec[0] = r300->viewport.scale[0];
 107             vec[1] = r300->viewport.scale[1];
 108             vec[2] = r300->viewport.scale[2];
 109             break;
 110
 111         case RC_STATE_R300_VIEWPORT_OFFSET:
 112             vec[0] = r300->viewport.translate[0];
 113             vec[1] = r300->viewport.translate[1];
 114             vec[2] = r300->viewport.translate[2];
 115             break;
 116
 117         default:
 118             fprintf(stderr, "r300: Implementation error: "
 119                 "Unknown RC_CONSTANT type %d\n", constant->u.State[0]);
 120     }
 121
 122     /* This should either be (0, 0, 0, 1), which should be a relatively safe
 123      * RGBA or STRQ value, or it could be one of the RC_CONSTANT_STATE
 124      * state factors. */
 125     return vec;
 126 }
 127
 128 /* Convert a normal single-precision float into the 7.16 format
 129  * used by the R300 fragment shader.
 130  */
 131 uint32_t pack_float24(float f)
 132 {
 133     union {
 134         float fl;
 135         uint32_t u;
 136     } u;
 137     float mantissa;
 138     int exponent;
 139     uint32_t float24 = 0;
 140
 141     if (f == 0.0)
 142         return 0;
 143
 144     u.fl = f;
 145
 146     mantissa = frexpf(f, &exponent);
 147
 148     /* Handle -ve */
 149     if (mantissa < 0) {
 150         float24 |= (1 << 23);
 151         mantissa = mantissa * -1.0;
 152     }
 153     /* Handle exponent, bias of 63 */
 154     exponent += 62;
 155     float24 |= (exponent << 16);
 156     /* Kill 7 LSB of mantissa */
 157     float24 |= (u.u & 0x7FFFFF) >> 7;
 158
 159     return float24;
 160 }
 161
 162 void r300_emit_fs(struct r300_context* r300, unsigned size, void *state)
 163 {
 164     struct r300_fragment_shader *fs = r300_fs(r300);
 165     CS_LOCALS(r300);
 166
 167     WRITE_CS_TABLE(fs->shader->cb_code, fs->shader->cb_code_size);
 168 }
 169
 170 void r300_emit_fs_constants(struct r300_context* r300, unsigned size, void *state)
 171 {
 172     struct r300_fragment_shader *fs = r300_fs(r300);
 173     struct r300_constant_buffer *buf = (struct r300_constant_buffer*)state;
 174     unsigned count = fs->shader->externals_count;
 175     unsigned i, j;
 176     CS_LOCALS(r300);
 177
 178     if (count == 0)
 179         return;
 180
 181     BEGIN_CS(size);
 182     OUT_CS_REG_SEQ(R300_PFS_PARAM_0_X, count * 4);
 183     for (i = 0; i < count; i++)
 184         for (j = 0; j < 4; j++)
 185             OUT_CS(pack_float24(*(float*)&buf->ptr[i*4+j]));
 186     END_CS;
 187 }
 188
 189 void r300_emit_fs_rc_constant_state(struct r300_context* r300, unsigned size, void *state)
 190 {
 191     struct r300_fragment_shader *fs = r300_fs(r300);
 192     struct rc_constant_list *constants = &fs->shader->code.constants;
 193     unsigned i;
 194     unsigned count = fs->shader->rc_state_count;
 195     unsigned first = fs->shader->externals_count;
 196     unsigned end = constants->Count;
 197     unsigned j;
 198     CS_LOCALS(r300);
 199
 200     if (count == 0)
 201         return;
 202
 203     BEGIN_CS(size);
 204     for(i = first; i < end; ++i) {
 205         if (constants->Constants[i].Type == RC_CONSTANT_STATE) {
 206             const float *data =
 207                     get_rc_constant_state(r300, &constants->Constants[i]);
 208
 209             OUT_CS_REG_SEQ(R300_PFS_PARAM_0_X + i * 16, 4);
 210             for (j = 0; j < 4; j++)
 211                 OUT_CS(pack_float24(data[j]));
 212         }
 213     }
 214     END_CS;
 215 }
 216
 217 void r500_emit_fs(struct r300_context* r300, unsigned size, void *state)
 218 {
 219     struct r300_fragment_shader *fs = r300_fs(r300);
 220     CS_LOCALS(r300);
 221
 222     WRITE_CS_TABLE(fs->shader->cb_code, fs->shader->cb_code_size);
 223 }
 224
 225 void r500_emit_fs_constants(struct r300_context* r300, unsigned size, void *state)
 226 {
 227     struct r300_fragment_shader *fs = r300_fs(r300);
 228     struct r300_constant_buffer *buf = (struct r300_constant_buffer*)state;
 229     unsigned count = fs->shader->externals_count * 4;
 230     CS_LOCALS(r300);
 231
 232     if (count == 0)
 233         return;
 234
 235     BEGIN_CS(size);
 236     OUT_CS_REG(R500_GA_US_VECTOR_INDEX, R500_GA_US_VECTOR_INDEX_TYPE_CONST);
 237     OUT_CS_ONE_REG(R500_GA_US_VECTOR_DATA, count);
 238     OUT_CS_TABLE(buf->ptr, count);
 239     END_CS;
 240 }
 241
 242 void r500_emit_fs_rc_constant_state(struct r300_context* r300, unsigned size, void *state)
 243 {
 244     struct r300_fragment_shader *fs = r300_fs(r300);
 245     struct rc_constant_list *constants = &fs->shader->code.constants;
 246     unsigned i;
 247     unsigned count = fs->shader->rc_state_count;
 248     unsigned first = fs->shader->externals_count;
 249     unsigned end = constants->Count;
 250     CS_LOCALS(r300);
 251
 252     if (count == 0)
 253         return;
 254
 255     BEGIN_CS(size);
 256     for(i = first; i < end; ++i) {
 257         if (constants->Constants[i].Type == RC_CONSTANT_STATE) {
 258             const float *data =
 259                     get_rc_constant_state(r300, &constants->Constants[i]);
 260
 261             OUT_CS_REG(R500_GA_US_VECTOR_INDEX,
 262                        R500_GA_US_VECTOR_INDEX_TYPE_CONST |
 263                        (i & R500_GA_US_VECTOR_INDEX_MASK));
 264             OUT_CS_ONE_REG(R500_GA_US_VECTOR_DATA, 4);
 265             OUT_CS_TABLE(data, 4);
 266         }
 267     }
 268     END_CS;
 269 }
 270
 271 void r300_emit_gpu_flush(struct r300_context *r300, unsigned size, void *state)
 272 {
 273     struct r300_gpu_flush *gpuflush = (struct r300_gpu_flush*)state;
 274     struct pipe_framebuffer_state* fb =
 275             (struct pipe_framebuffer_state*)r300->fb_state.state;
 276     uint32_t height = fb->height;
 277     uint32_t width = fb->width;
 278     CS_LOCALS(r300);
 279
 280     if (r300->cbzb_clear) {
 281         struct r300_surface *surf = r300_surface(fb->cbufs[0]);
 282
 283         height = surf->cbzb_height;
 284         width = surf->cbzb_width;
 285     }
 286
 287     BEGIN_CS(size);
 288
 289     /* Set up scissors.
 290      * By writing to the SC registers, SC & US assert idle. */
 291     OUT_CS_REG_SEQ(R300_SC_SCISSORS_TL, 2);
 292     if (r300->screen->caps.is_r500) {
 293         OUT_CS(0);
 294         OUT_CS(((width  - 1) << R300_SCISSORS_X_SHIFT) |
 295                ((height - 1) << R300_SCISSORS_Y_SHIFT));
 296     } else {
 297         OUT_CS((1440 << R300_SCISSORS_X_SHIFT) |
 298                (1440 << R300_SCISSORS_Y_SHIFT));
 299         OUT_CS(((width  + 1440-1) << R300_SCISSORS_X_SHIFT) |
 300                ((height + 1440-1) << R300_SCISSORS_Y_SHIFT));
 301     }
 302
 303     /* Flush CB & ZB caches and wait until the 3D engine is idle and clean. */
 304     OUT_CS_TABLE(gpuflush->cb_flush_clean, 6);
 305     END_CS;
 306 }
 307
 308 void r300_emit_aa_state(struct r300_context *r300, unsigned size, void *state)
 309 {
 310     struct r300_aa_state *aa = (struct r300_aa_state*)state;
 311     CS_LOCALS(r300);
 312
 313     BEGIN_CS(size);
 314     OUT_CS_REG(R300_GB_AA_CONFIG, aa->aa_config);
 315
 316     if (aa->dest) {
 317         OUT_CS_REG_SEQ(R300_RB3D_AARESOLVE_OFFSET, 1);
 318         OUT_CS_RELOC(aa->dest->buffer, aa->dest->offset, 0, aa->dest->domain);
 319
 320         OUT_CS_REG_SEQ(R300_RB3D_AARESOLVE_PITCH, 1);
 321         OUT_CS_RELOC(aa->dest->buffer, aa->dest->pitch, 0, aa->dest->domain);
 322     }
 323
 324     OUT_CS_REG(R300_RB3D_AARESOLVE_CTL, aa->aaresolve_ctl);
 325     END_CS;
 326 }
 327
 328 void r300_emit_fb_state(struct r300_context* r300, unsigned size, void* state)
 329 {
 330     struct pipe_framebuffer_state* fb = (struct pipe_framebuffer_state*)state;
 331     struct r300_surface* surf;
 332     unsigned i;
 333     boolean has_hyperz = r300->rws->get_value(r300->rws, R300_CAN_HYPERZ);
 334     CS_LOCALS(r300);
 335
 336     BEGIN_CS(size);
 337
 338     /* NUM_MULTIWRITES replicates COLOR[0] to all colorbuffers, which is not
 339      * what we usually want. */
 340     if (r300->screen->caps.is_r500) {
 341         OUT_CS_REG(R300_RB3D_CCTL,
 342             R300_RB3D_CCTL_INDEPENDENT_COLORFORMAT_ENABLE_ENABLE);
 343     } else {
 344         OUT_CS_REG(R300_RB3D_CCTL, 0);
 345     }
 346
 347     /* Set up colorbuffers. */
 348     for (i = 0; i < fb->nr_cbufs; i++) {
 349         surf = r300_surface(fb->cbufs[i]);
 350
 351         OUT_CS_REG_SEQ(R300_RB3D_COLOROFFSET0 + (4 * i), 1);
 352         OUT_CS_RELOC(surf->buffer, surf->offset, 0, surf->domain);
 353
 354         OUT_CS_REG_SEQ(R300_RB3D_COLORPITCH0 + (4 * i), 1);
 355         OUT_CS_RELOC(surf->buffer, surf->pitch, 0, surf->domain);
 356     }
 357
 358     /* Set up the ZB part of the CBZB clear. */
 359     if (r300->cbzb_clear) {
 360         surf = r300_surface(fb->cbufs[0]);
 361
 362         OUT_CS_REG(R300_ZB_FORMAT, surf->cbzb_format);
 363
 364         OUT_CS_REG_SEQ(R300_ZB_DEPTHOFFSET, 1);
 365         OUT_CS_RELOC(surf->buffer, surf->cbzb_midpoint_offset, 0, surf->domain);
 366
 367         OUT_CS_REG_SEQ(R300_ZB_DEPTHPITCH, 1);
 368         OUT_CS_RELOC(surf->buffer, surf->cbzb_pitch, 0, surf->domain);
 369
 370         DBG(r300, DBG_CBZB,
 371             "CBZB clearing cbuf %08x %08x\n", surf->cbzb_format,
 372             surf->cbzb_pitch);
 373     }
 374     /* Set up a zbuffer. */
 375     else if (fb->zsbuf) {
 376         surf = r300_surface(fb->zsbuf);
 377
 378         OUT_CS_REG(R300_ZB_FORMAT, surf->format);
 379
 380         OUT_CS_REG_SEQ(R300_ZB_DEPTHOFFSET, 1);
 381         OUT_CS_RELOC(surf->buffer, surf->offset, 0, surf->domain);
 382
 383         OUT_CS_REG_SEQ(R300_ZB_DEPTHPITCH, 1);
 384         OUT_CS_RELOC(surf->buffer, surf->pitch, 0, surf->domain);
 385
 386         if (has_hyperz) {
 387             uint32_t surf_pitch;
 388             struct r300_texture *tex;
 389             int level = surf->base.level;
 390             tex = r300_texture(surf->base.texture);
 391
 392             surf_pitch = surf->pitch & R300_DEPTHPITCH_MASK;
 393             /* HiZ RAM. */
 394             if (r300->screen->caps.hiz_ram) {
 395                 if (tex->hiz_mem[level]) {
 396                     OUT_CS_REG(R300_ZB_HIZ_OFFSET, tex->hiz_mem[level]->ofs);
 397                     OUT_CS_REG(R300_ZB_HIZ_PITCH, surf_pitch);
 398                 } else {
 399                     OUT_CS_REG(R300_ZB_HIZ_OFFSET, 0);
 400                     OUT_CS_REG(R300_ZB_HIZ_PITCH, 0);
 401                 }
 402             }
 403             /* Z Mask RAM. (compressed zbuffer) */
 404             if (tex->zmask_mem[level]) {
 405                 OUT_CS_REG(R300_ZB_ZMASK_OFFSET, tex->zmask_mem[level]->ofs);
 406                 OUT_CS_REG(R300_ZB_ZMASK_PITCH, surf_pitch);
 407             } else {
 408                 OUT_CS_REG(R300_ZB_ZMASK_OFFSET, 0);
 409                 OUT_CS_REG(R300_ZB_ZMASK_PITCH, 0);
 410             }
 411         }
 412     }
 413
 414     END_CS;
 415 }
 416
 417 void r300_emit_hyperz_state(struct r300_context *r300,
 418                             unsigned size, void *state)
 419 {
 420     struct r300_hyperz_state *z = state;
 421     CS_LOCALS(r300);
 422     if (z->flush)
 423         WRITE_CS_TABLE(&z->cb_flush_begin, size);
 424     else
 425         WRITE_CS_TABLE(&z->cb_begin, size - 2);
 426 }
 427
 428 void r300_emit_hyperz_end(struct r300_context *r300)
 429 {
 430     struct r300_hyperz_state z =
 431             *(struct r300_hyperz_state*)r300->hyperz_state.state;
 432
 433     z.flush = 1;
 434     z.zb_bw_cntl = 0;
 435     z.zb_depthclearvalue = 0;
 436     z.sc_hyperz = R300_SC_HYPERZ_ADJ_2;
 437     z.gb_z_peq_config = 0;
 438
 439     r300_emit_hyperz_state(r300, r300->hyperz_state.size, &z);
 440 }
 441
 442 void r300_emit_fb_state_pipelined(struct r300_context *r300,
 443                                   unsigned size, void *state)
 444 {
 445     struct pipe_framebuffer_state* fb =
 446             (struct pipe_framebuffer_state*)r300->fb_state.state;
 447     unsigned i;
 448     CS_LOCALS(r300);
 449
 450     BEGIN_CS(size);
 451
 452     /* Colorbuffer format in the US block.
 453      * (must be written after unpipelined regs) */
 454     OUT_CS_REG_SEQ(R300_US_OUT_FMT_0, 4);
 455     for (i = 0; i < fb->nr_cbufs; i++) {
 456         OUT_CS(r300_surface(fb->cbufs[i])->format);
 457     }
 458     for (; i < 4; i++) {
 459         OUT_CS(R300_US_OUT_FMT_UNUSED);
 460     }
 461
 462     /* Multisampling. Depends on framebuffer sample count.
 463      * These are pipelined regs and as such cannot be moved
 464      * to the AA state. */
 465     if (r300->rws->get_value(r300->rws, R300_VID_DRM_2_3_0)) {
 466         unsigned mspos0 = 0x66666666;
 467         unsigned mspos1 = 0x6666666;
 468
 469         if (fb->nr_cbufs && fb->cbufs[0]->texture->nr_samples > 1) {
 470             /* Subsample placement. These may not be optimal. */
 471             switch (fb->cbufs[0]->texture->nr_samples) {
 472                 case 2:
 473                     mspos0 = 0x33996633;
 474                     mspos1 = 0x6666663;
 475                     break;
 476                 case 3:
 477                     mspos0 = 0x33936933;
 478                     mspos1 = 0x6666663;
 479                     break;
 480                 case 4:
 481                     mspos0 = 0x33939933;
 482                     mspos1 = 0x3966663;
 483                     break;
 484                 case 6:
 485                     mspos0 = 0x22a2aa22;
 486                     mspos1 = 0x2a65672;
 487                     break;
 488                 default:
 489                     debug_printf("r300: Bad number of multisamples!\n");
 490             }
 491         }
 492
 493         OUT_CS_REG_SEQ(R300_GB_MSPOS0, 2);
 494         OUT_CS(mspos0);
 495         OUT_CS(mspos1);
 496     }
 497     END_CS;
 498 }
 499
 500 void r300_emit_query_start(struct r300_context *r300, unsigned size, void*state)
 501 {
 502     struct r300_query *query = r300->query_current;
 503     CS_LOCALS(r300);
 504
 505     if (!query)
 506         return;
 507
 508     BEGIN_CS(size);
 509     if (r300->screen->caps.family == CHIP_FAMILY_RV530) {
 510         OUT_CS_REG(RV530_FG_ZBREG_DEST, RV530_FG_ZBREG_DEST_PIPE_SELECT_ALL);
 511     } else {
 512         OUT_CS_REG(R300_SU_REG_DEST, R300_RASTER_PIPE_SELECT_ALL);
 513     }
 514     OUT_CS_REG(R300_ZB_ZPASS_DATA, 0);
 515     END_CS;
 516     query->begin_emitted = TRUE;
 517     query->flushed = FALSE;
 518 }
 519
 520 static void r300_emit_query_end_frag_pipes(struct r300_context *r300,
 521                                            struct r300_query *query)
 522 {
 523     struct r300_capabilities* caps = &r300->screen->caps;
 524     struct r300_winsys_buffer *buf = r300->query_current->buffer;
 525     CS_LOCALS(r300);
 526
 527     assert(caps->num_frag_pipes);
 528
 529     BEGIN_CS(6 * caps->num_frag_pipes + 2);
 530     /* I'm not so sure I like this switch, but it's hard to be elegant
 531      * when there's so many special cases...
 532      *
 533      * So here's the basic idea. For each pipe, enable writes to it only,
 534      * then put out the relocation for ZPASS_ADDR, taking into account a
 535      * 4-byte offset for each pipe. RV380 and older are special; they have
 536      * only two pipes, and the second pipe's enable is on bit 3, not bit 1,
 537      * so there's a chipset cap for that. */
 538     switch (caps->num_frag_pipes) {
 539         case 4:
 540             /* pipe 3 only */
 541             OUT_CS_REG(R300_SU_REG_DEST, 1 << 3);
 542             OUT_CS_REG_SEQ(R300_ZB_ZPASS_ADDR, 1);
 543             OUT_CS_RELOC(buf, (query->num_results + 3) * 4,
 544                     0, query->domain);
 545         case 3:
 546             /* pipe 2 only */
 547             OUT_CS_REG(R300_SU_REG_DEST, 1 << 2);
 548             OUT_CS_REG_SEQ(R300_ZB_ZPASS_ADDR, 1);
 549             OUT_CS_RELOC(buf, (query->num_results + 2) * 4,
 550                     0, query->domain);
 551         case 2:
 552             /* pipe 1 only */
 553             /* As mentioned above, accomodate RV380 and older. */
 554             OUT_CS_REG(R300_SU_REG_DEST,
 555                     1 << (caps->high_second_pipe ? 3 : 1));
 556             OUT_CS_REG_SEQ(R300_ZB_ZPASS_ADDR, 1);
 557             OUT_CS_RELOC(buf, (query->num_results + 1) * 4,
 558                     0, query->domain);
 559         case 1:
 560             /* pipe 0 only */
 561             OUT_CS_REG(R300_SU_REG_DEST, 1 << 0);
 562             OUT_CS_REG_SEQ(R300_ZB_ZPASS_ADDR, 1);
 563             OUT_CS_RELOC(buf, (query->num_results + 0) * 4,
 564                     0, query->domain);
 565             break;
 566         default:
 567             fprintf(stderr, "r300: Implementation error: Chipset reports %d"
 568                     " pixel pipes!\n", caps->num_frag_pipes);
 569             abort();
 570     }
 571
 572     /* And, finally, reset it to normal... */
 573     OUT_CS_REG(R300_SU_REG_DEST, 0xF);
 574     END_CS;
 575 }
 576
 577 static void rv530_emit_query_end_single_z(struct r300_context *r300,
 578                                           struct r300_query *query)
 579 {
 580     struct r300_winsys_buffer *buf = r300->query_current->buffer;
 581     CS_LOCALS(r300);
 582
 583     BEGIN_CS(8);
 584     OUT_CS_REG(RV530_FG_ZBREG_DEST, RV530_FG_ZBREG_DEST_PIPE_SELECT_0);
 585     OUT_CS_REG_SEQ(R300_ZB_ZPASS_ADDR, 1);
 586     OUT_CS_RELOC(buf, query->num_results * 4, 0, query->domain);
 587     OUT_CS_REG(RV530_FG_ZBREG_DEST, RV530_FG_ZBREG_DEST_PIPE_SELECT_ALL);
 588     END_CS;
 589 }
 590
 591 static void rv530_emit_query_end_double_z(struct r300_context *r300,
 592                                           struct r300_query *query)
 593 {
 594     struct r300_winsys_buffer *buf = r300->query_current->buffer;
 595     CS_LOCALS(r300);
 596
 597     BEGIN_CS(14);
 598     OUT_CS_REG(RV530_FG_ZBREG_DEST, RV530_FG_ZBREG_DEST_PIPE_SELECT_0);
 599     OUT_CS_REG_SEQ(R300_ZB_ZPASS_ADDR, 1);
 600     OUT_CS_RELOC(buf, (query->num_results + 0) * 4, 0, query->domain);
 601     OUT_CS_REG(RV530_FG_ZBREG_DEST, RV530_FG_ZBREG_DEST_PIPE_SELECT_1);
 602     OUT_CS_REG_SEQ(R300_ZB_ZPASS_ADDR, 1);
 603     OUT_CS_RELOC(buf, (query->num_results + 1) * 4, 0, query->domain);
 604     OUT_CS_REG(RV530_FG_ZBREG_DEST, RV530_FG_ZBREG_DEST_PIPE_SELECT_ALL);
 605     END_CS;
 606 }
 607
 608 void r300_emit_query_end(struct r300_context* r300)
 609 {
 610     struct r300_capabilities *caps = &r300->screen->caps;
 611     struct r300_query *query = r300->query_current;
 612
 613     if (!query)
 614         return;
 615
 616     if (query->begin_emitted == FALSE)
 617         return;
 618
 619     if (caps->family == CHIP_FAMILY_RV530) {
 620         if (caps->num_z_pipes == 2)
 621             rv530_emit_query_end_double_z(r300, query);
 622         else
 623             rv530_emit_query_end_single_z(r300, query);
 624     } else
 625         r300_emit_query_end_frag_pipes(r300, query);
 626
 627     query->begin_emitted = FALSE;
 628     query->num_results += query->num_pipes;
 629
 630     /* XXX grab all the results and reset the counter. */
 631     if (query->num_results >= query->buffer_size / 4 - 4) {
 632         query->num_results = (query->buffer_size / 4) / 2;
 633         fprintf(stderr, "r300: Rewinding OQBO...\n");
 634     }
 635 }
 636
 637 void r300_emit_invariant_state(struct r300_context *r300,
 638                                unsigned size, void *state)
 639 {
 640     CS_LOCALS(r300);
 641     WRITE_CS_TABLE(state, size);
 642 }
 643
 644 void r300_emit_rs_state(struct r300_context* r300, unsigned size, void* state)
 645 {
 646     struct r300_rs_state* rs = state;
 647     CS_LOCALS(r300);
 648
 649     BEGIN_CS(size);
 650     OUT_CS_TABLE(rs->cb_main, 25);
 651     if (rs->polygon_offset_enable) {
 652         if (r300->zbuffer_bpp == 16) {
 653             OUT_CS_TABLE(rs->cb_poly_offset_zb16, 5);
 654         } else {
 655             OUT_CS_TABLE(rs->cb_poly_offset_zb24, 5);
 656         }
 657     }
 658     END_CS;
 659 }
 660
 661 void r300_emit_rs_block_state(struct r300_context* r300,
 662                               unsigned size, void* state)
 663 {
 664     struct r300_rs_block* rs = (struct r300_rs_block*)state;
 665     unsigned i;
 666     /* It's the same for both INST and IP tables */
 667     unsigned count = (rs->inst_count & R300_RS_INST_COUNT_MASK) + 1;
 668     CS_LOCALS(r300);
 669
 670     if (DBG_ON(r300, DBG_RS_BLOCK)) {
 671         r500_dump_rs_block(rs);
 672
 673         fprintf(stderr, "r300: RS emit:\n");
 674
 675         for (i = 0; i < count; i++)
 676             fprintf(stderr, "    : ip %d: 0x%08x\n", i, rs->ip[i]);
 677
 678         for (i = 0; i < count; i++)
 679             fprintf(stderr, "    : inst %d: 0x%08x\n", i, rs->inst[i]);
 680
 681         fprintf(stderr, "    : count: 0x%08x inst_count: 0x%08x\n",
 682             rs->count, rs->inst_count);
 683     }
 684
 685     BEGIN_CS(size);
 686     OUT_CS_REG_SEQ(R300_VAP_VTX_STATE_CNTL, 2);
 687     OUT_CS(rs->vap_vtx_state_cntl);
 688     OUT_CS(rs->vap_vsm_vtx_assm);
 689     OUT_CS_REG_SEQ(R300_VAP_OUTPUT_VTX_FMT_0, 2);
 690     OUT_CS(rs->vap_out_vtx_fmt[0]);
 691     OUT_CS(rs->vap_out_vtx_fmt[1]);
 692
 693     if (r300->screen->caps.is_r500) {
 694         OUT_CS_REG_SEQ(R500_RS_IP_0, count);
 695     } else {
 696         OUT_CS_REG_SEQ(R300_RS_IP_0, count);
 697     }
 698     OUT_CS_TABLE(rs->ip, count);
 699
 700     OUT_CS_REG_SEQ(R300_RS_COUNT, 2);
 701     OUT_CS(rs->count);
 702     OUT_CS(rs->inst_count);
 703
 704     if (r300->screen->caps.is_r500) {
 705         OUT_CS_REG_SEQ(R500_RS_INST_0, count);
 706     } else {
 707         OUT_CS_REG_SEQ(R300_RS_INST_0, count);
 708     }
 709     OUT_CS_TABLE(rs->inst, count);
 710     END_CS;
 711 }
 712
 713 void r300_emit_scissor_state(struct r300_context* r300,
 714                              unsigned size, void* state)
 715 {
 716     struct pipe_scissor_state* scissor = (struct pipe_scissor_state*)state;
 717     CS_LOCALS(r300);
 718
 719     BEGIN_CS(size);
 720     OUT_CS_REG_SEQ(R300_SC_CLIPRECT_TL_0, 2);
 721     if (r300->screen->caps.is_r500) {
 722         OUT_CS((scissor->minx << R300_CLIPRECT_X_SHIFT) |
 723                (scissor->miny << R300_CLIPRECT_Y_SHIFT));
 724         OUT_CS(((scissor->maxx - 1) << R300_CLIPRECT_X_SHIFT) |
 725                ((scissor->maxy - 1) << R300_CLIPRECT_Y_SHIFT));
 726     } else {
 727         OUT_CS(((scissor->minx + 1440) << R300_CLIPRECT_X_SHIFT) |
 728                ((scissor->miny + 1440) << R300_CLIPRECT_Y_SHIFT));
 729         OUT_CS(((scissor->maxx + 1440-1) << R300_CLIPRECT_X_SHIFT) |
 730                ((scissor->maxy + 1440-1) << R300_CLIPRECT_Y_SHIFT));
 731     }
 732     END_CS;
 733 }
 734
 735 void r300_emit_textures_state(struct r300_context *r300,
 736                               unsigned size, void *state)
 737 {
 738     struct r300_textures_state *allstate = (struct r300_textures_state*)state;
 739     struct r300_texture_sampler_state *texstate;
 740     struct r300_texture *tex;
 741     unsigned i;
 742     CS_LOCALS(r300);
 743
 744     BEGIN_CS(size);
 745     OUT_CS_REG(R300_TX_ENABLE, allstate->tx_enable);
 746
 747     for (i = 0; i < allstate->count; i++) {
 748         if ((1 << i) & allstate->tx_enable) {
 749             texstate = &allstate->regs[i];
 750             tex = r300_texture(allstate->sampler_views[i]->base.texture);
 751
 752             OUT_CS_REG(R300_TX_FILTER0_0 + (i * 4), texstate->filter0);
 753             OUT_CS_REG(R300_TX_FILTER1_0 + (i * 4), texstate->filter1);
 754             OUT_CS_REG(R300_TX_BORDER_COLOR_0 + (i * 4),
 755                        texstate->border_color);
 756
 757             OUT_CS_REG(R300_TX_FORMAT0_0 + (i * 4), texstate->format.format0);
 758             OUT_CS_REG(R300_TX_FORMAT1_0 + (i * 4), texstate->format.format1);
 759             OUT_CS_REG(R300_TX_FORMAT2_0 + (i * 4), texstate->format.format2);
 760
 761             OUT_CS_REG_SEQ(R300_TX_OFFSET_0 + (i * 4), 1);
 762             OUT_CS_TEX_RELOC(tex, texstate->format.tile_config, tex->domain,
 763                              0);
 764         }
 765     }
 766     END_CS;
 767 }
 768
 769 void r300_emit_aos(struct r300_context* r300, int offset, boolean indexed)
 770 {
 771     struct pipe_vertex_buffer *vb1, *vb2, *vbuf = r300->vertex_buffer;
 772     struct pipe_vertex_element *velem = r300->velems->velem;
 773     struct r300_buffer *buf;
 774     int i;
 775     unsigned *hw_format_size = r300->velems->hw_format_size;
 776     unsigned size1, size2, aos_count = r300->velems->count;
 777     unsigned packet_size = (aos_count * 3 + 1) / 2;
 778     CS_LOCALS(r300);
 779
 780     BEGIN_CS(2 + packet_size + aos_count * 2);
 781     OUT_CS_PKT3(R300_PACKET3_3D_LOAD_VBPNTR, packet_size);
 782     OUT_CS(aos_count | (!indexed ? R300_VC_FORCE_PREFETCH : 0));
 783
 784     for (i = 0; i < aos_count - 1; i += 2) {
 785         vb1 = &vbuf[velem[i].vertex_buffer_index];
 786         vb2 = &vbuf[velem[i+1].vertex_buffer_index];
 787         size1 = hw_format_size[i];
 788         size2 = hw_format_size[i+1];
 789
 790         OUT_CS(R300_VBPNTR_SIZE0(size1) | R300_VBPNTR_STRIDE0(vb1->stride) |
 791                R300_VBPNTR_SIZE1(size2) | R300_VBPNTR_STRIDE1(vb2->stride));
 792         OUT_CS(vb1->buffer_offset + velem[i].src_offset   + offset * vb1->stride);
 793         OUT_CS(vb2->buffer_offset + velem[i+1].src_offset + offset * vb2->stride);
 794     }
 795
 796     if (aos_count & 1) {
 797         vb1 = &vbuf[velem[i].vertex_buffer_index];
 798         size1 = hw_format_size[i];
 799
 800         OUT_CS(R300_VBPNTR_SIZE0(size1) | R300_VBPNTR_STRIDE0(vb1->stride));
 801         OUT_CS(vb1->buffer_offset + velem[i].src_offset + offset * vb1->stride);
 802     }
 803
 804     for (i = 0; i < aos_count; i++) {
 805         buf = r300_buffer(vbuf[velem[i].vertex_buffer_index].buffer);
 806         OUT_CS_BUF_RELOC_NO_OFFSET(&buf->b.b, buf->domain, 0);
 807     }
 808     END_CS;
 809 }
 810
 811 void r300_emit_aos_swtcl(struct r300_context *r300, boolean indexed)
 812 {
 813     CS_LOCALS(r300);
 814
 815     DBG(r300, DBG_SWTCL, "r300: Preparing vertex buffer %p for render, "
 816             "vertex size %d\n", r300->vbo,
 817             r300->vertex_info.size);
 818     /* Set the pointer to our vertex buffer. The emitted values are this:
 819      * PACKET3 [3D_LOAD_VBPNTR]
 820      * COUNT   [1]
 821      * FORMAT  [size | stride << 8]
 822      * OFFSET  [offset into BO]
 823      * VBPNTR  [relocated BO]
 824      */
 825     BEGIN_CS(7);
 826     OUT_CS_PKT3(R300_PACKET3_3D_LOAD_VBPNTR, 3);
 827     OUT_CS(1 | (!indexed ? R300_VC_FORCE_PREFETCH : 0));
 828     OUT_CS(r300->vertex_info.size |
 829             (r300->vertex_info.size << 8));
 830     OUT_CS(r300->vbo_offset);
 831     OUT_CS_BUF_RELOC(r300->vbo, 0, r300_buffer(r300->vbo)->domain, 0);
 832     END_CS;
 833 }
 834
 835 void r300_emit_vertex_stream_state(struct r300_context* r300,
 836                                    unsigned size, void* state)
 837 {
 838     struct r300_vertex_stream_state *streams =
 839         (struct r300_vertex_stream_state*)state;
 840     unsigned i;
 841     CS_LOCALS(r300);
 842
 843     if (DBG_ON(r300, DBG_PSC)) {
 844         fprintf(stderr, "r300: PSC emit:\n");
 845
 846         for (i = 0; i < streams->count; i++) {
 847             fprintf(stderr, "    : prog_stream_cntl%d: 0x%08x\n", i,
 848                    streams->vap_prog_stream_cntl[i]);
 849         }
 850
 851         for (i = 0; i < streams->count; i++) {
 852             fprintf(stderr, "    : prog_stream_cntl_ext%d: 0x%08x\n", i,
 853                    streams->vap_prog_stream_cntl_ext[i]);
 854         }
 855     }
 856
 857     BEGIN_CS(size);
 858     OUT_CS_REG_SEQ(R300_VAP_PROG_STREAM_CNTL_0, streams->count);
 859     OUT_CS_TABLE(streams->vap_prog_stream_cntl, streams->count);
 860     OUT_CS_REG_SEQ(R300_VAP_PROG_STREAM_CNTL_EXT_0, streams->count);
 861     OUT_CS_TABLE(streams->vap_prog_stream_cntl_ext, streams->count);
 862     END_CS;
 863 }
 864
 865 void r300_emit_pvs_flush(struct r300_context* r300, unsigned size, void* state)
 866 {
 867     CS_LOCALS(r300);
 868
 869     BEGIN_CS(size);
 870     OUT_CS_REG(R300_VAP_PVS_STATE_FLUSH_REG, 0x0);
 871     END_CS;
 872 }
 873
 874 void r300_emit_vap_invariant_state(struct r300_context *r300,
 875                                    unsigned size, void *state)
 876 {
 877     CS_LOCALS(r300);
 878     WRITE_CS_TABLE(state, size);
 879 }
 880
 881 void r300_emit_vs_state(struct r300_context* r300, unsigned size, void* state)
 882 {
 883     struct r300_vertex_shader* vs = (struct r300_vertex_shader*)state;
 884     struct r300_vertex_program_code* code = &vs->code;
 885     struct r300_screen* r300screen = r300->screen;
 886     unsigned instruction_count = code->length / 4;
 887     unsigned i;
 888
 889     unsigned vtx_mem_size = r300screen->caps.is_r500 ? 128 : 72;
 890     unsigned input_count = MAX2(util_bitcount(code->InputsRead), 1);
 891     unsigned output_count = MAX2(util_bitcount(code->OutputsWritten), 1);
 892     unsigned temp_count = MAX2(code->num_temporaries, 1);
 893
 894     unsigned pvs_num_slots = MIN3(vtx_mem_size / input_count,
 895                                   vtx_mem_size / output_count, 10);
 896     unsigned pvs_num_controllers = MIN2(vtx_mem_size / temp_count, 6);
 897
 898     unsigned imm_first = vs->externals_count;
 899     unsigned imm_end = vs->code.constants.Count;
 900     unsigned imm_count = vs->immediates_count;
 901
 902     CS_LOCALS(r300);
 903
 904     BEGIN_CS(size);
 905
 906     /* R300_VAP_PVS_CODE_CNTL_0
 907      * R300_VAP_PVS_CONST_CNTL
 908      * R300_VAP_PVS_CODE_CNTL_1
 909      * See the r5xx docs for instructions on how to use these. */
 910     OUT_CS_REG_SEQ(R300_VAP_PVS_CODE_CNTL_0, 3);
 911     OUT_CS(R300_PVS_FIRST_INST(0) |
 912             R300_PVS_XYZW_VALID_INST(instruction_count - 1) |
 913             R300_PVS_LAST_INST(instruction_count - 1));
 914     OUT_CS(R300_PVS_MAX_CONST_ADDR(code->constants.Count - 1));
 915     OUT_CS(instruction_count - 1);
 916
 917     OUT_CS_REG(R300_VAP_PVS_VECTOR_INDX_REG, 0);
 918     OUT_CS_ONE_REG(R300_VAP_PVS_UPLOAD_DATA, code->length);
 919     OUT_CS_TABLE(code->body.d, code->length);
 920
 921     OUT_CS_REG(R300_VAP_CNTL, R300_PVS_NUM_SLOTS(pvs_num_slots) |
 922             R300_PVS_NUM_CNTLRS(pvs_num_controllers) |
 923             R300_PVS_NUM_FPUS(r300screen->caps.num_vert_fpus) |
 924             R300_PVS_VF_MAX_VTX_NUM(12) |
 925             (r300screen->caps.is_r500 ? R500_TCL_STATE_OPTIMIZATION : 0));
 926
 927     /* Emit immediates. */
 928     if (imm_count) {
 929         OUT_CS_REG(R300_VAP_PVS_VECTOR_INDX_REG,
 930                    (r300->screen->caps.is_r500 ?
 931                    R500_PVS_CONST_START : R300_PVS_CONST_START) +
 932                    imm_first);
 933         OUT_CS_ONE_REG(R300_VAP_PVS_UPLOAD_DATA, imm_count * 4);
 934         for (i = imm_first; i < imm_end; i++) {
 935             const float *data = vs->code.constants.Constants[i].u.Immediate;
 936             OUT_CS_TABLE(data, 4);
 937         }
 938     }
 939     END_CS;
 940 }
 941
 942 void r300_emit_vs_constants(struct r300_context* r300,
 943                             unsigned size, void *state)
 944 {
 945     unsigned count =
 946         ((struct r300_vertex_shader*)r300->vs_state.state)->externals_count;
 947     struct r300_constant_buffer *buf = (struct r300_constant_buffer*)state;
 948     CS_LOCALS(r300);
 949
 950     if (!count)
 951         return;
 952
 953     BEGIN_CS(size);
 954     OUT_CS_REG(R300_VAP_PVS_VECTOR_INDX_REG,
 955                (r300->screen->caps.is_r500 ?
 956                R500_PVS_CONST_START : R300_PVS_CONST_START));
 957     OUT_CS_ONE_REG(R300_VAP_PVS_UPLOAD_DATA, count * 4);
 958     OUT_CS_TABLE(buf->ptr, count * 4);
 959     END_CS;
 960 }
 961
 962 void r300_emit_viewport_state(struct r300_context* r300,
 963                               unsigned size, void* state)
 964 {
 965     struct r300_viewport_state* viewport = (struct r300_viewport_state*)state;
 966     CS_LOCALS(r300);
 967
 968     BEGIN_CS(size);
 969     OUT_CS_REG_SEQ(R300_SE_VPORT_XSCALE, 6);
 970     OUT_CS_TABLE(&viewport->xscale, 6);
 971     OUT_CS_REG(R300_VAP_VTE_CNTL, viewport->vte_control);
 972     END_CS;
 973 }
 974
 975 static void r300_emit_hiz_line_clear(struct r300_context *r300, int start, uint16_t count, uint32_t val)
 976 {
 977     CS_LOCALS(r300);
 978     BEGIN_CS(4);
 979     OUT_CS_PKT3(R300_PACKET3_3D_CLEAR_HIZ, 2);
 980     OUT_CS(start);
 981     OUT_CS(count);
 982     OUT_CS(val);
 983     END_CS;
 984 }
 985
 986 static void r300_emit_zmask_line_clear(struct r300_context *r300, int start, uint16_t count, uint32_t val)
 987 {
 988     CS_LOCALS(r300);
 989     BEGIN_CS(4);
 990     OUT_CS_PKT3(R300_PACKET3_3D_CLEAR_ZMASK, 2);
 991     OUT_CS(start);
 992     OUT_CS(count);
 993     OUT_CS(val);
 994     END_CS;
 995 }
 996
 997 #define ALIGN_DIVUP(x, y) (((x) + (y) - 1) / (y))
 998
 999 void r300_emit_hiz_clear(struct r300_context *r300, unsigned size, void *state)
1000 {
1001     struct pipe_framebuffer_state *fb =
1002         (struct pipe_framebuffer_state*)r300->fb_state.state;
1003     struct r300_hyperz_state *z =
1004         (struct r300_hyperz_state*)r300->hyperz_state.state;
1005     struct r300_screen* r300screen = r300->screen;
1006     uint32_t stride, offset = 0, height, offset_shift;
1007     struct r300_texture* tex;
1008     int i;
1009
1010     tex = r300_texture(fb->zsbuf->texture);
1011
1012     offset = tex->hiz_mem[fb->zsbuf->level]->ofs;
1013     stride = tex->desc.stride_in_pixels[fb->zsbuf->level];
1014
1015     /* convert from pixels to 4x4 blocks */
1016     stride = ALIGN_DIVUP(stride, 4);
1017
1018     stride = ALIGN_DIVUP(stride, r300screen->caps.num_frag_pipes);
1019     /* there are 4 blocks per dwords */
1020     stride = ALIGN_DIVUP(stride, 4);
1021
1022     height = ALIGN_DIVUP(fb->zsbuf->height, 4);
1023
1024     offset_shift = 2;
1025     offset_shift += (r300screen->caps.num_frag_pipes / 2);
1026
1027     for (i = 0; i < height; i++) {
1028         offset = i * stride;
1029         offset <<= offset_shift;
1030         r300_emit_hiz_line_clear(r300, offset, stride, 0xffffffff);
1031     }
1032     z->current_func = -1;
1033 }
1034
1035 void r300_emit_zmask_clear(struct r300_context *r300, unsigned size, void *state)
1036 {
1037     struct pipe_framebuffer_state *fb =
1038         (struct pipe_framebuffer_state*)r300->fb_state.state;
1039     struct r300_screen* r300screen = r300->screen;
1040     uint32_t stride, offset = 0;
1041     struct r300_texture* tex;
1042     uint32_t i, height;
1043     int mult, offset_shift;
1044
1045     tex = r300_texture(fb->zsbuf->texture);
1046     stride = tex->desc.stride_in_pixels[fb->zsbuf->level];
1047
1048     offset = tex->zmask_mem[fb->zsbuf->level]->ofs;
1049
1050     if (r300->z_compression == RV350_Z_COMPRESS_88)
1051         mult = 8;
1052     else
1053         mult = 4;
1054
1055     height = ALIGN_DIVUP(fb->zsbuf->height, mult);
1056
1057     offset_shift = 4;
1058     offset_shift += (r300screen->caps.num_frag_pipes / 2);
1059     stride = ALIGN_DIVUP(stride, r300screen->caps.num_frag_pipes);
1060
1061     /* okay have width in pixels - divide by block width */
1062     stride = ALIGN_DIVUP(stride, mult);
1063     /* have width in blocks - divide by number of fragment pipes screen width */
1064     /* 16 blocks per dword */
1065     stride = ALIGN_DIVUP(stride, 16);
1066
1067     for (i = 0; i < height; i++) {
1068         offset = i * stride;
1069         offset <<= offset_shift;
1070         r300_emit_zmask_line_clear(r300, offset, stride, 0x0);//0xffffffff);
1071     }
1072 }
1073
1074 void r300_emit_ztop_state(struct r300_context* r300,
1075                           unsigned size, void* state)
1076 {
1077     struct r300_ztop_state* ztop = (struct r300_ztop_state*)state;
1078     CS_LOCALS(r300);
1079
1080     BEGIN_CS(size);
1081     OUT_CS_REG(R300_ZB_ZTOP, ztop->z_buffer_top);
1082     END_CS;
1083 }
1084
1085 void r300_emit_texture_cache_inval(struct r300_context* r300, unsigned size, void* state)
1086 {
1087     CS_LOCALS(r300);
1088
1089     BEGIN_CS(size);
1090     OUT_CS_REG(R300_TX_INVALTAGS, 0);
1091     END_CS;
1092 }
1093
1094 void r300_emit_buffer_validate(struct r300_context *r300,
1095                                boolean do_validate_vertex_buffers,
1096                                struct pipe_resource *index_buffer)
1097 {
1098     struct pipe_framebuffer_state* fb =
1099         (struct pipe_framebuffer_state*)r300->fb_state.state;
1100     struct r300_textures_state *texstate =
1101         (struct r300_textures_state*)r300->textures_state.state;
1102     struct r300_texture* tex;
1103     struct pipe_vertex_buffer *vbuf = r300->vertex_buffer;
1104     struct pipe_vertex_element *velem = r300->velems->velem;
1105     struct pipe_resource *pbuf;
1106     unsigned i;
1107     boolean invalid = FALSE;
1108
1109     /* upload buffers first */
1110     if (r300->screen->caps.has_tcl && r300->any_user_vbs) {
1111         r300_upload_user_buffers(r300);
1112         r300->any_user_vbs = false;
1113     }
1114
1115     /* Clean out BOs. */
1116     r300->rws->cs_reset_buffers(r300->cs);
1117
1118 validate:
1119     /* Color buffers... */
1120     for (i = 0; i < fb->nr_cbufs; i++) {
1121         tex = r300_texture(fb->cbufs[i]->texture);
1122         assert(tex && tex->buffer && "cbuf is marked, but NULL!");
1123         r300->rws->cs_add_buffer(r300->cs, tex->buffer, 0,
1124                                  r300_surface(fb->cbufs[i])->domain);
1125     }
1126     /* ...depth buffer... */
1127     if (fb->zsbuf) {
1128         tex = r300_texture(fb->zsbuf->texture);
1129         assert(tex && tex->buffer && "zsbuf is marked, but NULL!");
1130         r300->rws->cs_add_buffer(r300->cs, tex->buffer, 0,
1131                                  r300_surface(fb->zsbuf)->domain);
1132     }
1133     /* ...textures... */
1134     for (i = 0; i < texstate->count; i++) {
1135         if (!(texstate->tx_enable & (1 << i))) {
1136             continue;
1137         }
1138
1139         tex = r300_texture(texstate->sampler_views[i]->base.texture);
1140         r300->rws->cs_add_buffer(r300->cs, tex->buffer, tex->domain, 0);
1141     }
1142     /* ...occlusion query buffer... */
1143     if (r300->query_current)
1144         r300->rws->cs_add_buffer(r300->cs, r300->query_current->buffer,
1145                                  0, r300->query_current->domain);
1146     /* ...vertex buffer for SWTCL path... */
1147     if (r300->vbo)
1148         r300->rws->cs_add_buffer(r300->cs, r300_buffer(r300->vbo)->buf,
1149                                  r300_buffer(r300->vbo)->domain, 0);
1150     /* ...vertex buffers for HWTCL path... */
1151     if (do_validate_vertex_buffers) {
1152         for (i = 0; i < r300->velems->count; i++) {
1153             pbuf = vbuf[velem[i].vertex_buffer_index].buffer;
1154
1155             r300->rws->cs_add_buffer(r300->cs, r300_buffer(pbuf)->buf,
1156                                      r300_buffer(pbuf)->domain, 0);
1157         }
1158     }
1159     /* ...and index buffer for HWTCL path. */
1160     if (index_buffer)
1161         r300->rws->cs_add_buffer(r300->cs, r300_buffer(index_buffer)->buf,
1162                                  r300_buffer(index_buffer)->domain, 0);
1163
1164     if (!r300->rws->cs_validate(r300->cs)) {
1165         r300->context.flush(&r300->context, 0, NULL);
1166         if (invalid) {
1167             /* Well, hell. */
1168             fprintf(stderr, "r300: Stuck in validation loop, gonna quit now.\n");
1169             abort();
1170         }
1171         invalid = TRUE;
1172         goto validate;
1173     }
1174 }
1175
1176 unsigned r300_get_num_dirty_dwords(struct r300_context *r300)
1177 {
1178     struct r300_atom* atom;
1179     unsigned dwords = 0;
1180
1181     foreach(atom, &r300->atom_list) {
1182         if (atom->dirty) {
1183             dwords += atom->size;
1184         }
1185     }
1186
1187     /* let's reserve some more, just in case */
1188     dwords += 32;
1189
1190     return dwords;
1191 }
1192
1193 /* Emit all dirty state. */
1194 void r300_emit_dirty_state(struct r300_context* r300)
1195 {
1196     struct r300_atom* atom;
1197
1198     foreach(atom, &r300->atom_list) {
1199         if (atom->dirty) {
1200             atom->emit(r300, atom->size, atom->state);
1201             if (SCREEN_DBG_ON(r300->screen, DBG_STATS)) {
1202                 atom->counter++;
1203             }
1204             atom->dirty = FALSE;
1205         }
1206     }
1207
1208     r300->dirty_hw++;
1209 }