src/gallium/drivers/r300/r300_emit.c

   1 /*
   2  * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
   3  * Copyright 2009 Marek Olšák <maraeo@gmail.com>
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining a
   6  * copy of this software and associated documentation files (the "Software"),
   7  * to deal in the Software without restriction, including without limitation
   8  * on the rights to use, copy, modify, merge, publish, distribute, sub
   9  * license, and/or sell copies of the Software, and to permit persons to whom
  10  * the Software is furnished to do so, subject to the following conditions:
  11  *
  12  * The above copyright notice and this permission notice (including the next
  13  * paragraph) shall be included in all copies or substantial portions of the
  14  * Software.
  15  *
  16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  18  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  19  * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
  20  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  21  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  22  * USE OR OTHER DEALINGS IN THE SOFTWARE. */
  23
  24 /* r300_emit: Functions for emitting state. */
  25
  26 #include "util/u_format.h"
  27 #include "util/u_math.h"
  28 #include "util/u_simple_list.h"
  29
  30 #include "r300_context.h"
  31 #include "r300_cs.h"
  32 #include "r300_emit.h"
  33 #include "r300_fs.h"
  34 #include "r300_screen.h"
  35 #include "r300_screen_buffer.h"
  36 #include "r300_vs.h"
  37
  38 void r300_emit_blend_state(struct r300_context* r300,
  39                            unsigned size, void* state)
  40 {
  41     struct r300_blend_state* blend = (struct r300_blend_state*)state;
  42     struct pipe_framebuffer_state* fb =
  43         (struct pipe_framebuffer_state*)r300->fb_state.state;
  44     CS_LOCALS(r300);
  45
  46     if (fb->nr_cbufs) {
  47         WRITE_CS_TABLE(blend->cb, size);
  48     } else {
  49         WRITE_CS_TABLE(blend->cb_no_readwrite, size);
  50     }
  51 }
  52
  53 void r300_emit_blend_color_state(struct r300_context* r300,
  54                                  unsigned size, void* state)
  55 {
  56     struct r300_blend_color_state* bc = (struct r300_blend_color_state*)state;
  57     CS_LOCALS(r300);
  58
  59     WRITE_CS_TABLE(bc->cb, size);
  60 }
  61
  62 void r300_emit_clip_state(struct r300_context* r300,
  63                           unsigned size, void* state)
  64 {
  65     struct r300_clip_state* clip = (struct r300_clip_state*)state;
  66     CS_LOCALS(r300);
  67
  68     WRITE_CS_TABLE(clip->cb, size);
  69 }
  70
  71 void r300_emit_dsa_state(struct r300_context* r300, unsigned size, void* state)
  72 {
  73     struct r300_dsa_state* dsa = (struct r300_dsa_state*)state;
  74     struct pipe_framebuffer_state* fb =
  75         (struct pipe_framebuffer_state*)r300->fb_state.state;
  76     CS_LOCALS(r300);
  77
  78     if (fb->zsbuf) {
  79         WRITE_CS_TABLE(&dsa->cb_begin, size);
  80     } else {
  81         WRITE_CS_TABLE(dsa->cb_no_readwrite, size);
  82     }
  83 }
  84
  85 static const float * get_rc_constant_state(
  86     struct r300_context * r300,
  87     struct rc_constant * constant)
  88 {
  89     struct r300_textures_state* texstate = r300->textures_state.state;
  90     static float vec[4] = { 0.0, 0.0, 0.0, 1.0 };
  91     struct pipe_resource *tex;
  92
  93     assert(constant->Type == RC_CONSTANT_STATE);
  94
  95     switch (constant->u.State[0]) {
  96         /* Factor for converting rectangle coords to
  97          * normalized coords. Should only show up on non-r500. */
  98         case RC_STATE_R300_TEXRECT_FACTOR:
  99             tex = texstate->sampler_views[constant->u.State[1]]->base.texture;
 100             vec[0] = 1.0 / tex->width0;
 101             vec[1] = 1.0 / tex->height0;
 102             break;
 103
 104         case RC_STATE_R300_VIEWPORT_SCALE:
 105             vec[0] = r300->viewport.scale[0];
 106             vec[1] = r300->viewport.scale[1];
 107             vec[2] = r300->viewport.scale[2];
 108             break;
 109
 110         case RC_STATE_R300_VIEWPORT_OFFSET:
 111             vec[0] = r300->viewport.translate[0];
 112             vec[1] = r300->viewport.translate[1];
 113             vec[2] = r300->viewport.translate[2];
 114             break;
 115
 116         default:
 117             fprintf(stderr, "r300: Implementation error: "
 118                 "Unknown RC_CONSTANT type %d\n", constant->u.State[0]);
 119     }
 120
 121     /* This should either be (0, 0, 0, 1), which should be a relatively safe
 122      * RGBA or STRQ value, or it could be one of the RC_CONSTANT_STATE
 123      * state factors. */
 124     return vec;
 125 }
 126
 127 /* Convert a normal single-precision float into the 7.16 format
 128  * used by the R300 fragment shader.
 129  */
 130 uint32_t pack_float24(float f)
 131 {
 132     union {
 133         float fl;
 134         uint32_t u;
 135     } u;
 136     float mantissa;
 137     int exponent;
 138     uint32_t float24 = 0;
 139
 140     if (f == 0.0)
 141         return 0;
 142
 143     u.fl = f;
 144
 145     mantissa = frexpf(f, &exponent);
 146
 147     /* Handle -ve */
 148     if (mantissa < 0) {
 149         float24 |= (1 << 23);
 150         mantissa = mantissa * -1.0;
 151     }
 152     /* Handle exponent, bias of 63 */
 153     exponent += 62;
 154     float24 |= (exponent << 16);
 155     /* Kill 7 LSB of mantissa */
 156     float24 |= (u.u & 0x7FFFFF) >> 7;
 157
 158     return float24;
 159 }
 160
 161 void r300_emit_fs(struct r300_context* r300, unsigned size, void *state)
 162 {
 163     struct r300_fragment_shader *fs = r300_fs(r300);
 164     CS_LOCALS(r300);
 165
 166     WRITE_CS_TABLE(fs->shader->cb_code, fs->shader->cb_code_size);
 167 }
 168
 169 void r300_emit_fs_constants(struct r300_context* r300, unsigned size, void *state)
 170 {
 171     struct r300_fragment_shader *fs = r300_fs(r300);
 172     struct r300_constant_buffer *buf = (struct r300_constant_buffer*)state;
 173     unsigned count = fs->shader->externals_count * 4;
 174     CS_LOCALS(r300);
 175
 176     if (count == 0)
 177         return;
 178
 179     BEGIN_CS(size);
 180     OUT_CS_REG_SEQ(R300_PFS_PARAM_0_X, count);
 181     OUT_CS_TABLE(buf->constants, count);
 182     END_CS;
 183 }
 184
 185 void r300_emit_fs_rc_constant_state(struct r300_context* r300, unsigned size, void *state)
 186 {
 187     struct r300_fragment_shader *fs = r300_fs(r300);
 188     struct rc_constant_list *constants = &fs->shader->code.constants;
 189     unsigned i;
 190     unsigned count = fs->shader->rc_state_count;
 191     unsigned first = fs->shader->externals_count;
 192     unsigned end = constants->Count;
 193     uint32_t cdata[4];
 194     unsigned j;
 195     CS_LOCALS(r300);
 196
 197     if (count == 0)
 198         return;
 199
 200     BEGIN_CS(size);
 201     for(i = first; i < end; ++i) {
 202         if (constants->Constants[i].Type == RC_CONSTANT_STATE) {
 203             const float *data =
 204                     get_rc_constant_state(r300, &constants->Constants[i]);
 205
 206             for (j = 0; j < 4; j++)
 207                 cdata[j] = pack_float24(data[j]);
 208
 209             OUT_CS_REG_SEQ(R300_PFS_PARAM_0_X + i * 16, 4);
 210             OUT_CS_TABLE(cdata, 4);
 211         }
 212     }
 213     END_CS;
 214 }
 215
 216 void r500_emit_fs(struct r300_context* r300, unsigned size, void *state)
 217 {
 218     struct r300_fragment_shader *fs = r300_fs(r300);
 219     CS_LOCALS(r300);
 220
 221     WRITE_CS_TABLE(fs->shader->cb_code, fs->shader->cb_code_size);
 222 }
 223
 224 void r500_emit_fs_constants(struct r300_context* r300, unsigned size, void *state)
 225 {
 226     struct r300_fragment_shader *fs = r300_fs(r300);
 227     struct r300_constant_buffer *buf = (struct r300_constant_buffer*)state;
 228     unsigned count = fs->shader->externals_count * 4;
 229     CS_LOCALS(r300);
 230
 231     if (count == 0)
 232         return;
 233
 234     BEGIN_CS(size);
 235     OUT_CS_REG(R500_GA_US_VECTOR_INDEX, R500_GA_US_VECTOR_INDEX_TYPE_CONST);
 236     OUT_CS_ONE_REG(R500_GA_US_VECTOR_DATA, count);
 237     OUT_CS_TABLE(buf->constants, count);
 238     END_CS;
 239 }
 240
 241 void r500_emit_fs_rc_constant_state(struct r300_context* r300, unsigned size, void *state)
 242 {
 243     struct r300_fragment_shader *fs = r300_fs(r300);
 244     struct rc_constant_list *constants = &fs->shader->code.constants;
 245     unsigned i;
 246     unsigned count = fs->shader->rc_state_count;
 247     unsigned first = fs->shader->externals_count;
 248     unsigned end = constants->Count;
 249     CS_LOCALS(r300);
 250
 251     if (count == 0)
 252         return;
 253
 254     BEGIN_CS(size);
 255     for(i = first; i < end; ++i) {
 256         if (constants->Constants[i].Type == RC_CONSTANT_STATE) {
 257             const float *data =
 258                     get_rc_constant_state(r300, &constants->Constants[i]);
 259
 260             OUT_CS_REG(R500_GA_US_VECTOR_INDEX,
 261                        R500_GA_US_VECTOR_INDEX_TYPE_CONST |
 262                        (i & R500_GA_US_VECTOR_INDEX_MASK));
 263             OUT_CS_ONE_REG(R500_GA_US_VECTOR_DATA, 4);
 264             OUT_CS_TABLE(data, 4);
 265         }
 266     }
 267     END_CS;
 268 }
 269
 270 void r300_emit_gpu_flush(struct r300_context *r300, unsigned size, void *state)
 271 {
 272     struct r300_gpu_flush *gpuflush = (struct r300_gpu_flush*)state;
 273     struct pipe_framebuffer_state* fb =
 274             (struct pipe_framebuffer_state*)r300->fb_state.state;
 275     uint32_t height = fb->height;
 276     uint32_t width = fb->width;
 277     CS_LOCALS(r300);
 278
 279     if (r300->cbzb_clear) {
 280         struct r300_surface *surf = r300_surface(fb->cbufs[0]);
 281
 282         height = surf->cbzb_height;
 283         width = surf->cbzb_width;
 284     }
 285
 286     BEGIN_CS(size);
 287
 288     /* Set up scissors.
 289      * By writing to the SC registers, SC & US assert idle. */
 290     OUT_CS_REG_SEQ(R300_SC_SCISSORS_TL, 2);
 291     if (r300->screen->caps.is_r500) {
 292         OUT_CS(0);
 293         OUT_CS(((width  - 1) << R300_SCISSORS_X_SHIFT) |
 294                ((height - 1) << R300_SCISSORS_Y_SHIFT));
 295     } else {
 296         OUT_CS((1440 << R300_SCISSORS_X_SHIFT) |
 297                (1440 << R300_SCISSORS_Y_SHIFT));
 298         OUT_CS(((width  + 1440-1) << R300_SCISSORS_X_SHIFT) |
 299                ((height + 1440-1) << R300_SCISSORS_Y_SHIFT));
 300     }
 301
 302     /* Flush CB & ZB caches and wait until the 3D engine is idle and clean. */
 303     OUT_CS_TABLE(gpuflush->cb_flush_clean, 6);
 304     END_CS;
 305 }
 306
 307 void r300_emit_aa_state(struct r300_context *r300, unsigned size, void *state)
 308 {
 309     struct r300_aa_state *aa = (struct r300_aa_state*)state;
 310     CS_LOCALS(r300);
 311
 312     BEGIN_CS(size);
 313     OUT_CS_REG(R300_GB_AA_CONFIG, aa->aa_config);
 314
 315     if (aa->dest) {
 316         OUT_CS_REG_SEQ(R300_RB3D_AARESOLVE_OFFSET, 1);
 317         OUT_CS_RELOC(aa->dest->buffer, aa->dest->offset, 0, aa->dest->domain);
 318
 319         OUT_CS_REG_SEQ(R300_RB3D_AARESOLVE_PITCH, 1);
 320         OUT_CS_RELOC(aa->dest->buffer, aa->dest->pitch, 0, aa->dest->domain);
 321     }
 322
 323     OUT_CS_REG(R300_RB3D_AARESOLVE_CTL, aa->aaresolve_ctl);
 324     END_CS;
 325 }
 326
 327 void r300_emit_fb_state(struct r300_context* r300, unsigned size, void* state)
 328 {
 329     struct pipe_framebuffer_state* fb = (struct pipe_framebuffer_state*)state;
 330     struct r300_surface* surf;
 331     unsigned i;
 332     CS_LOCALS(r300);
 333
 334     BEGIN_CS(size);
 335
 336     /* NUM_MULTIWRITES replicates COLOR[0] to all colorbuffers, which is not
 337      * what we usually want. */
 338     if (r300->screen->caps.is_r500) {
 339         OUT_CS_REG(R300_RB3D_CCTL,
 340             R300_RB3D_CCTL_INDEPENDENT_COLORFORMAT_ENABLE_ENABLE);
 341     } else {
 342         OUT_CS_REG(R300_RB3D_CCTL, 0);
 343     }
 344
 345     /* Set up colorbuffers. */
 346     for (i = 0; i < fb->nr_cbufs; i++) {
 347         surf = r300_surface(fb->cbufs[i]);
 348
 349         OUT_CS_REG_SEQ(R300_RB3D_COLOROFFSET0 + (4 * i), 1);
 350         OUT_CS_RELOC(surf->buffer, surf->offset, 0, surf->domain);
 351
 352         OUT_CS_REG_SEQ(R300_RB3D_COLORPITCH0 + (4 * i), 1);
 353         OUT_CS_RELOC(surf->buffer, surf->pitch, 0, surf->domain);
 354     }
 355
 356     /* Set up the ZB part of the CBZB clear. */
 357     if (r300->cbzb_clear) {
 358         surf = r300_surface(fb->cbufs[0]);
 359
 360         OUT_CS_REG(R300_ZB_FORMAT, surf->cbzb_format);
 361
 362         OUT_CS_REG_SEQ(R300_ZB_DEPTHOFFSET, 1);
 363         OUT_CS_RELOC(surf->buffer, surf->cbzb_midpoint_offset, 0, surf->domain);
 364
 365         OUT_CS_REG_SEQ(R300_ZB_DEPTHPITCH, 1);
 366         OUT_CS_RELOC(surf->buffer, surf->cbzb_pitch, 0, surf->domain);
 367     }
 368     /* Set up a zbuffer. */
 369     else if (fb->zsbuf) {
 370         surf = r300_surface(fb->zsbuf);
 371
 372         OUT_CS_REG(R300_ZB_FORMAT, surf->format);
 373
 374         OUT_CS_REG_SEQ(R300_ZB_DEPTHOFFSET, 1);
 375         OUT_CS_RELOC(surf->buffer, surf->offset, 0, surf->domain);
 376
 377         OUT_CS_REG_SEQ(R300_ZB_DEPTHPITCH, 1);
 378         OUT_CS_RELOC(surf->buffer, surf->pitch, 0, surf->domain);
 379
 380         /* HiZ RAM. */
 381         if (r300->screen->caps.has_hiz) {
 382             OUT_CS_REG(R300_ZB_HIZ_OFFSET, 0);
 383             OUT_CS_REG(R300_ZB_HIZ_PITCH, 0);
 384         }
 385
 386         /* Z Mask RAM. (compressed zbuffer) */
 387         OUT_CS_REG(R300_ZB_ZMASK_OFFSET, 0);
 388         OUT_CS_REG(R300_ZB_ZMASK_PITCH, 0);
 389     }
 390
 391     END_CS;
 392 }
 393
 394 void r300_emit_hyperz_state(struct r300_context *r300,
 395                             unsigned size, void *state)
 396 {
 397     CS_LOCALS(r300);
 398     WRITE_CS_TABLE(state, size);
 399 }
 400
 401 void r300_emit_hyperz_end(struct r300_context *r300)
 402 {
 403     struct r300_hyperz_state z =
 404             *(struct r300_hyperz_state*)r300->hyperz_state.state;
 405
 406     z.zb_bw_cntl = 0;
 407     z.zb_depthclearvalue = 0;
 408     z.sc_hyperz = R300_SC_HYPERZ_ADJ_2;
 409
 410     r300_emit_hyperz_state(r300, r300->hyperz_state.size, &z);
 411 }
 412
 413 void r300_emit_fb_state_pipelined(struct r300_context *r300,
 414                                   unsigned size, void *state)
 415 {
 416     struct pipe_framebuffer_state* fb =
 417             (struct pipe_framebuffer_state*)r300->fb_state.state;
 418     unsigned i;
 419     CS_LOCALS(r300);
 420
 421     BEGIN_CS(size);
 422
 423     /* Colorbuffer format in the US block.
 424      * (must be written after unpipelined regs) */
 425     OUT_CS_REG_SEQ(R300_US_OUT_FMT_0, 4);
 426     for (i = 0; i < fb->nr_cbufs; i++) {
 427         OUT_CS(r300_surface(fb->cbufs[i])->format);
 428     }
 429     for (; i < 4; i++) {
 430         OUT_CS(R300_US_OUT_FMT_UNUSED);
 431     }
 432
 433     /* Multisampling. Depends on framebuffer sample count.
 434      * These are pipelined regs and as such cannot be moved
 435      * to the AA state. */
 436     if (r300->rws->get_value(r300->rws, R300_VID_DRM_2_3_0)) {
 437         unsigned mspos0 = 0x66666666;
 438         unsigned mspos1 = 0x6666666;
 439
 440         if (fb->nr_cbufs && fb->cbufs[0]->texture->nr_samples > 1) {
 441             /* Subsample placement. These may not be optimal. */
 442             switch (fb->cbufs[0]->texture->nr_samples) {
 443                 case 2:
 444                     mspos0 = 0x33996633;
 445                     mspos1 = 0x6666663;
 446                     break;
 447                 case 3:
 448                     mspos0 = 0x33936933;
 449                     mspos1 = 0x6666663;
 450                     break;
 451                 case 4:
 452                     mspos0 = 0x33939933;
 453                     mspos1 = 0x3966663;
 454                     break;
 455                 case 6:
 456                     mspos0 = 0x22a2aa22;
 457                     mspos1 = 0x2a65672;
 458                     break;
 459                 default:
 460                     debug_printf("r300: Bad number of multisamples!\n");
 461             }
 462         }
 463
 464         OUT_CS_REG_SEQ(R300_GB_MSPOS0, 2);
 465         OUT_CS(mspos0);
 466         OUT_CS(mspos1);
 467     }
 468     END_CS;
 469 }
 470
 471 void r300_emit_query_start(struct r300_context *r300, unsigned size, void*state)
 472 {
 473     struct r300_query *query = r300->query_current;
 474     CS_LOCALS(r300);
 475
 476     if (!query)
 477         return;
 478
 479     BEGIN_CS(size);
 480     if (r300->screen->caps.family == CHIP_FAMILY_RV530) {
 481         OUT_CS_REG(RV530_FG_ZBREG_DEST, RV530_FG_ZBREG_DEST_PIPE_SELECT_ALL);
 482     } else {
 483         OUT_CS_REG(R300_SU_REG_DEST, R300_RASTER_PIPE_SELECT_ALL);
 484     }
 485     OUT_CS_REG(R300_ZB_ZPASS_DATA, 0);
 486     END_CS;
 487     query->begin_emitted = TRUE;
 488     query->flushed = FALSE;
 489 }
 490
 491 static void r300_emit_query_end_frag_pipes(struct r300_context *r300,
 492                                            struct r300_query *query)
 493 {
 494     struct r300_capabilities* caps = &r300->screen->caps;
 495     struct r300_winsys_buffer *buf = r300->query_current->buffer;
 496     CS_LOCALS(r300);
 497
 498     assert(caps->num_frag_pipes);
 499
 500     BEGIN_CS(6 * caps->num_frag_pipes + 2);
 501     /* I'm not so sure I like this switch, but it's hard to be elegant
 502      * when there's so many special cases...
 503      *
 504      * So here's the basic idea. For each pipe, enable writes to it only,
 505      * then put out the relocation for ZPASS_ADDR, taking into account a
 506      * 4-byte offset for each pipe. RV380 and older are special; they have
 507      * only two pipes, and the second pipe's enable is on bit 3, not bit 1,
 508      * so there's a chipset cap for that. */
 509     switch (caps->num_frag_pipes) {
 510         case 4:
 511             /* pipe 3 only */
 512             OUT_CS_REG(R300_SU_REG_DEST, 1 << 3);
 513             OUT_CS_REG_SEQ(R300_ZB_ZPASS_ADDR, 1);
 514             OUT_CS_RELOC(buf, (query->num_results + 3) * 4,
 515                     0, query->domain);
 516         case 3:
 517             /* pipe 2 only */
 518             OUT_CS_REG(R300_SU_REG_DEST, 1 << 2);
 519             OUT_CS_REG_SEQ(R300_ZB_ZPASS_ADDR, 1);
 520             OUT_CS_RELOC(buf, (query->num_results + 2) * 4,
 521                     0, query->domain);
 522         case 2:
 523             /* pipe 1 only */
 524             /* As mentioned above, accomodate RV380 and older. */
 525             OUT_CS_REG(R300_SU_REG_DEST,
 526                     1 << (caps->high_second_pipe ? 3 : 1));
 527             OUT_CS_REG_SEQ(R300_ZB_ZPASS_ADDR, 1);
 528             OUT_CS_RELOC(buf, (query->num_results + 1) * 4,
 529                     0, query->domain);
 530         case 1:
 531             /* pipe 0 only */
 532             OUT_CS_REG(R300_SU_REG_DEST, 1 << 0);
 533             OUT_CS_REG_SEQ(R300_ZB_ZPASS_ADDR, 1);
 534             OUT_CS_RELOC(buf, (query->num_results + 0) * 4,
 535                     0, query->domain);
 536             break;
 537         default:
 538             fprintf(stderr, "r300: Implementation error: Chipset reports %d"
 539                     " pixel pipes!\n", caps->num_frag_pipes);
 540             abort();
 541     }
 542
 543     /* And, finally, reset it to normal... */
 544     OUT_CS_REG(R300_SU_REG_DEST, 0xF);
 545     END_CS;
 546 }
 547
 548 static void rv530_emit_query_end_single_z(struct r300_context *r300,
 549                                           struct r300_query *query)
 550 {
 551     struct r300_winsys_buffer *buf = r300->query_current->buffer;
 552     CS_LOCALS(r300);
 553
 554     BEGIN_CS(8);
 555     OUT_CS_REG(RV530_FG_ZBREG_DEST, RV530_FG_ZBREG_DEST_PIPE_SELECT_0);
 556     OUT_CS_REG_SEQ(R300_ZB_ZPASS_ADDR, 1);
 557     OUT_CS_RELOC(buf, query->num_results * 4, 0, query->domain);
 558     OUT_CS_REG(RV530_FG_ZBREG_DEST, RV530_FG_ZBREG_DEST_PIPE_SELECT_ALL);
 559     END_CS;
 560 }
 561
 562 static void rv530_emit_query_end_double_z(struct r300_context *r300,
 563                                           struct r300_query *query)
 564 {
 565     struct r300_winsys_buffer *buf = r300->query_current->buffer;
 566     CS_LOCALS(r300);
 567
 568     BEGIN_CS(14);
 569     OUT_CS_REG(RV530_FG_ZBREG_DEST, RV530_FG_ZBREG_DEST_PIPE_SELECT_0);
 570     OUT_CS_REG_SEQ(R300_ZB_ZPASS_ADDR, 1);
 571     OUT_CS_RELOC(buf, (query->num_results + 0) * 4, 0, query->domain);
 572     OUT_CS_REG(RV530_FG_ZBREG_DEST, RV530_FG_ZBREG_DEST_PIPE_SELECT_1);
 573     OUT_CS_REG_SEQ(R300_ZB_ZPASS_ADDR, 1);
 574     OUT_CS_RELOC(buf, (query->num_results + 1) * 4, 0, query->domain);
 575     OUT_CS_REG(RV530_FG_ZBREG_DEST, RV530_FG_ZBREG_DEST_PIPE_SELECT_ALL);
 576     END_CS;
 577 }
 578
 579 void r300_emit_query_end(struct r300_context* r300)
 580 {
 581     struct r300_capabilities *caps = &r300->screen->caps;
 582     struct r300_query *query = r300->query_current;
 583
 584     if (!query)
 585         return;
 586
 587     if (query->begin_emitted == FALSE)
 588         return;
 589
 590     if (caps->family == CHIP_FAMILY_RV530) {
 591         if (caps->num_z_pipes == 2)
 592             rv530_emit_query_end_double_z(r300, query);
 593         else
 594             rv530_emit_query_end_single_z(r300, query);
 595     } else
 596         r300_emit_query_end_frag_pipes(r300, query);
 597
 598     query->begin_emitted = FALSE;
 599     query->num_results += query->num_pipes;
 600
 601     /* XXX grab all the results and reset the counter. */
 602     if (query->num_results >= query->buffer_size / 4 - 4) {
 603         query->num_results = (query->buffer_size / 4) / 2;
 604         fprintf(stderr, "r300: Rewinding OQBO...\n");
 605     }
 606 }
 607
 608 void r300_emit_invariant_state(struct r300_context *r300,
 609                                unsigned size, void *state)
 610 {
 611     CS_LOCALS(r300);
 612     WRITE_CS_TABLE(state, size);
 613 }
 614
 615 void r300_emit_rs_state(struct r300_context* r300, unsigned size, void* state)
 616 {
 617     struct r300_rs_state* rs = state;
 618     CS_LOCALS(r300);
 619
 620     BEGIN_CS(size);
 621     OUT_CS_TABLE(rs->cb_main, 25);
 622     if (rs->polygon_offset_enable) {
 623         if (r300->zbuffer_bpp == 16) {
 624             OUT_CS_TABLE(rs->cb_poly_offset_zb16, 5);
 625         } else {
 626             OUT_CS_TABLE(rs->cb_poly_offset_zb24, 5);
 627         }
 628     }
 629     END_CS;
 630 }
 631
 632 void r300_emit_rs_block_state(struct r300_context* r300,
 633                               unsigned size, void* state)
 634 {
 635     struct r300_rs_block* rs = (struct r300_rs_block*)state;
 636     unsigned i;
 637     /* It's the same for both INST and IP tables */
 638     unsigned count = (rs->inst_count & R300_RS_INST_COUNT_MASK) + 1;
 639     CS_LOCALS(r300);
 640
 641     if (DBG_ON(r300, DBG_RS_BLOCK)) {
 642         r500_dump_rs_block(rs);
 643
 644         fprintf(stderr, "r300: RS emit:\n");
 645
 646         for (i = 0; i < count; i++)
 647             fprintf(stderr, "    : ip %d: 0x%08x\n", i, rs->ip[i]);
 648
 649         for (i = 0; i < count; i++)
 650             fprintf(stderr, "    : inst %d: 0x%08x\n", i, rs->inst[i]);
 651
 652         fprintf(stderr, "    : count: 0x%08x inst_count: 0x%08x\n",
 653             rs->count, rs->inst_count);
 654     }
 655
 656     BEGIN_CS(size);
 657     OUT_CS_REG_SEQ(R300_VAP_VTX_STATE_CNTL, 2);
 658     OUT_CS(rs->vap_vtx_state_cntl);
 659     OUT_CS(rs->vap_vsm_vtx_assm);
 660     OUT_CS_REG_SEQ(R300_VAP_OUTPUT_VTX_FMT_0, 2);
 661     OUT_CS(rs->vap_out_vtx_fmt[0]);
 662     OUT_CS(rs->vap_out_vtx_fmt[1]);
 663
 664     if (r300->screen->caps.is_r500) {
 665         OUT_CS_REG_SEQ(R500_RS_IP_0, count);
 666     } else {
 667         OUT_CS_REG_SEQ(R300_RS_IP_0, count);
 668     }
 669     OUT_CS_TABLE(rs->ip, count);
 670
 671     OUT_CS_REG_SEQ(R300_RS_COUNT, 2);
 672     OUT_CS(rs->count);
 673     OUT_CS(rs->inst_count);
 674
 675     if (r300->screen->caps.is_r500) {
 676         OUT_CS_REG_SEQ(R500_RS_INST_0, count);
 677     } else {
 678         OUT_CS_REG_SEQ(R300_RS_INST_0, count);
 679     }
 680     OUT_CS_TABLE(rs->inst, count);
 681     END_CS;
 682 }
 683
 684 void r300_emit_scissor_state(struct r300_context* r300,
 685                              unsigned size, void* state)
 686 {
 687     struct pipe_scissor_state* scissor = (struct pipe_scissor_state*)state;
 688     CS_LOCALS(r300);
 689
 690     BEGIN_CS(size);
 691     OUT_CS_REG_SEQ(R300_SC_CLIPRECT_TL_0, 2);
 692     if (r300->screen->caps.is_r500) {
 693         OUT_CS((scissor->minx << R300_CLIPRECT_X_SHIFT) |
 694                (scissor->miny << R300_CLIPRECT_Y_SHIFT));
 695         OUT_CS(((scissor->maxx - 1) << R300_CLIPRECT_X_SHIFT) |
 696                ((scissor->maxy - 1) << R300_CLIPRECT_Y_SHIFT));
 697     } else {
 698         OUT_CS(((scissor->minx + 1440) << R300_CLIPRECT_X_SHIFT) |
 699                ((scissor->miny + 1440) << R300_CLIPRECT_Y_SHIFT));
 700         OUT_CS(((scissor->maxx + 1440-1) << R300_CLIPRECT_X_SHIFT) |
 701                ((scissor->maxy + 1440-1) << R300_CLIPRECT_Y_SHIFT));
 702     }
 703     END_CS;
 704 }
 705
 706 void r300_emit_textures_state(struct r300_context *r300,
 707                               unsigned size, void *state)
 708 {
 709     struct r300_textures_state *allstate = (struct r300_textures_state*)state;
 710     struct r300_texture_sampler_state *texstate;
 711     struct r300_texture *tex;
 712     unsigned i;
 713     CS_LOCALS(r300);
 714
 715     BEGIN_CS(size);
 716     OUT_CS_REG(R300_TX_ENABLE, allstate->tx_enable);
 717
 718     for (i = 0; i < allstate->count; i++) {
 719         if ((1 << i) & allstate->tx_enable) {
 720             texstate = &allstate->regs[i];
 721             tex = r300_texture(allstate->sampler_views[i]->base.texture);
 722
 723             OUT_CS_REG(R300_TX_FILTER0_0 + (i * 4), texstate->filter0);
 724             OUT_CS_REG(R300_TX_FILTER1_0 + (i * 4), texstate->filter1);
 725             OUT_CS_REG(R300_TX_BORDER_COLOR_0 + (i * 4),
 726                        texstate->border_color);
 727
 728             OUT_CS_REG(R300_TX_FORMAT0_0 + (i * 4), texstate->format.format0);
 729             OUT_CS_REG(R300_TX_FORMAT1_0 + (i * 4), texstate->format.format1);
 730             OUT_CS_REG(R300_TX_FORMAT2_0 + (i * 4), texstate->format.format2);
 731
 732             OUT_CS_REG_SEQ(R300_TX_OFFSET_0 + (i * 4), 1);
 733             OUT_CS_TEX_RELOC(tex, texstate->format.tile_config, tex->domain,
 734                              0);
 735         }
 736     }
 737     END_CS;
 738 }
 739
 740 void r300_emit_aos(struct r300_context* r300, int offset, boolean indexed)
 741 {
 742     struct pipe_vertex_buffer *vb1, *vb2, *vbuf = r300->vertex_buffer;
 743     struct pipe_vertex_element *velem = r300->velems->velem;
 744     struct r300_buffer *buf;
 745     int i;
 746     unsigned *hw_format_size = r300->velems->hw_format_size;
 747     unsigned size1, size2, aos_count = r300->velems->count;
 748     unsigned packet_size = (aos_count * 3 + 1) / 2;
 749     CS_LOCALS(r300);
 750
 751     BEGIN_CS(2 + packet_size + aos_count * 2);
 752     OUT_CS_PKT3(R300_PACKET3_3D_LOAD_VBPNTR, packet_size);
 753     OUT_CS(aos_count | (!indexed ? R300_VC_FORCE_PREFETCH : 0));
 754
 755     for (i = 0; i < aos_count - 1; i += 2) {
 756         vb1 = &vbuf[velem[i].vertex_buffer_index];
 757         vb2 = &vbuf[velem[i+1].vertex_buffer_index];
 758         size1 = hw_format_size[i];
 759         size2 = hw_format_size[i+1];
 760
 761         OUT_CS(R300_VBPNTR_SIZE0(size1) | R300_VBPNTR_STRIDE0(vb1->stride) |
 762                R300_VBPNTR_SIZE1(size2) | R300_VBPNTR_STRIDE1(vb2->stride));
 763         OUT_CS(vb1->buffer_offset + velem[i].src_offset   + offset * vb1->stride);
 764         OUT_CS(vb2->buffer_offset + velem[i+1].src_offset + offset * vb2->stride);
 765     }
 766
 767     if (aos_count & 1) {
 768         vb1 = &vbuf[velem[i].vertex_buffer_index];
 769         size1 = hw_format_size[i];
 770
 771         OUT_CS(R300_VBPNTR_SIZE0(size1) | R300_VBPNTR_STRIDE0(vb1->stride));
 772         OUT_CS(vb1->buffer_offset + velem[i].src_offset + offset * vb1->stride);
 773     }
 774
 775     for (i = 0; i < aos_count; i++) {
 776         buf = r300_buffer(vbuf[velem[i].vertex_buffer_index].buffer);
 777         OUT_CS_BUF_RELOC_NO_OFFSET(&buf->b.b, buf->domain, 0);
 778     }
 779     END_CS;
 780 }
 781
 782 void r300_emit_aos_swtcl(struct r300_context *r300, boolean indexed)
 783 {
 784     CS_LOCALS(r300);
 785
 786     DBG(r300, DBG_SWTCL, "r300: Preparing vertex buffer %p for render, "
 787             "vertex size %d\n", r300->vbo,
 788             r300->vertex_info.size);
 789     /* Set the pointer to our vertex buffer. The emitted values are this:
 790      * PACKET3 [3D_LOAD_VBPNTR]
 791      * COUNT   [1]
 792      * FORMAT  [size | stride << 8]
 793      * OFFSET  [offset into BO]
 794      * VBPNTR  [relocated BO]
 795      */
 796     BEGIN_CS(7);
 797     OUT_CS_PKT3(R300_PACKET3_3D_LOAD_VBPNTR, 3);
 798     OUT_CS(1 | (!indexed ? R300_VC_FORCE_PREFETCH : 0));
 799     OUT_CS(r300->vertex_info.size |
 800             (r300->vertex_info.size << 8));
 801     OUT_CS(r300->vbo_offset);
 802     OUT_CS_BUF_RELOC(r300->vbo, 0, r300_buffer(r300->vbo)->domain, 0);
 803     END_CS;
 804 }
 805
 806 void r300_emit_vertex_stream_state(struct r300_context* r300,
 807                                    unsigned size, void* state)
 808 {
 809     struct r300_vertex_stream_state *streams =
 810         (struct r300_vertex_stream_state*)state;
 811     unsigned i;
 812     CS_LOCALS(r300);
 813
 814     if (DBG_ON(r300, DBG_PSC)) {
 815         fprintf(stderr, "r300: PSC emit:\n");
 816
 817         for (i = 0; i < streams->count; i++) {
 818             fprintf(stderr, "    : prog_stream_cntl%d: 0x%08x\n", i,
 819                    streams->vap_prog_stream_cntl[i]);
 820         }
 821
 822         for (i = 0; i < streams->count; i++) {
 823             fprintf(stderr, "    : prog_stream_cntl_ext%d: 0x%08x\n", i,
 824                    streams->vap_prog_stream_cntl_ext[i]);
 825         }
 826     }
 827
 828     BEGIN_CS(size);
 829     OUT_CS_REG_SEQ(R300_VAP_PROG_STREAM_CNTL_0, streams->count);
 830     OUT_CS_TABLE(streams->vap_prog_stream_cntl, streams->count);
 831     OUT_CS_REG_SEQ(R300_VAP_PROG_STREAM_CNTL_EXT_0, streams->count);
 832     OUT_CS_TABLE(streams->vap_prog_stream_cntl_ext, streams->count);
 833     END_CS;
 834 }
 835
 836 void r300_emit_pvs_flush(struct r300_context* r300, unsigned size, void* state)
 837 {
 838     CS_LOCALS(r300);
 839
 840     BEGIN_CS(size);
 841     OUT_CS_REG(R300_VAP_PVS_STATE_FLUSH_REG, 0x0);
 842     END_CS;
 843 }
 844
 845 void r300_emit_vap_invariant_state(struct r300_context *r300,
 846                                    unsigned size, void *state)
 847 {
 848     CS_LOCALS(r300);
 849     WRITE_CS_TABLE(state, size);
 850 }
 851
 852 void r300_emit_vs_state(struct r300_context* r300, unsigned size, void* state)
 853 {
 854     struct r300_vertex_shader* vs = (struct r300_vertex_shader*)state;
 855     struct r300_vertex_program_code* code = &vs->code;
 856     struct r300_screen* r300screen = r300->screen;
 857     unsigned instruction_count = code->length / 4;
 858     unsigned i;
 859
 860     unsigned vtx_mem_size = r300screen->caps.is_r500 ? 128 : 72;
 861     unsigned input_count = MAX2(util_bitcount(code->InputsRead), 1);
 862     unsigned output_count = MAX2(util_bitcount(code->OutputsWritten), 1);
 863     unsigned temp_count = MAX2(code->num_temporaries, 1);
 864
 865     unsigned pvs_num_slots = MIN3(vtx_mem_size / input_count,
 866                                   vtx_mem_size / output_count, 10);
 867     unsigned pvs_num_controllers = MIN2(vtx_mem_size / temp_count, 6);
 868
 869     unsigned imm_first = vs->externals_count;
 870     unsigned imm_end = vs->code.constants.Count;
 871     unsigned imm_count = vs->immediates_count;
 872
 873     CS_LOCALS(r300);
 874
 875     BEGIN_CS(size);
 876
 877     /* R300_VAP_PVS_CODE_CNTL_0
 878      * R300_VAP_PVS_CONST_CNTL
 879      * R300_VAP_PVS_CODE_CNTL_1
 880      * See the r5xx docs for instructions on how to use these. */
 881     OUT_CS_REG_SEQ(R300_VAP_PVS_CODE_CNTL_0, 3);
 882     OUT_CS(R300_PVS_FIRST_INST(0) |
 883             R300_PVS_XYZW_VALID_INST(instruction_count - 1) |
 884             R300_PVS_LAST_INST(instruction_count - 1));
 885     OUT_CS(R300_PVS_MAX_CONST_ADDR(code->constants.Count - 1));
 886     OUT_CS(instruction_count - 1);
 887
 888     OUT_CS_REG(R300_VAP_PVS_VECTOR_INDX_REG, 0);
 889     OUT_CS_ONE_REG(R300_VAP_PVS_UPLOAD_DATA, code->length);
 890     OUT_CS_TABLE(code->body.d, code->length);
 891
 892     OUT_CS_REG(R300_VAP_CNTL, R300_PVS_NUM_SLOTS(pvs_num_slots) |
 893             R300_PVS_NUM_CNTLRS(pvs_num_controllers) |
 894             R300_PVS_NUM_FPUS(r300screen->caps.num_vert_fpus) |
 895             R300_PVS_VF_MAX_VTX_NUM(12) |
 896             (r300screen->caps.is_r500 ? R500_TCL_STATE_OPTIMIZATION : 0));
 897
 898     /* Emit immediates. */
 899     if (imm_count) {
 900         OUT_CS_REG(R300_VAP_PVS_VECTOR_INDX_REG,
 901                    (r300->screen->caps.is_r500 ?
 902                    R500_PVS_CONST_START : R300_PVS_CONST_START) +
 903                    imm_first);
 904         OUT_CS_ONE_REG(R300_VAP_PVS_UPLOAD_DATA, imm_count * 4);
 905         for (i = imm_first; i < imm_end; i++) {
 906             const float *data = vs->code.constants.Constants[i].u.Immediate;
 907             OUT_CS_TABLE(data, 4);
 908         }
 909     }
 910     END_CS;
 911 }
 912
 913 void r300_emit_vs_constants(struct r300_context* r300,
 914                             unsigned size, void *state)
 915 {
 916     unsigned count =
 917         ((struct r300_vertex_shader*)r300->vs_state.state)->externals_count;
 918     struct r300_constant_buffer *buf = (struct r300_constant_buffer*)state;
 919     CS_LOCALS(r300);
 920
 921     if (!count)
 922         return;
 923
 924     BEGIN_CS(size);
 925     OUT_CS_REG(R300_VAP_PVS_VECTOR_INDX_REG,
 926                (r300->screen->caps.is_r500 ?
 927                R500_PVS_CONST_START : R300_PVS_CONST_START));
 928     OUT_CS_ONE_REG(R300_VAP_PVS_UPLOAD_DATA, count * 4);
 929     OUT_CS_TABLE(buf->constants, count * 4);
 930     END_CS;
 931 }
 932
 933 void r300_emit_viewport_state(struct r300_context* r300,
 934                               unsigned size, void* state)
 935 {
 936     struct r300_viewport_state* viewport = (struct r300_viewport_state*)state;
 937     CS_LOCALS(r300);
 938
 939     BEGIN_CS(size);
 940     OUT_CS_REG_SEQ(R300_SE_VPORT_XSCALE, 6);
 941     OUT_CS_TABLE(&viewport->xscale, 6);
 942     OUT_CS_REG(R300_VAP_VTE_CNTL, viewport->vte_control);
 943     END_CS;
 944 }
 945
 946 void r300_emit_ztop_state(struct r300_context* r300,
 947                           unsigned size, void* state)
 948 {
 949     struct r300_ztop_state* ztop = (struct r300_ztop_state*)state;
 950     CS_LOCALS(r300);
 951
 952     BEGIN_CS(size);
 953     OUT_CS_REG(R300_ZB_ZTOP, ztop->z_buffer_top);
 954     END_CS;
 955 }
 956
 957 void r300_emit_texture_cache_inval(struct r300_context* r300, unsigned size, void* state)
 958 {
 959     CS_LOCALS(r300);
 960
 961     BEGIN_CS(size);
 962     OUT_CS_REG(R300_TX_INVALTAGS, 0);
 963     END_CS;
 964 }
 965
 966 void r300_emit_buffer_validate(struct r300_context *r300,
 967                                boolean do_validate_vertex_buffers,
 968                                struct pipe_resource *index_buffer)
 969 {
 970     struct pipe_framebuffer_state* fb =
 971         (struct pipe_framebuffer_state*)r300->fb_state.state;
 972     struct r300_textures_state *texstate =
 973         (struct r300_textures_state*)r300->textures_state.state;
 974     struct r300_texture* tex;
 975     struct pipe_vertex_buffer *vbuf = r300->vertex_buffer;
 976     struct pipe_vertex_element *velem = r300->velems->velem;
 977     struct pipe_resource *pbuf;
 978     unsigned i;
 979     boolean invalid = FALSE;
 980
 981     /* upload buffers first */
 982     if (r300->screen->caps.has_tcl && r300->any_user_vbs) {
 983         r300_upload_user_buffers(r300);
 984         r300->any_user_vbs = false;
 985     }
 986
 987     /* Clean out BOs. */
 988     r300->rws->cs_reset_buffers(r300->cs);
 989
 990 validate:
 991     /* Color buffers... */
 992     for (i = 0; i < fb->nr_cbufs; i++) {
 993         tex = r300_texture(fb->cbufs[i]->texture);
 994         assert(tex && tex->buffer && "cbuf is marked, but NULL!");
 995         r300->rws->cs_add_buffer(r300->cs, tex->buffer, 0,
 996                                  r300_surface(fb->cbufs[i])->domain);
 997     }
 998     /* ...depth buffer... */
 999     if (fb->zsbuf) {
1000         tex = r300_texture(fb->zsbuf->texture);
1001         assert(tex && tex->buffer && "zsbuf is marked, but NULL!");
1002         r300->rws->cs_add_buffer(r300->cs, tex->buffer, 0,
1003                                  r300_surface(fb->zsbuf)->domain);
1004     }
1005     /* ...textures... */
1006     for (i = 0; i < texstate->count; i++) {
1007         if (!(texstate->tx_enable & (1 << i))) {
1008             continue;
1009         }
1010
1011         tex = r300_texture(texstate->sampler_views[i]->base.texture);
1012         r300->rws->cs_add_buffer(r300->cs, tex->buffer, tex->domain, 0);
1013     }
1014     /* ...occlusion query buffer... */
1015     if (r300->query_current)
1016         r300->rws->cs_add_buffer(r300->cs, r300->query_current->buffer,
1017                                  0, r300->query_current->domain);
1018     /* ...vertex buffer for SWTCL path... */
1019     if (r300->vbo)
1020         r300->rws->cs_add_buffer(r300->cs, r300_buffer(r300->vbo)->buf,
1021                                  r300_buffer(r300->vbo)->domain, 0);
1022     /* ...vertex buffers for HWTCL path... */
1023     if (do_validate_vertex_buffers) {
1024         for (i = 0; i < r300->velems->count; i++) {
1025             pbuf = vbuf[velem[i].vertex_buffer_index].buffer;
1026
1027             r300->rws->cs_add_buffer(r300->cs, r300_buffer(pbuf)->buf,
1028                                      r300_buffer(pbuf)->domain, 0);
1029         }
1030     }
1031     /* ...and index buffer for HWTCL path. */
1032     if (index_buffer)
1033         r300->rws->cs_add_buffer(r300->cs, r300_buffer(index_buffer)->buf,
1034                                  r300_buffer(index_buffer)->domain, 0);
1035
1036     if (!r300->rws->cs_validate(r300->cs)) {
1037         r300->context.flush(&r300->context, 0, NULL);
1038         if (invalid) {
1039             /* Well, hell. */
1040             fprintf(stderr, "r300: Stuck in validation loop, gonna quit now.\n");
1041             abort();
1042         }
1043         invalid = TRUE;
1044         goto validate;
1045     }
1046 }
1047
1048 unsigned r300_get_num_dirty_dwords(struct r300_context *r300)
1049 {
1050     struct r300_atom* atom;
1051     unsigned dwords = 0;
1052
1053     foreach(atom, &r300->atom_list) {
1054         if (atom->dirty) {
1055             dwords += atom->size;
1056         }
1057     }
1058
1059     /* let's reserve some more, just in case */
1060     dwords += 32;
1061
1062     return dwords;
1063 }
1064
1065 /* Emit all dirty state. */
1066 void r300_emit_dirty_state(struct r300_context* r300)
1067 {
1068     struct r300_atom* atom;
1069
1070     foreach(atom, &r300->atom_list) {
1071         if (atom->dirty) {
1072             atom->emit(r300, atom->size, atom->state);
1073             if (SCREEN_DBG_ON(r300->screen, DBG_STATS)) {
1074                 atom->counter++;
1075             }
1076             atom->dirty = FALSE;
1077         }
1078     }
1079
1080     r300->dirty_hw++;
1081 }